JPS6247118U - - Google Patents

Info

Publication number
JPS6247118U
JPS6247118U JP13840485U JP13840485U JPS6247118U JP S6247118 U JPS6247118 U JP S6247118U JP 13840485 U JP13840485 U JP 13840485U JP 13840485 U JP13840485 U JP 13840485U JP S6247118 U JPS6247118 U JP S6247118U
Authority
JP
Japan
Prior art keywords
dielectric layer
conductor
layer
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13840485U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13840485U priority Critical patent/JPS6247118U/ja
Publication of JPS6247118U publication Critical patent/JPS6247118U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図はこの考案の第1実施例を示
し、第1図はその断面図、第2図は等価回路図、
第3図は第2実施例の断面図、第4図は第3実施
例の断面図である。 1,6……プリント基板、2……導電パターン
、3……誘電体層、4,7……導電体層、5……
コンデンサ、8……誘電材料、9……導電材料。
1 and 2 show a first embodiment of this invention, FIG. 1 is a sectional view thereof, FIG. 2 is an equivalent circuit diagram,
FIG. 3 is a sectional view of the second embodiment, and FIG. 4 is a sectional view of the third embodiment. 1, 6... Printed circuit board, 2... Conductive pattern, 3... Dielectric layer, 4, 7... Conductor layer, 5...
Capacitor, 8...dielectric material, 9...conductive material.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板上に形成された導体パターン上に
誘電体層を形成し、この誘電体層上に導電体層を
形成したことを特徴とする面状コンデンサ。
A planar capacitor characterized in that a dielectric layer is formed on a conductor pattern formed on a printed circuit board, and a conductor layer is formed on the dielectric layer.
JP13840485U 1985-09-10 1985-09-10 Pending JPS6247118U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13840485U JPS6247118U (en) 1985-09-10 1985-09-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13840485U JPS6247118U (en) 1985-09-10 1985-09-10

Publications (1)

Publication Number Publication Date
JPS6247118U true JPS6247118U (en) 1987-03-23

Family

ID=31043355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13840485U Pending JPS6247118U (en) 1985-09-10 1985-09-10

Country Status (1)

Country Link
JP (1) JPS6247118U (en)

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