JPH0249026B2 - - Google Patents

Info

Publication number
JPH0249026B2
JPH0249026B2 JP56071521A JP7152181A JPH0249026B2 JP H0249026 B2 JPH0249026 B2 JP H0249026B2 JP 56071521 A JP56071521 A JP 56071521A JP 7152181 A JP7152181 A JP 7152181A JP H0249026 B2 JPH0249026 B2 JP H0249026B2
Authority
JP
Japan
Prior art keywords
gate
region
diffusion control
insulating layer
control gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56071521A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5715470A (en
Inventor
Kuraui Kuranfuoodo Junia Haiden
Riibusu Hofuman Chaaruzu
Burooneru Suchiibunsu Jofurei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5715470A publication Critical patent/JPS5715470A/ja
Publication of JPH0249026B2 publication Critical patent/JPH0249026B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP7152181A 1980-06-30 1981-05-14 Electrically programmable/erasable mos memory cell Granted JPS5715470A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/164,470 US4404577A (en) 1980-06-30 1980-06-30 Electrically alterable read only memory cell

Publications (2)

Publication Number Publication Date
JPS5715470A JPS5715470A (en) 1982-01-26
JPH0249026B2 true JPH0249026B2 (en, 2012) 1990-10-26

Family

ID=22594638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7152181A Granted JPS5715470A (en) 1980-06-30 1981-05-14 Electrically programmable/erasable mos memory cell

Country Status (4)

Country Link
US (1) US4404577A (en, 2012)
EP (1) EP0044384B1 (en, 2012)
JP (1) JPS5715470A (en, 2012)
DE (1) DE3176416D1 (en, 2012)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4486769A (en) * 1979-01-24 1984-12-04 Xicor, Inc. Dense nonvolatile electrically-alterable memory device with substrate coupling electrode
JPS5792490A (en) * 1980-11-29 1982-06-09 Toshiba Corp Semiconductor storage device
JPS59155968A (ja) * 1983-02-25 1984-09-05 Toshiba Corp 半導体記憶装置
EP0123249B1 (en) * 1983-04-18 1990-08-01 Kabushiki Kaisha Toshiba Semiconductor memory device having a floating gate
US4616245A (en) * 1984-10-29 1986-10-07 Ncr Corporation Direct-write silicon nitride EEPROM cell
JPS61225860A (ja) * 1985-03-30 1986-10-07 Toshiba Corp 半導体記憶装置
US4706102A (en) * 1985-11-07 1987-11-10 Sprague Electric Company Memory device with interconnected polysilicon layers and method for making
US4735919A (en) * 1986-04-15 1988-04-05 General Electric Company Method of making a floating gate memory cell
US5017505A (en) * 1986-07-18 1991-05-21 Nippondenso Co., Ltd. Method of making a nonvolatile semiconductor memory apparatus with a floating gate
IT1199828B (it) * 1986-12-22 1989-01-05 Sgs Microelettronica Spa Cella di memoria eeprom a singolo livello di polisilicio scrivibile e cancellabile bit a bit
US4924278A (en) * 1987-06-19 1990-05-08 Advanced Micro Devices, Inc. EEPROM using a merged source and control gate
US5304505A (en) * 1989-03-22 1994-04-19 Emanuel Hazani Process for EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
US5677867A (en) * 1991-06-12 1997-10-14 Hazani; Emanuel Memory with isolatable expandable bit lines
US5332914A (en) * 1988-02-05 1994-07-26 Emanuel Hazani EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
US5324677A (en) * 1988-06-15 1994-06-28 Seiko Instruments Inc. Method of making memory cell and a peripheral circuit
JPH02125470A (ja) * 1988-06-15 1990-05-14 Seiko Instr Inc 半導体不揮発性メモリ
US5231041A (en) * 1988-06-28 1993-07-27 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of an electrically programmable non-volatile memory device having the floating gate extending over the control gate
DE68916335T2 (de) * 1988-08-08 1995-01-05 Nat Semiconductor Corp Elektrisch löschbare und programmierbare Nurlese-Bipolar-Feldeffekt-Speicherzelle und Verfahren zu deren Herstellung.
FR2656156A1 (fr) * 1989-12-16 1991-06-21 Sgs Thomson Microelectronics Circuit integre entierement protege des rayons ultra-violets.
US5122985A (en) * 1990-04-16 1992-06-16 Giovani Santin Circuit and method for erasing eeprom memory arrays to prevent over-erased cells
JP2679389B2 (ja) * 1990-10-12 1997-11-19 日本電気株式会社 不揮発性半導体記憶セルのデータ消去方法
US5331189A (en) * 1992-06-19 1994-07-19 International Business Machines Corporation Asymmetric multilayered dielectric material and a flash EEPROM using the same
EP0576773B1 (en) * 1992-06-30 1995-09-13 STMicroelectronics S.r.l. Integrated circuit entirely protected against ultraviolet rays
JP3344598B2 (ja) * 1993-11-25 2002-11-11 株式会社デンソー 半導体不揮発メモリ装置
US5761121A (en) * 1996-10-31 1998-06-02 Programmable Microelectronics Corporation PMOS single-poly non-volatile memory structure
DE69610062T2 (de) * 1995-11-21 2001-05-03 Programmable Microelectronics Nichtflüchtige PMOS-Speicheranordnung mit einer einzigen Polysiliziumschicht
US5841165A (en) * 1995-11-21 1998-11-24 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
US5736764A (en) * 1995-11-21 1998-04-07 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
US5753954A (en) * 1996-07-19 1998-05-19 National Semiconductor Corporation Single-poly neuron MOS transistor
US6043124A (en) * 1998-03-13 2000-03-28 Texas Instruments-Acer Incorporated Method for forming high density nonvolatile memories with high capacitive-coupling ratio
US6207505B1 (en) * 1998-03-23 2001-03-27 Texas Instruments-Acer Incorporated Method for forming high density nonvolatile memories with high capacitive-coupling ratio
US6252275B1 (en) 1999-01-07 2001-06-26 International Business Machines Corporation Silicon-on-insulator non-volatile random access memory device
US7508028B2 (en) * 2006-10-26 2009-03-24 Episil Technologies Inc. Non-volatile memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7500550A (nl) * 1975-01-17 1976-07-20 Philips Nv Halfgeleider-geheugeninrichting.
US4119995A (en) * 1976-08-23 1978-10-10 Intel Corporation Electrically programmable and electrically erasable MOS memory cell
US4099196A (en) * 1977-06-29 1978-07-04 Intel Corporation Triple layer polysilicon cell
DE2844878A1 (de) * 1978-10-14 1980-04-30 Itt Ind Gmbh Deutsche Integrierbarer isolierschicht-feldeffekttransistor
US4274012A (en) * 1979-01-24 1981-06-16 Xicor, Inc. Substrate coupled floating gate memory cell

Also Published As

Publication number Publication date
DE3176416D1 (en) 1987-10-08
US4404577A (en) 1983-09-13
JPS5715470A (en) 1982-01-26
EP0044384A2 (en) 1982-01-27
EP0044384B1 (en) 1987-09-02
EP0044384A3 (en) 1984-07-18

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