JPH02146740A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH02146740A
JPH02146740A JP63301432A JP30143288A JPH02146740A JP H02146740 A JPH02146740 A JP H02146740A JP 63301432 A JP63301432 A JP 63301432A JP 30143288 A JP30143288 A JP 30143288A JP H02146740 A JPH02146740 A JP H02146740A
Authority
JP
Japan
Prior art keywords
resin
semiconductor chip
semiconductor device
metal fine
fine line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63301432A
Other languages
English (en)
Inventor
Kenichi Kusaka
健一 日下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63301432A priority Critical patent/JPH02146740A/ja
Publication of JPH02146740A publication Critical patent/JPH02146740A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、樹脂封止型半導体装置に関して、樹脂封止
時に、樹脂の流れにより金属細線が流れるのを防止する
ものである。
〔従来の技術〕
第３図は従来の樹脂封止型半導体装置を示す平面断面図
、第４図は第３図の半導体装置の側面断面図である。
図において、１は集積回路が形成された半導体チップ、
２は前記半導体チップ１を載置固定するアイランド、３
は前記アイランド２を囲む様に配置されたリードであり
、インナーリード３ａ及びアウターリード３ｂとから構
成される。４は前記半導体チップ１とインナーリード３
ａとを電気的に結ぶ金線等の金属細線、５はモールド樹
脂である。
〔発明が解決しようとする課題〕
従来の樹脂封止型半導体装置は以上のように構成されて
いるので、樹脂封止の際、高い圧力で封止樹脂５を封入
するために、金属細線４が流れることがあった。そして
最悪の場合、金属細線４どうじが接触して、ショートす
るという問題点があった。
この発明は、上記のような問題を解消するためになされ
たもので、樹脂封止の際に金属際線が流れることのない
樹脂封止型半導体装置を得ることを目的とする。
〔課題を解決するための手段〕
この発明に係る半導体装置は、半導体チップとリードの
インナーリード部とが金属細線により電気的に接続され
、樹脂封止成型された半導体装置において、熱硬化性樹
脂と絶縁テープにより前記半導体チップと前記金属細線
とを固定したものである。
〔作用〕
この発明の半導体装置は、樹脂封止する前に、液状の熱
硬化性樹脂と絶縁テープにより、半導体チップと金属細
線とを固定することにより、樹脂封止の際に高い圧力で
樹脂が封入されても、金属細線が移動しなくショートを
起こすおそれもなくなる。
〔実施例〕
第１図はこの発明の一実施例による樹脂封止型半導体装
置を示す平面断面図であり、第２図は前記半導体装置の
側面断面図である。図において、１から５までは前記従
来装置と同一のものであり、その説明を省略する。６は
絶縁性の薄い膜からなる絶縁性テープであり、７は熱硬
化型の樹脂で、硬化前は液状のものである。
次に、上記の樹脂封止型半導体装置の製造方法について
説明する。まず半導体チップ１をアイランド２に半田等
で接続固定する。そして、半導体チップ１とインナ−リ
ード３ａ間を金線等の金属細線４で電気的に接続する。
次に、半導体チップ１と金属細線４を絶縁性テープ６と
熱硬化性樹脂７で固着させる。その後は、従来の装置と
同様に、封止樹脂５で封止を行い、メツキをし、リード
加工を行って樹脂封止型半導体装置を完成させる。
〔発明の効果〕
以上のようにこの発明によれば、半導体チップと金属細
線とを絶縁性テープ及び熱硬化性樹脂により固定したの
で、樹脂封止時に樹脂の流れにより金属細線が流れるの
を防止できる。そしてその結果、金属細線をより長くで
きる為、高ビン化に対応できるという効果がある。
【図面の簡単な説明】
第１図はこの発明の一実施例による樹脂封止形半導体装
置を示す平面断面図、第２図は第１図の半導体装置の側
面断面図である。第３図は従来の樹脂封止型半導体装置
を示す平面断面図であり、第４図は第３図の半導体装置
の側面断面図である。 （３〉 図において、１は半導体チップ、２はアイランド、３は
リード、３ａはインナーリード、３ｂはアウターリード
、４は金属細線、５はモールド樹脂、６は絶縁性テープ
、７は熱硬化型樹脂である。 なお、図中同一符号は同−又は相当部分を示す。

Claims (1)

    【特許請求の範囲】
  1. 半導体チップとリードのインナーリード部とが金属細線
    により電気的に接続され樹脂封止成型された半導体装置
    において、熱硬化性樹脂と絶縁テープにより前記半導体
    チップと前記金属細線とを固定したことを特徴とする半
    導体装置。
JP63301432A 1988-11-28 1988-11-28 半導体装置 Pending JPH02146740A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63301432A JPH02146740A (ja) 1988-11-28 1988-11-28 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63301432A JPH02146740A (ja) 1988-11-28 1988-11-28 半導体装置

Publications (1)

Publication Number Publication Date
JPH02146740A true JPH02146740A (ja) 1990-06-05

Family

ID=17896812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63301432A Pending JPH02146740A (ja) 1988-11-28 1988-11-28 半導体装置

Country Status (1)

Country Link
JP (1) JPH02146740A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5731962A (en) * 1994-09-22 1998-03-24 Nec Corporation Semiconductor device free from short-circuit due to resin pressure in mold
JP2007081127A (ja) * 2005-09-14 2007-03-29 Sharp Corp 半導体装置及び半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5731962A (en) * 1994-09-22 1998-03-24 Nec Corporation Semiconductor device free from short-circuit due to resin pressure in mold
JP2007081127A (ja) * 2005-09-14 2007-03-29 Sharp Corp 半導体装置及び半導体装置の製造方法

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