JPH0213500B2 - - Google Patents

Info

Publication number
JPH0213500B2
JPH0213500B2 JP59123088A JP12308884A JPH0213500B2 JP H0213500 B2 JPH0213500 B2 JP H0213500B2 JP 59123088 A JP59123088 A JP 59123088A JP 12308884 A JP12308884 A JP 12308884A JP H0213500 B2 JPH0213500 B2 JP H0213500B2
Authority
JP
Japan
Prior art keywords
signal
control signal
bit
output side
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59123088A
Other languages
English (en)
Japanese (ja)
Other versions
JPS612442A (ja
Inventor
Ikuo Iizuka
Fuminobu Butani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59123088A priority Critical patent/JPS612442A/ja
Publication of JPS612442A publication Critical patent/JPS612442A/ja
Publication of JPH0213500B2 publication Critical patent/JPH0213500B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59123088A 1984-06-15 1984-06-15 位相変動吸収装置 Granted JPS612442A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59123088A JPS612442A (ja) 1984-06-15 1984-06-15 位相変動吸収装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59123088A JPS612442A (ja) 1984-06-15 1984-06-15 位相変動吸収装置

Publications (2)

Publication Number Publication Date
JPS612442A JPS612442A (ja) 1986-01-08
JPH0213500B2 true JPH0213500B2 (enrdf_load_stackoverflow) 1990-04-04

Family

ID=14851907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59123088A Granted JPS612442A (ja) 1984-06-15 1984-06-15 位相変動吸収装置

Country Status (1)

Country Link
JP (1) JPS612442A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0736514B2 (ja) * 1986-10-31 1995-04-19 日本電気株式会社 遅延変動吸収回路
JPH03101328A (ja) * 1989-09-13 1991-04-26 Fujitsu Ltd データ転送回路

Also Published As

Publication number Publication date
JPS612442A (ja) 1986-01-08

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees