JPH02122477U - - Google Patents
Info
- Publication number
- JPH02122477U JPH02122477U JP3110189U JP3110189U JPH02122477U JP H02122477 U JPH02122477 U JP H02122477U JP 3110189 U JP3110189 U JP 3110189U JP 3110189 U JP3110189 U JP 3110189U JP H02122477 U JPH02122477 U JP H02122477U
- Authority
- JP
- Japan
- Prior art keywords
- pad
- substrate
- insulating layer
- bonded
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の原理説明図、第２図は本考案
による一実施例の説明図で、ａは平面図、ｂはａ
のＢ−Ｂ断面図、ｃは絶縁層の斜視図、第３図の
ａ〜ｃは本考案の基板の製造工程図、第４図は従
来の説明図で、ａは平面図、ｂはリード端子の斜
視図、ｃはａのＡ−Ａ断面図を示す。
図において、１は基板、２は表面、３はパツド
、４は被ボンデイング部材、５は半田、６は絶縁
層を示す。
Fig. 1 is an explanatory diagram of the principle of the present invention, and Fig. 2 is an explanatory diagram of an embodiment according to the present invention, where a is a plan view and b is a
c is a perspective view of the insulating layer, a to c of Fig. 3 is a manufacturing process diagram of the substrate of the present invention, Fig. 4 is a conventional explanatory diagram, a is a plan view, and b is a lead. A perspective view of the terminal, c shows a sectional view taken along line A-A of a. In the figure, 1 is a substrate, 2 is a surface, 3 is a pad, 4 is a member to be bonded, 5 is solder, and 6 is an insulating layer.
Claims (1)
デイングするパツド３が配設されたプリント基板
において、 前記基板１の表面２に絶縁層６を形成し、該絶
縁層６によつて前記被ボンデイング部材４を前記
パツド３に固着させる半田５の上層より突出する
高さの側壁７が該パツド３の外周に設けられて成
ることを特徴とするプリント基板。[Claims for Utility Model Registration] In a printed circuit board in which a pad 3 for bonding a member to be bonded 4 is disposed on a surface 2 of a substrate 1, an insulating layer 6 is formed on the surface 2 of the substrate 1, and the insulating layer 6 A printed circuit board characterized in that a side wall 7 having a height protruding from an upper layer of solder 5 for fixing the member 4 to be bonded to the pad 3 is provided on the outer periphery of the pad 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3110189U JPH02122477U (en) | 1989-03-17 | 1989-03-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3110189U JPH02122477U (en) | 1989-03-17 | 1989-03-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02122477U true JPH02122477U (en) | 1990-10-08 |
Family
ID=31256714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3110189U Pending JPH02122477U (en) | 1989-03-17 | 1989-03-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02122477U (en) |
-
1989
- 1989-03-17 JP JP3110189U patent/JPH02122477U/ja active Pending