JPH0197581U - - Google Patents

Info

Publication number
JPH0197581U
JPH0197581U JP19286387U JP19286387U JPH0197581U JP H0197581 U JPH0197581 U JP H0197581U JP 19286387 U JP19286387 U JP 19286387U JP 19286387 U JP19286387 U JP 19286387U JP H0197581 U JPH0197581 U JP H0197581U
Authority
JP
Japan
Prior art keywords
attached
circuit board
printed circuit
layer
surface mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19286387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19286387U priority Critical patent/JPH0197581U/ja
Publication of JPH0197581U publication Critical patent/JPH0197581U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の積層プリント基板を表面実
装部品を取付けた状態で示す側断面図、第2図は
部品取付け前の状態を示す側断面図、第3図は内
層と外層を積層添着以前の個別の状態で示した側
断面図、第4図は従来の積層プリント基板を実装
部品を取付けた状態で示す側断面図である。 1…銅箔、2…絶縁基板、3…外層、4…内層
、5…表面実装部品、7…穿孔。
Figure 1 is a side sectional view showing the laminated printed circuit board of this invention with surface mount components attached, Figure 2 is a side sectional view showing the state before components are attached, and Figure 3 is before the inner and outer layers are laminated and attached. FIG. 4 is a side sectional view showing a conventional laminated printed circuit board with mounted components attached. 1...Copper foil, 2...Insulating substrate, 3...Outer layer, 4...Inner layer, 5...Surface mount component, 7...Perforation.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 内層の両側に少なくとも1層づつ外層を添着し
て成る多層プリント基板において、表面実装部品
を取り付けるべき位置の最外層をその実装部品に
対応した寸法、形状に穿孔したことを特徴とする
多層プリント基板。
A multilayer printed circuit board comprising at least one outer layer attached to each side of an inner layer, characterized in that the outermost layer at a position where a surface mount component is to be attached is perforated in a size and shape corresponding to the mounted component. .
JP19286387U 1987-12-19 1987-12-19 Pending JPH0197581U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19286387U JPH0197581U (en) 1987-12-19 1987-12-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19286387U JPH0197581U (en) 1987-12-19 1987-12-19

Publications (1)

Publication Number Publication Date
JPH0197581U true JPH0197581U (en) 1989-06-29

Family

ID=31483694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19286387U Pending JPH0197581U (en) 1987-12-19 1987-12-19

Country Status (1)

Country Link
JP (1) JPH0197581U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07170050A (en) * 1993-12-15 1995-07-04 Nec Corp Semiconductor device
JPH07321439A (en) * 1994-05-27 1995-12-08 O K Print:Kk Component mounting board for memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07170050A (en) * 1993-12-15 1995-07-04 Nec Corp Semiconductor device
JPH07321439A (en) * 1994-05-27 1995-12-08 O K Print:Kk Component mounting board for memory device

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