JPH028174U - - Google Patents
Info
- Publication number
- JPH028174U JPH028174U JP1988085290U JP8529088U JPH028174U JP H028174 U JPH028174 U JP H028174U JP 1988085290 U JP1988085290 U JP 1988085290U JP 8529088 U JP8529088 U JP 8529088U JP H028174 U JPH028174 U JP H028174U
- Authority
- JP
- Japan
- Prior art keywords
- board
- hole
- layer board
- inner layer
- circuit conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 5
- 230000003014 reinforcing effect Effects 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
Description
第１図は本考案の多層プリント配線板の一実施
例を示す一部を破断した斜視図、第２図は第１図
における補強用ランドの付近を示す平面図、第３
図はクリアランスホールを設ける場合の補強用ラ
ンドの付近を示す平面図、第４図は多層プリント
配線板の従来例を示す第１図同様の斜視図である
。
１……ベースフイルム、２……接着層、３……
回路導体、４……外層板、５……内層板、６……
接着層、７……接続用ランド、８……スルーホー
ル、９……導体メツキ層、１１……補強用ランド
、１２……クリアランスホール。
FIG. 1 is a partially cutaway perspective view showing an embodiment of the multilayer printed wiring board of the present invention, FIG. 2 is a plan view showing the vicinity of the reinforcing land in FIG. 1, and FIG.
FIG. 4 is a plan view showing the vicinity of a reinforcing land when a clearance hole is provided, and FIG. 4 is a perspective view similar to FIG. 1 showing a conventional example of a multilayer printed wiring board. 1... Base film, 2... Adhesive layer, 3...
Circuit conductor, 4... Outer layer board, 5... Inner layer board, 6...
Adhesive layer, 7... Connection land, 8... Through hole, 9... Conductor plating layer, 11... Reinforcement land, 12... Clearance hole.
Claims (1)
５とを積層して、そのうちの一部の層の回路導体
に形成した接続用ランド７間をスルーホール８を
介して接続してなる多層プリント配線板において
、前記スルーホールとの接続がなされない内層板
に、その回路導体に対して絶縁状態の補強用ラン
ド１１がスルーホールを囲むように設けられてい
ることを特徴とする多層プリント配線板。 A multilayer board made by laminating an outer layer board 4 with a circuit conductor 3 mounted on its surface and an inner layer board 5, and connecting connecting lands 7 formed on the circuit conductors of some of the layers through through holes 8. A multilayer printed wiring board in which a reinforcing land 11 insulated from the circuit conductor is provided on an inner layer board that is not connected to the through hole so as to surround the through hole. Board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988085290U JPH0717166Y2 (en) | 1988-06-28 | 1988-06-28 | Multilayer flexible printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988085290U JPH0717166Y2 (en) | 1988-06-28 | 1988-06-28 | Multilayer flexible printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH028174U true JPH028174U (en) | 1990-01-19 |
| JPH0717166Y2 JPH0717166Y2 (en) | 1995-04-19 |
Family
ID=31309966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988085290U Expired - Lifetime JPH0717166Y2 (en) | 1988-06-28 | 1988-06-28 | Multilayer flexible printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0717166Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020241775A1 (en) * | 2019-05-29 | 2020-12-03 | 京セラ株式会社 | Electronic element mounting substrate, electronic device, and electronic module |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4717968A (en) * | 1971-02-10 | 1972-09-11 | ||
| JPS5122060A (en) * | 1974-08-19 | 1976-02-21 | Fujitsu Ltd | TASOPURINTOBAN |
| JPS5381955A (en) * | 1976-12-27 | 1978-07-19 | Fujitsu Ltd | Multilayer printed board |
-
1988
- 1988-06-28 JP JP1988085290U patent/JPH0717166Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4717968A (en) * | 1971-02-10 | 1972-09-11 | ||
| JPS5122060A (en) * | 1974-08-19 | 1976-02-21 | Fujitsu Ltd | TASOPURINTOBAN |
| JPS5381955A (en) * | 1976-12-27 | 1978-07-19 | Fujitsu Ltd | Multilayer printed board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020241775A1 (en) * | 2019-05-29 | 2020-12-03 | 京セラ株式会社 | Electronic element mounting substrate, electronic device, and electronic module |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0717166Y2 (en) | 1995-04-19 |