JPH0141273B2 - - Google Patents

Info

Publication number
JPH0141273B2
JPH0141273B2 JP59255164A JP25516484A JPH0141273B2 JP H0141273 B2 JPH0141273 B2 JP H0141273B2 JP 59255164 A JP59255164 A JP 59255164A JP 25516484 A JP25516484 A JP 25516484A JP H0141273 B2 JPH0141273 B2 JP H0141273B2
Authority
JP
Japan
Prior art keywords
layer
conductor
dielectric layer
new
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59255164A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60138993A (ja
Inventor
Deibitsudo Jonson Danieru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EIDP Inc
Original Assignee
EI Du Pont de Nemours and Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EI Du Pont de Nemours and Co filed Critical EI Du Pont de Nemours and Co
Publication of JPS60138993A publication Critical patent/JPS60138993A/ja
Publication of JPH0141273B2 publication Critical patent/JPH0141273B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4084—Through-connections; Vertical interconnect access [VIA] connections by deforming at least one of the conductive layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0397—Tab
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0548—Masks
    • H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1184—Underetching, e.g. etching of substrate under conductors or etching of conductor under dielectrics; Means for allowing or controlling underetching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/002—Etching of the substrate by chemical or physical means by liquid chemical etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49218—Contact or terminal manufacturing by assembling plural parts with deforming

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
JP59255164A 1983-12-05 1984-12-04 伝導性貫通孔の形成方法 Granted JPS60138993A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/558,308 US4501638A (en) 1983-12-05 1983-12-05 Liquid chemical process for forming conductive through-holes through a dielectric layer
US558308 1983-12-05

Publications (2)

Publication Number Publication Date
JPS60138993A JPS60138993A (ja) 1985-07-23
JPH0141273B2 true JPH0141273B2 (en, 2012) 1989-09-04

Family

ID=24229040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59255164A Granted JPS60138993A (ja) 1983-12-05 1984-12-04 伝導性貫通孔の形成方法

Country Status (7)

Country Link
US (1) US4501638A (en, 2012)
EP (1) EP0146061B1 (en, 2012)
JP (1) JPS60138993A (en, 2012)
AU (1) AU564672B2 (en, 2012)
BR (1) BR8406125A (en, 2012)
CA (1) CA1214571A (en, 2012)
DE (1) DE3485833T2 (en, 2012)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517050A (en) * 1983-12-05 1985-05-14 E. I. Du Pont De Nemours And Company Process for forming conductive through-holes through a dielectric layer
US4635358A (en) * 1985-01-03 1987-01-13 E. I. Du Pont De Nemours And Company Method for forming electrically conductive paths through a dielectric layer
EP0228694A3 (en) * 1985-12-30 1989-10-04 E.I. Du Pont De Nemours And Company Process using combination of laser etching and another etchant in formation of conductive through-holes in a dielectric layer
JPH0666549B2 (ja) * 1988-08-31 1994-08-24 信越ポリマー株式会社 スルーホール付きフレキシブル基板の製造方法
US4991285A (en) * 1989-11-17 1991-02-12 Rockwell International Corporation Method of fabricating multi-layer board
US5343616B1 (en) * 1992-02-14 1998-12-29 Rock Ltd Method of making high density self-aligning conductive networks and contact clusters
US5584120A (en) * 1992-02-14 1996-12-17 Research Organization For Circuit Knowledge Method of manufacturing printed circuits
JPH06314869A (ja) * 1993-04-30 1994-11-08 Eastern:Kk プリント配線板のスルーホール形成方法
JP2000332369A (ja) * 1999-05-25 2000-11-30 Mitsui Mining & Smelting Co Ltd プリント回路板及びその製造方法
DE102011010186B4 (de) * 2011-02-02 2018-10-18 Heraeus Deutschland GmbH & Co. KG Verfahren zur Herstellung eines Laminats mit leitender Kontaktierung
DE102020107904B4 (de) 2020-03-23 2022-04-28 Lpkf Laser & Electronics Aktiengesellschaft Verfahren zur Herstellung von Leiterbahnstrukturen auf einem nichtleitenden Trägersubstrat
CN116347768B (zh) * 2023-03-29 2023-08-11 浙江振有电子股份有限公司 一种pcb多层板件钻孔连通方法及设备

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1378154A (fr) * 1962-09-24 1964-11-13 North American Aviation Inc Interconnexions électriques pour panneaux de circuits imprimés
US3364300A (en) * 1965-03-19 1968-01-16 Texas Instruments Inc Modular circuit boards
US3557446A (en) * 1968-12-16 1971-01-26 Western Electric Co Method of forming printed circuit board through-connections
DE1927930A1 (de) * 1969-05-31 1970-12-03 Standard Elek K Lorenz Ag Elektrische Querverbindung zwischen zwei oder mehreren Leiterebenen von gedruckten Schaltungen
US3971661A (en) * 1972-06-14 1976-07-27 Westinghouse Electric Corporation Formation of openings in dielectric sheet
GB1439179A (en) * 1972-06-14 1976-06-09 Westinghouse Electric Corp Dielectric sheets
DE2347217A1 (de) * 1973-09-19 1975-03-27 Siemens Ag Verfahren zum durchkontaktieren eines beidseitig metallkaschierten basismaterials fuer gedruckte schaltungen
GB1497312A (en) * 1975-10-22 1978-01-05 Int Computers Ltd Production of printed circuit arrangements
US4319708A (en) * 1977-02-15 1982-03-16 Lomerson Robert B Mechanical bonding of surface conductive layers
US4184909A (en) * 1978-08-21 1980-01-22 International Business Machines Corporation Method of forming thin film interconnection systems
US4289573A (en) * 1979-03-30 1981-09-15 International Business Machines Corporation Process for forming microcircuits

Also Published As

Publication number Publication date
EP0146061B1 (en) 1992-07-22
CA1214571A (en) 1986-11-25
BR8406125A (pt) 1985-09-24
US4501638A (en) 1985-02-26
AU3627784A (en) 1985-06-13
DE3485833D1 (de) 1992-08-27
DE3485833T2 (de) 1993-02-18
AU564672B2 (en) 1987-08-20
EP0146061A3 (en) 1986-10-22
EP0146061A2 (en) 1985-06-26
JPS60138993A (ja) 1985-07-23

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