JPH0130172B2 - - Google Patents

Info

Publication number
JPH0130172B2
JPH0130172B2 JP55172460A JP17246080A JPH0130172B2 JP H0130172 B2 JPH0130172 B2 JP H0130172B2 JP 55172460 A JP55172460 A JP 55172460A JP 17246080 A JP17246080 A JP 17246080A JP H0130172 B2 JPH0130172 B2 JP H0130172B2
Authority
JP
Japan
Prior art keywords
cpu
interrupt signal
cpus
address
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55172460A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5797133A (en
Inventor
Atsuyuki Tanaka
Yukio Tadauchi
Shozo Kaieda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Minolta Co Ltd
Original Assignee
Minolta Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minolta Co Ltd filed Critical Minolta Co Ltd
Priority to JP55172460A priority Critical patent/JPS5797133A/ja
Publication of JPS5797133A publication Critical patent/JPS5797133A/ja
Priority to US06/697,478 priority patent/US4603383A/en
Publication of JPH0130172B2 publication Critical patent/JPH0130172B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Information Transfer Systems (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
JP55172460A 1980-12-05 1980-12-05 Control system of data transfer Granted JPS5797133A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55172460A JPS5797133A (en) 1980-12-05 1980-12-05 Control system of data transfer
US06/697,478 US4603383A (en) 1980-12-05 1985-02-01 Apparatus for direct data transfer among central processing units

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55172460A JPS5797133A (en) 1980-12-05 1980-12-05 Control system of data transfer

Publications (2)

Publication Number Publication Date
JPS5797133A JPS5797133A (en) 1982-06-16
JPH0130172B2 true JPH0130172B2 (OSRAM) 1989-06-16

Family

ID=15942399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55172460A Granted JPS5797133A (en) 1980-12-05 1980-12-05 Control system of data transfer

Country Status (2)

Country Link
US (1) US4603383A (OSRAM)
JP (1) JPS5797133A (OSRAM)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57161962A (en) * 1981-03-31 1982-10-05 Hitachi Ltd Communicating method between processors
US4812973A (en) * 1984-02-29 1989-03-14 Kabushiki Kaisha Toshiba Multiprocessor system and control method therefor
JPS60237566A (ja) * 1984-05-10 1985-11-26 Oki Electric Ind Co Ltd プロセツサ間通信方式
JPS6280755A (ja) * 1985-10-04 1987-04-14 Minolta Camera Co Ltd デ−タ伝送制御方式
US5283907A (en) * 1986-05-20 1994-02-01 Robert Bosch Gmbh Process for safeguarding transfer of data from a temporary part into a main part of a non-volatile memory
JPH01140368A (ja) * 1987-11-27 1989-06-01 Tokyo Electric Power Co Inc:The サイクリックマルチプロセッサシステム
US4875157A (en) * 1987-03-18 1989-10-17 International Telesystems Corporation Alternate memory addressing for information storage and retrieval
JPH01501660A (ja) * 1987-06-18 1989-06-08 ユニシス・コーポレーシヨン コンピユータ間通信制御装置及びその方法
US5212795A (en) * 1988-10-11 1993-05-18 California Institute Of Technology Programmable DMA controller
US5524255A (en) * 1989-12-29 1996-06-04 Cray Research, Inc. Method and apparatus for accessing global registers in a multiprocessor system
DE4129809C2 (de) * 1991-01-28 2000-08-17 Bosch Gmbh Robert Mehrrechnersystem
WO1993009504A1 (en) * 1991-10-30 1993-05-13 I-Cube Design Systems Inc. Field programmable circuit board

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5837585B2 (ja) * 1975-09-30 1983-08-17 株式会社東芝 ケイサンキソウチ
JPS5296836A (en) * 1976-02-10 1977-08-15 Toshiba Corp Multiplex data processing system
US4041472A (en) * 1976-04-29 1977-08-09 Ncr Corporation Data processing internal communications system having plural time-shared intercommunication buses and inter-bus communication means
US4096571A (en) * 1976-09-08 1978-06-20 Codex Corporation System for resolving memory access conflicts among processors and minimizing processor waiting times for access to memory by comparing waiting times and breaking ties by an arbitrary priority ranking
JPS5384658A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Processing system for inter-processor communication
JPS547252A (en) * 1977-06-20 1979-01-19 Hitachi Ltd Program control system
US4204251A (en) * 1977-12-28 1980-05-20 Finn Brudevold Interconnection unit for multiple data processing systems
JPS5539908A (en) * 1978-08-26 1980-03-21 Hitachi Denshi Ltd Control system of multi-processor system
US4237534A (en) * 1978-11-13 1980-12-02 Motorola, Inc. Bus arbiter
US4263649A (en) * 1979-01-05 1981-04-21 Mohawk Data Sciences Corp. Computer system with two busses
US4314335A (en) * 1980-02-06 1982-02-02 The Perkin-Elmer Corporation Multilevel priority arbiter

Also Published As

Publication number Publication date
US4603383A (en) 1986-07-29
JPS5797133A (en) 1982-06-16

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