JPH0120782B2 - - Google Patents
Info
- Publication number
- JPH0120782B2 JPH0120782B2 JP25477484A JP25477484A JPH0120782B2 JP H0120782 B2 JPH0120782 B2 JP H0120782B2 JP 25477484 A JP25477484 A JP 25477484A JP 25477484 A JP25477484 A JP 25477484A JP H0120782 B2 JPH0120782 B2 JP H0120782B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- dma
- data
- data transfer
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015654 memory Effects 0.000 claims description 35
- 230000004044 response Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 2
- MHABMANUFPZXEB-UHFFFAOYSA-N O-demethyl-aloesaponarin I Natural products O=C1C2=CC=CC(O)=C2C(=O)C2=C1C=C(O)C(C(O)=O)=C2C MHABMANUFPZXEB-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- XEULPLUJSUSGMX-UHFFFAOYSA-N 1-(7-methoxy-1,3-benzodioxol-5-yl)-n-methylpropan-2-amine Chemical compound COC1=CC(CC(C)NC)=CC2=C1OCO2 XEULPLUJSUSGMX-UHFFFAOYSA-N 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
- G06F13/285—Halt processor DMA
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25477484A JPS61133460A (ja) | 1984-11-30 | 1984-11-30 | メモリ間のデ−タ転送におけるダイレクト・メモリ・アクセス実行方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25477484A JPS61133460A (ja) | 1984-11-30 | 1984-11-30 | メモリ間のデ−タ転送におけるダイレクト・メモリ・アクセス実行方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61133460A JPS61133460A (ja) | 1986-06-20 |
| JPH0120782B2 true JPH0120782B2 (US20020051482A1-20020502-M00057.png) | 1989-04-18 |
Family
ID=17269693
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25477484A Granted JPS61133460A (ja) | 1984-11-30 | 1984-11-30 | メモリ間のデ−タ転送におけるダイレクト・メモリ・アクセス実行方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61133460A (US20020051482A1-20020502-M00057.png) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01258163A (ja) * | 1988-04-08 | 1989-10-16 | Fujitsu Ltd | ダイレクトメモリアクセス制御装置 |
-
1984
- 1984-11-30 JP JP25477484A patent/JPS61133460A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61133460A (ja) | 1986-06-20 |
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