JP7594914B2 - 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル - Google Patents

基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル Download PDF

Info

Publication number
JP7594914B2
JP7594914B2 JP2020558311A JP2020558311A JP7594914B2 JP 7594914 B2 JP7594914 B2 JP 7594914B2 JP 2020558311 A JP2020558311 A JP 2020558311A JP 2020558311 A JP2020558311 A JP 2020558311A JP 7594914 B2 JP7594914 B2 JP 7594914B2
Authority
JP
Japan
Prior art keywords
processing
unit
data
substrate
conditions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020558311A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2020105517A1 (ja
Inventor
剛 下青木
裕一朗 桾本
佳志 濱田
隆史 羽山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of JPWO2020105517A1 publication Critical patent/JPWO2020105517A1/ja
Priority to JP2023175816A priority Critical patent/JP7699180B2/ja
Application granted granted Critical
Publication of JP7594914B2 publication Critical patent/JP7594914B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0612—Production flow monitoring, e.g. for increasing throughput
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/12—Computing arrangements based on biological models using genetic models
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Biophysics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Data Mining & Analysis (AREA)
  • Molecular Biology (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Biomedical Technology (AREA)
  • Computational Linguistics (AREA)
  • Mathematical Physics (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Biology (AREA)
  • Bioinformatics & Computational Biology (AREA)
  • Genetics & Genomics (AREA)
  • Bioinformatics & Cheminformatics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Automation & Control Theory (AREA)
  • Coating Apparatus (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
JP2020558311A 2018-11-21 2019-11-12 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル Active JP7594914B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023175816A JP7699180B2 (ja) 2018-11-21 2023-10-11 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2018218375 2018-11-21
JP2018218375 2018-11-21
PCT/JP2019/044429 WO2020105517A1 (ja) 2018-11-21 2019-11-12 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2023175816A Division JP7699180B2 (ja) 2018-11-21 2023-10-11 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル

Publications (2)

Publication Number Publication Date
JPWO2020105517A1 JPWO2020105517A1 (ja) 2021-09-30
JP7594914B2 true JP7594914B2 (ja) 2024-12-05

Family

ID=70773628

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2020558311A Active JP7594914B2 (ja) 2018-11-21 2019-11-12 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル
JP2023175816A Active JP7699180B2 (ja) 2018-11-21 2023-10-11 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2023175816A Active JP7699180B2 (ja) 2018-11-21 2023-10-11 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル

Country Status (5)

Country Link
JP (2) JP7594914B2 (https=)
KR (1) KR102826807B1 (https=)
CN (1) CN112997274B (https=)
TW (1) TWI830812B (https=)
WO (1) WO2020105517A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7542417B2 (ja) * 2019-12-27 2024-08-30 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置、基板処理方法、基板処理システム、及び学習用データの生成方法
JP7698502B2 (ja) * 2021-07-29 2025-06-25 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法及び基板処理装置
JP7808940B2 (ja) 2021-09-22 2026-01-30 株式会社Ｓｃｒｅｅｎホールディングス 学習装置、情報処理装置、基板処理装置、基板処理システム、学習方法、レシピ決定方法及び学習プログラム
US12443153B2 (en) 2021-09-24 2025-10-14 Onto Innovation Inc. Deep learning model in high-mix semiconductor manufacturing
US12278101B2 (en) * 2021-11-11 2025-04-15 Applied Materials, Inc. Coded substrate material identifier communication tool
JP7709930B2 (ja) 2022-02-18 2025-07-17 株式会社Ｓｃｒｅｅｎホールディングス 基板処理条件の設定方法、基板処理方法、基板処理条件の設定システム、及び、基板処理システム
JP2024165967A (ja) * 2023-05-18 2024-11-28 株式会社Ｓｃｒｅｅｎホールディングス 予測アルゴリズム生成装置、情報処理装置、基板処理装置、予測アルゴリズム生成方法、予測アルゴリズム生成プログラム、処理条件決定方法、処理条件決定プログラムおよび予測アルゴリズム
WO2025154410A1 (ja) * 2024-01-16 2025-07-24 パナソニックＩｐマネジメント株式会社 推定システム、推定方法、データ選定システム、及びデータ選定方法
JP2025184266A (ja) * 2024-06-06 2025-12-18 株式会社Ｓｃｒｅｅｎホールディングス 学習モデル生成方法、学習モデル生成装置および学習モデル生成プログラム
KR102850431B1 (ko) * 2024-07-31 2025-08-27 (주)동주 인공지능 알고리즘을 이용하여 도장 제품의 불량률을 제어하는 장치 및 시스템

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003234280A (ja) 2002-02-08 2003-08-22 Dainippon Screen Mfg Co Ltd 基板処理ユニットおよび基板処理装置
JP2003272986A (ja) 2002-03-14 2003-09-26 Dainippon Screen Mfg Co Ltd 基板処理装置
US20100081285A1 (en) 2008-09-30 2010-04-01 Tokyo Electron Limited Apparatus and Method for Improving Photoresist Properties
JP2012104732A (ja) 2010-11-12 2012-05-31 Tokyo Electron Ltd ノズルの位置調整方法、プログラム、コンピュータ記憶媒体及び塗布処理装置
JP2016178238A (ja) 2015-03-20 2016-10-06 東京エレクトロン株式会社 薬液供給装置の調整方法、記憶媒体及び薬液供給装置
WO2017143166A1 (en) 2016-02-19 2017-08-24 Tokyo Electron Limited Photo-sensitized chemically amplified resist (ps-car) model calibration
JP2018121045A (ja) 2017-01-26 2018-08-02 東京エレクトロン株式会社 塗布膜除去装置、塗布膜除去方法及び記憶媒体
JP2018137350A (ja) 2017-02-22 2018-08-30 東京エレクトロン株式会社 処理レシピの評価方法、記憶媒体、処理レシピ評価用の支援装置、及び液処理装置

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04131930U (ja) * 1991-05-28 1992-12-04 山形日本電気株式会社 フオトレジスト塗布装置
JP2007088485A (ja) * 2001-12-25 2007-04-05 Tokyo Electron Ltd 基板処理装置及び基板処理方法
US7508034B2 (en) * 2002-09-25 2009-03-24 Sharp Kabushiki Kaisha Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device
US8050900B2 (en) * 2003-09-30 2011-11-01 Tokyo Electron Limited System and method for using first-principles simulation to provide virtual sensors that facilitate a semiconductor manufacturing process
KR100598296B1 (ko) * 2004-06-08 2006-07-07 동부일렉트로닉스 주식회사 감광막 패턴 형성 방법
JP4990548B2 (ja) * 2006-04-07 2012-08-01 株式会社日立製作所 半導体装置の製造方法
JP2007317068A (ja) * 2006-05-29 2007-12-06 Osaka Prefecture Univ リコメンド装置およびリコメンドシステム
JP4464979B2 (ja) * 2007-03-05 2010-05-19 東京エレクトロン株式会社 処理システム、処理方法、及び、プログラム
KR100897351B1 (ko) * 2007-08-31 2009-05-15 세메스 주식회사 기판 현상 방법 및 장치
US7967995B2 (en) * 2008-03-31 2011-06-28 Tokyo Electron Limited Multi-layer/multi-input/multi-output (MLMIMO) models and method for using
JP2010034180A (ja) * 2008-07-28 2010-02-12 Toshiba Corp 半導体製造装置の制御方法および半導体装置の製造方法
JP2011071296A (ja) * 2009-09-25 2011-04-07 Sharp Corp 特性予測装置、特性予測方法、特性予測プログラムおよびプログラム記録媒体
CN102033423B (zh) * 2009-09-28 2013-05-29 中芯国际集成电路制造(上海)有限公司 用于校准光刻工具的装置及方法
JP5336441B2 (ja) * 2010-08-24 2013-11-06 東京エレクトロン株式会社 液処理装置及び液処理方法
US9075318B2 (en) * 2012-03-07 2015-07-07 Tokyo Electron Limited Sequential stage mixing for a resist batch strip process
JP5739841B2 (ja) * 2012-06-13 2015-06-24 株式会社東芝 電子デバイスの生産管理装置、生産管理システム及び生産管理プログラム
JP6352230B2 (ja) 2015-10-09 2018-07-04 東京エレクトロン株式会社 基板処理方法、基板処理装置及び記録媒体
JP6584352B2 (ja) * 2016-03-24 2019-10-02 東京エレクトロン株式会社 制御装置、基板処理システム、基板処理方法及びプログラム
JP6541599B2 (ja) * 2016-03-28 2019-07-10 東京エレクトロン株式会社 制御装置、基板処理システム、基板処理方法及びプログラム
EP3291007A1 (en) * 2016-08-30 2018-03-07 ASML Netherlands B.V. Patterning stack optimization

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003234280A (ja) 2002-02-08 2003-08-22 Dainippon Screen Mfg Co Ltd 基板処理ユニットおよび基板処理装置
JP2003272986A (ja) 2002-03-14 2003-09-26 Dainippon Screen Mfg Co Ltd 基板処理装置
US20100081285A1 (en) 2008-09-30 2010-04-01 Tokyo Electron Limited Apparatus and Method for Improving Photoresist Properties
JP2012104732A (ja) 2010-11-12 2012-05-31 Tokyo Electron Ltd ノズルの位置調整方法、プログラム、コンピュータ記憶媒体及び塗布処理装置
JP2016178238A (ja) 2015-03-20 2016-10-06 東京エレクトロン株式会社 薬液供給装置の調整方法、記憶媒体及び薬液供給装置
WO2017143166A1 (en) 2016-02-19 2017-08-24 Tokyo Electron Limited Photo-sensitized chemically amplified resist (ps-car) model calibration
JP2018121045A (ja) 2017-01-26 2018-08-02 東京エレクトロン株式会社 塗布膜除去装置、塗布膜除去方法及び記憶媒体
JP2018137350A (ja) 2017-02-22 2018-08-30 東京エレクトロン株式会社 処理レシピの評価方法、記憶媒体、処理レシピ評価用の支援装置、及び液処理装置

Also Published As

Publication number Publication date
CN112997274A (zh) 2021-06-18
CN112997274B (zh) 2024-08-30
KR20210092238A (ko) 2021-07-23
KR102826807B1 (ko) 2025-07-01
TW202024942A (zh) 2020-07-01
JP7699180B2 (ja) 2025-06-26
WO2020105517A1 (ja) 2020-05-28
TWI830812B (zh) 2024-02-01
JPWO2020105517A1 (ja) 2021-09-30
JP2023171555A (ja) 2023-12-01

Similar Documents

Publication Publication Date Title
JP7699180B2 (ja) 基板処理の条件設定支援方法、基板処理システム、記憶媒体及び学習モデル
TWI859240B (zh) 基板檢查系統、基板檢查方法及記錄媒體
JP7612922B2 (ja) 基板処理装置、基板処理方法及び記憶媒体
JP7579747B2 (ja) 基板処理方法、記憶媒体、及び基板処理装置
US12442635B2 (en) Substrate processing apparatus, substrate processing method, and storage medium
TWI862768B (zh) 基板處理方法、記錄媒體及基板處理裝置
US12406350B2 (en) Estimation model creation device, estimation model creation method, and storage medium
JP7425700B2 (ja) 形状特性値推定装置、形状特性値推定方法、及び記憶媒体
JP2024172963A (ja) 形状特性値推定装置、形状特性値推定方法、及び記憶媒体
TW202544889A (zh) 條件設定支援方法、記錄媒體及條件設定支援裝置
JP7730985B2 (ja) 塗布処理方法、記憶媒体、及び塗布処理装置
JP2024027989A (ja) 特徴量推定方法、推定プログラム、及び、特徴量推定装置

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20210507

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20211214

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20220204

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20220411

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20220712

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20220901

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221104

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230131

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20230322

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20230711

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20241125

R150 Certificate of patent or registration of utility model

Ref document number: 7594914

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150