JP7561083B2 - 配線基板 - Google Patents

配線基板 Download PDF

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Publication number
JP7561083B2
JP7561083B2 JP2021071065A JP2021071065A JP7561083B2 JP 7561083 B2 JP7561083 B2 JP 7561083B2 JP 2021071065 A JP2021071065 A JP 2021071065A JP 2021071065 A JP2021071065 A JP 2021071065A JP 7561083 B2 JP7561083 B2 JP 7561083B2
Authority
JP
Japan
Prior art keywords
wiring
layer
metal layer
wiring board
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2021071065A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022165642A (ja
JP2022165642A5 (enExample
Inventor
憲助 松橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2021071065A priority Critical patent/JP7561083B2/ja
Priority to US18/264,704 priority patent/US12408276B2/en
Priority to EP22791615.2A priority patent/EP4329436A4/en
Priority to PCT/JP2022/017319 priority patent/WO2022224841A1/ja
Priority to CN202280013239.5A priority patent/CN116868696A/zh
Publication of JP2022165642A publication Critical patent/JP2022165642A/ja
Publication of JP2022165642A5 publication Critical patent/JP2022165642A5/ja
Application granted granted Critical
Publication of JP7561083B2 publication Critical patent/JP7561083B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2021071065A 2021-04-20 2021-04-20 配線基板 Active JP7561083B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2021071065A JP7561083B2 (ja) 2021-04-20 2021-04-20 配線基板
US18/264,704 US12408276B2 (en) 2021-04-20 2022-04-08 Wiring substrate
EP22791615.2A EP4329436A4 (en) 2021-04-20 2022-04-08 Wiring substrate
PCT/JP2022/017319 WO2022224841A1 (ja) 2021-04-20 2022-04-08 配線基板
CN202280013239.5A CN116868696A (zh) 2021-04-20 2022-04-08 布线基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2021071065A JP7561083B2 (ja) 2021-04-20 2021-04-20 配線基板

Publications (3)

Publication Number Publication Date
JP2022165642A JP2022165642A (ja) 2022-11-01
JP2022165642A5 JP2022165642A5 (enExample) 2023-05-15
JP7561083B2 true JP7561083B2 (ja) 2024-10-03

Family

ID=83722943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021071065A Active JP7561083B2 (ja) 2021-04-20 2021-04-20 配線基板

Country Status (5)

Country Link
US (1) US12408276B2 (enExample)
EP (1) EP4329436A4 (enExample)
JP (1) JP7561083B2 (enExample)
CN (1) CN116868696A (enExample)
WO (1) WO2022224841A1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI856847B (zh) * 2023-10-19 2024-09-21 矽品精密工業股份有限公司 基板結構及其製法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008091560A (ja) 2006-09-29 2008-04-17 Kyocera Corp 配線基板、多層配線基板及び電子装置、並びにこれらの製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63224392A (ja) * 1987-03-13 1988-09-19 日本メクトロン株式会社 多層プリント配線板およびその加工法
JP3210838B2 (ja) 1995-07-04 2001-09-25 京セラ株式会社 半導体素子収納用パッケージの製造方法
US7378936B2 (en) * 2005-05-23 2008-05-27 Tektronix, Inc. Circuit element with laser trimmed component
TWI305127B (en) * 2006-10-13 2009-01-01 Phoenix Prec Technology Corp Circuit board structure capable of performing electrica tests and fabrication method thereof
JP2015082645A (ja) * 2013-10-24 2015-04-27 イビデン株式会社 フレックスリジッド配線板及びフレックスリジッド配線板の製造方法
JP2017032290A (ja) 2015-07-29 2017-02-09 セイコーエプソン株式会社 パッケージベース、パッケージベースの製造方法、容器、電子デバイス、電子機器及び移動体
JP2019149442A (ja) * 2018-02-27 2019-09-05 株式会社デンソーウェーブ プリント配線の製造方法、及びプリント配線

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008091560A (ja) 2006-09-29 2008-04-17 Kyocera Corp 配線基板、多層配線基板及び電子装置、並びにこれらの製造方法

Also Published As

Publication number Publication date
EP4329436A1 (en) 2024-02-28
US12408276B2 (en) 2025-09-02
JP2022165642A (ja) 2022-11-01
WO2022224841A1 (ja) 2022-10-27
EP4329436A4 (en) 2025-06-25
US20240114629A1 (en) 2024-04-04
CN116868696A (zh) 2023-10-10

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