JP7357595B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- JP7357595B2 JP7357595B2 JP2020156028A JP2020156028A JP7357595B2 JP 7357595 B2 JP7357595 B2 JP 7357595B2 JP 2020156028 A JP2020156028 A JP 2020156028A JP 2020156028 A JP2020156028 A JP 2020156028A JP 7357595 B2 JP7357595 B2 JP 7357595B2
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- base plate
- slope
- semiconductor device
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000853 adhesive Substances 0.000 claims description 85
- 230000001070 adhesive effect Effects 0.000 claims description 85
- 230000002093 peripheral effect Effects 0.000 claims description 29
- 229920005989 resin Polymers 0.000 claims description 13
- 239000011347 resin Substances 0.000 claims description 13
- 238000007789 sealing Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000005520 cutting process Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 2
- 238000005304 joining Methods 0.000 claims 1
- 238000012986 modification Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 8
- 238000003892 spreading Methods 0.000 description 8
- 238000009736 wetting Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 230000007423 decrease Effects 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
実施の形態1について、図面を用いて以下に説明する。図1は、実施の形態1に係る半導体装置の断面図である。図2は、実施の形態1に係る半導体装置が備えるベース板2とケース1との接合箇所の拡大断面図である。
次に、実施の形態2に係る半導体装置について説明する。図4は、実施の形態2に係る半導体装置の断面図である。なお、実施の形態2において、実施の形態1で説明したものと同一の構成要素については同一符号を付して説明は省略する。
Claims (8)
- ベース板と、
接着剤を介して、前記ベース板の周縁部に接合されるケースと、を備え、
前記ベース板の周縁部には、前記接着剤が塗布される塗布位置である窪みと、前記窪みから外周側または内周側に向かって下る斜面とが形成された、半導体装置。 - 前記窪みは、前記ベース板の上面に設けられ、
前記斜面は、前記窪みから外周側に向かって下るように形成された、請求項1に記載の半導体装置。 - 前記ベース板の周縁部は、前記ベース板の中央部よりも上方に突出し、
前記斜面は、前記窪みから内周側に向かって下るように形成された、請求項1に記載の半導体装置。 - 前記ベース板の周縁部は、前記ベース板の中央部よりも上方に突出し、
前記斜面は、前記窪みから外周側に向かって下るように形成された第1斜面と、前記窪みから内周側に向かって下るように形成された第2斜面とを含む、請求項1に記載の半導体装置。 - 前記ケースにおける前記窪みに対向する部分には、前記窪みに収容される突起が設けられた、請求項4に記載の半導体装置。
- 前記斜面の傾斜角は、45°以上60°以下である、請求項1から請求項5のいずれか1項に記載の半導体装置。
- 請求項1から請求項6のいずれか1項に記載の半導体装置を製造する半導体装置の製造方法であって、
前記接着剤の温度が25℃の場合、前記接着剤の粘度は25Pa・s以上であり、前記接着剤の温度が50℃以上の場合、前記接着剤の粘度は10Pa・s以下であり、
(a)前記接着剤の温度を25℃にして前記ベース板の前記窪みに前記接着剤を塗布し、前記接着剤を介して、前記ケースを前記ベース板の周縁部に接合する工程と、
(b)前記ケース内に充填された封止樹脂の硬化時に、50℃以上に昇温された前記接着剤を前記窪みから前記斜面を伝って下側に濡れ広がらせる工程と、
を備えた、半導体装置の製造方法。 - 前記窪みと前記斜面は、プレス加工または切削加工により形成された、請求項7に記載の半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020156028A JP7357595B2 (ja) | 2020-09-17 | 2020-09-17 | 半導体装置および半導体装置の製造方法 |
US17/341,518 US11640953B2 (en) | 2020-09-17 | 2021-06-08 | Semiconductor device and method of manufacturing semiconductor device |
DE102021120887.4A DE102021120887B4 (de) | 2020-09-17 | 2021-08-11 | Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung |
CN202111060852.6A CN114203644A (zh) | 2020-09-17 | 2021-09-10 | 半导体装置及半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020156028A JP7357595B2 (ja) | 2020-09-17 | 2020-09-17 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2022049804A JP2022049804A (ja) | 2022-03-30 |
JP7357595B2 true JP7357595B2 (ja) | 2023-10-06 |
Family
ID=80351565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020156028A Active JP7357595B2 (ja) | 2020-09-17 | 2020-09-17 | 半導体装置および半導体装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US11640953B2 (ja) |
JP (1) | JP7357595B2 (ja) |
CN (1) | CN114203644A (ja) |
DE (1) | DE102021120887B4 (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5720153B2 (ja) | 2010-06-03 | 2015-05-20 | 三星エスディアイ株式会社Samsung SDI Co.,Ltd. | 二次電池及び二次電池の電解液注入方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19755734A1 (de) | 1997-12-15 | 1999-06-24 | Siemens Ag | Verfahren zur Herstellung eines oberflächenmontierbaren optoelektronischen Bauelementes |
JP2011054794A (ja) * | 2009-09-02 | 2011-03-17 | Panasonic Corp | 光学デバイス及びその製造方法 |
US8836100B2 (en) * | 2009-12-01 | 2014-09-16 | Cisco Technology, Inc. | Slotted configuration for optimized placement of micro-components using adhesive bonding |
JP2013026506A (ja) | 2011-07-22 | 2013-02-04 | Kyocera Corp | 電子部品収納用パッケージおよび電子装置 |
KR102076044B1 (ko) | 2013-05-16 | 2020-02-11 | 삼성전자주식회사 | 반도체 패키지 장치 |
-
2020
- 2020-09-17 JP JP2020156028A patent/JP7357595B2/ja active Active
-
2021
- 2021-06-08 US US17/341,518 patent/US11640953B2/en active Active
- 2021-08-11 DE DE102021120887.4A patent/DE102021120887B4/de active Active
- 2021-09-10 CN CN202111060852.6A patent/CN114203644A/zh active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5720153B2 (ja) | 2010-06-03 | 2015-05-20 | 三星エスディアイ株式会社Samsung SDI Co.,Ltd. | 二次電池及び二次電池の電解液注入方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2022049804A (ja) | 2022-03-30 |
US11640953B2 (en) | 2023-05-02 |
CN114203644A (zh) | 2022-03-18 |
US20220084983A1 (en) | 2022-03-17 |
DE102021120887A1 (de) | 2022-03-17 |
DE102021120887B4 (de) | 2024-01-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10825758B2 (en) | Semiconductor device | |
US7834442B2 (en) | Electronic package method and structure with cure-melt hierarchy | |
TWI255532B (en) | Flip-chip ball grid array semiconductor package with heat-dissipating device and method for fabricating the same | |
TWI464833B (zh) | 經熱增強之薄型半導體封裝件 | |
KR101643332B1 (ko) | 초음파 웰딩을 이용한 클립 본딩 반도체 칩 패키지 및 그 제조 방법 | |
CN104779217A (zh) | 具有翘曲控制结构的半导体器件封装件 | |
JP2003124406A (ja) | 半導体装置 | |
JP2019012755A (ja) | 半導体装置の製造方法および半導体装置 | |
JP2006100752A (ja) | 回路装置およびその製造方法 | |
JP2006261519A (ja) | 半導体装置及びその製造方法 | |
JP7357595B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2002329804A (ja) | 半導体装置 | |
TW201003864A (en) | Chip package structure | |
JP4144553B2 (ja) | 半導体装置の製造方法 | |
JP4641423B2 (ja) | 半導体装置およびその製造方法 | |
JP3022910B2 (ja) | 半導体装置の製造方法 | |
US20220344297A1 (en) | Semiconductor package inhibiting viscous material spread | |
KR100571273B1 (ko) | 반도체패키지 및 그 제조 방법 | |
JP3807502B2 (ja) | 半導体装置の製造方法 | |
JP2001250843A (ja) | 半導体素子及び半導体素子製造方法 | |
JPH11224918A (ja) | 半導体装置及びその製造方法 | |
JP2009246079A (ja) | 半導体パッケージおよびその製造方法 | |
JP2008112767A (ja) | 半導体装置とその製造方法および半導体製造装置 | |
KR101333398B1 (ko) | 반도체 디바이스 및 그 제조 방법 | |
JP2005203557A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20221025 |
|
TRDD | Decision of grant or rejection written | ||
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20230823 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20230829 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20230926 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7357595 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |