JP7222666B2 - 多層基板 - Google Patents
多層基板 Download PDFInfo
- Publication number
- JP7222666B2 JP7222666B2 JP2018214108A JP2018214108A JP7222666B2 JP 7222666 B2 JP7222666 B2 JP 7222666B2 JP 2018214108 A JP2018214108 A JP 2018214108A JP 2018214108 A JP2018214108 A JP 2018214108A JP 7222666 B2 JP7222666 B2 JP 7222666B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- layer
- multilayer substrate
- brittle material
- glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
- H10W70/692—Ceramics or glasses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018214108A JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
| US16/662,440 US11152291B2 (en) | 2018-11-14 | 2019-10-24 | Multilayer substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018214108A JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020087938A JP2020087938A (ja) | 2020-06-04 |
| JP2020087938A5 JP2020087938A5 (https=) | 2021-04-30 |
| JP7222666B2 true JP7222666B2 (ja) | 2023-02-15 |
Family
ID=70550829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018214108A Active JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US11152291B2 (https=) |
| JP (1) | JP7222666B2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12080632B2 (en) * | 2021-09-29 | 2024-09-03 | Advanced Micro Devices, Inc. | Glass core package substrates |
| US20230207406A1 (en) * | 2021-12-24 | 2023-06-29 | Intel Corporation | Ultra low loss and high-density routing between cores |
| US20250254790A1 (en) * | 2022-03-30 | 2025-08-07 | Sony Semiconductor Solutions Corporation | Glass circuit board and manufacturing method thereof and imaging device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001267746A (ja) | 2000-03-17 | 2001-09-28 | Hitachi Ltd | 多層配線基板 |
| JP2015012013A (ja) | 2013-06-26 | 2015-01-19 | 京セラ株式会社 | 多層配線基板およびそれを備えたプローブカード用基板 |
| JP2017107934A (ja) | 2015-12-08 | 2017-06-15 | 富士通株式会社 | 回路基板、電子機器、及び回路基板の製造方法 |
| JP2018148126A (ja) | 2017-03-08 | 2018-09-20 | 日本特殊陶業株式会社 | 配線基板、及び配線基板の製造方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6216598A (ja) * | 1985-07-15 | 1987-01-24 | 富士通株式会社 | 多層セラミツク回路基板の接続ピン形成方法 |
| JPH02142198A (ja) * | 1988-11-22 | 1990-05-31 | Matsushita Electric Works Ltd | セラミック多層配線板の製造方法 |
| WO2011125546A1 (ja) | 2010-03-31 | 2011-10-13 | 京セラ株式会社 | インターポーザー及びそれを用いた電子装置 |
| JPWO2013042750A1 (ja) | 2011-09-22 | 2015-03-26 | 日立化成株式会社 | 積層体、積層板、多層積層板、プリント配線板及び積層板の製造方法 |
| US20130112459A1 (en) | 2011-09-22 | 2013-05-09 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
| US20130180769A1 (en) * | 2011-09-22 | 2013-07-18 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
| JP2019079856A (ja) * | 2017-10-20 | 2019-05-23 | トヨタ自動車株式会社 | 多層基板の製造方法 |
| JP2019140226A (ja) * | 2018-02-09 | 2019-08-22 | 富士通株式会社 | 回路基板、回路基板の製造方法及び電子装置 |
-
2018
- 2018-11-14 JP JP2018214108A patent/JP7222666B2/ja active Active
-
2019
- 2019-10-24 US US16/662,440 patent/US11152291B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001267746A (ja) | 2000-03-17 | 2001-09-28 | Hitachi Ltd | 多層配線基板 |
| JP2015012013A (ja) | 2013-06-26 | 2015-01-19 | 京セラ株式会社 | 多層配線基板およびそれを備えたプローブカード用基板 |
| JP2017107934A (ja) | 2015-12-08 | 2017-06-15 | 富士通株式会社 | 回路基板、電子機器、及び回路基板の製造方法 |
| JP2018148126A (ja) | 2017-03-08 | 2018-09-20 | 日本特殊陶業株式会社 | 配線基板、及び配線基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US11152291B2 (en) | 2021-10-19 |
| JP2020087938A (ja) | 2020-06-04 |
| US20200152562A1 (en) | 2020-05-14 |
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