JP7214758B2 - ストレージデバイスおよびストレージシステム - Google Patents

ストレージデバイスおよびストレージシステム Download PDF

Info

Publication number
JP7214758B2
JP7214758B2 JP2020567999A JP2020567999A JP7214758B2 JP 7214758 B2 JP7214758 B2 JP 7214758B2 JP 2020567999 A JP2020567999 A JP 2020567999A JP 2020567999 A JP2020567999 A JP 2020567999A JP 7214758 B2 JP7214758 B2 JP 7214758B2
Authority
JP
Japan
Prior art keywords
storage
identification information
memory area
storage medium
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020567999A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2021095252A1 (https=
JPWO2021095252A5 (https=
Inventor
康人 吉水
崇 福島
達郎 人見
新 井上
正幸 三浦
伸一 菅野
俊雄 藤澤
圭祐 中塚
朋也 佐貫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kioxia Corp
Original Assignee
Kioxia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kioxia Corp filed Critical Kioxia Corp
Publication of JPWO2021095252A1 publication Critical patent/JPWO2021095252A1/ja
Publication of JPWO2021095252A5 publication Critical patent/JPWO2021095252A5/ja
Application granted granted Critical
Publication of JP7214758B2 publication Critical patent/JP7214758B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2868—Complete testing stations; systems; procedures; software aspects
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318511—Wafer Test
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0688—Non-volatile semiconductor memory arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56016—Apparatus features
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5602—Interface to device under test

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Environmental & Geological Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2020567999A 2019-11-15 2019-11-15 ストレージデバイスおよびストレージシステム Active JP7214758B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/044933 WO2021095252A1 (ja) 2019-11-15 2019-11-15 ストレージデバイスおよびストレージシステム

Publications (3)

Publication Number Publication Date
JPWO2021095252A1 JPWO2021095252A1 (https=) 2021-05-20
JPWO2021095252A5 JPWO2021095252A5 (https=) 2022-03-30
JP7214758B2 true JP7214758B2 (ja) 2023-01-30

Family

ID=75908679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020567999A Active JP7214758B2 (ja) 2019-11-15 2019-11-15 ストレージデバイスおよびストレージシステム

Country Status (7)

Country Link
US (1) US11422712B2 (https=)
EP (1) EP4060720A4 (https=)
JP (1) JP7214758B2 (https=)
CN (1) CN113133325B (https=)
SG (1) SG11202012541XA (https=)
TW (1) TWI769571B (https=)
WO (1) WO2021095252A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021095232A1 (ja) * 2019-11-15 2021-05-20 キオクシア株式会社 ストレージシステム及びウェハ
DE112021007357T5 (de) * 2021-03-23 2024-03-21 Kioxia Corporation Kassettengehäuse, sondenvorrichtung, server-rack und lagersystem technisches gebiet
EP4318246A4 (en) 2021-03-23 2025-02-19 Kioxia Corporation STORAGE SYSTEM
TWI782589B (zh) * 2021-06-23 2022-11-01 力晶積成電子製造股份有限公司 晶圓搜尋方法及裝置
JP7585507B2 (ja) 2021-09-02 2024-11-18 キオクシア株式会社 ストレージシステム
CN114551296B (zh) * 2022-01-28 2023-02-28 弥费科技(上海)股份有限公司 分区管理方法、装置、计算机设备和存储介质
US20240319920A1 (en) * 2022-07-27 2024-09-26 SK Hynix Inc. Data coding device, memory controller, and storage device
CN118335167A (zh) * 2023-01-03 2024-07-12 长鑫存储技术有限公司 存储器及其测试方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000278632A (ja) 1999-03-23 2000-10-06 Toshiba Video Products Japan Kk 記録再生装置
JP2002042092A (ja) 2000-07-31 2002-02-08 Dainippon Printing Co Ltd 暗証コード照合機能をもった携帯型情報処理装置
JP2008107918A (ja) 2006-10-23 2008-05-08 Fujitsu Ltd 移動体識別管理システム、カードリーダおよび移動体識別管理方法
US20190227116A1 (en) 2018-01-23 2019-07-25 Texas Instruments Incorporated Wafer Probe Resumption of Die Testing

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2082354B (en) 1980-08-21 1984-04-11 Burroughs Corp Improvements in or relating to wafer-scale integrated circuits
JPS61297191A (ja) * 1985-06-27 1986-12-27 株式会社東芝 Ｉｃカ−ド
JPS63253494A (ja) * 1987-04-09 1988-10-20 Toshiba Corp 携帯可能電子装置
JPS6428863A (en) 1987-07-23 1989-01-31 Mitsubishi Electric Corp Semiconductor wafer
US5360747A (en) * 1993-06-10 1994-11-01 Xilinx, Inc. Method of reducing dice testing with on-chip identification
JPH11120305A (ja) * 1997-10-14 1999-04-30 Mitsubishi Electric Corp 非接触ｉｃカードシステム
JPH11251382A (ja) * 1998-02-26 1999-09-17 Hitachi Ltd 半導体集積回路装置
JP3430015B2 (ja) * 1998-05-20 2003-07-28 東京エレクトロン株式会社 信頼性試験システム
JP4234244B2 (ja) 1998-12-28 2009-03-04 富士通マイクロエレクトロニクス株式会社 ウエハーレベルパッケージ及びウエハーレベルパッケージを用いた半導体装置の製造方法
JP3980807B2 (ja) 2000-03-27 2007-09-26 株式会社東芝 半導体装置及び半導体モジュール
US6871307B2 (en) * 2001-10-10 2005-03-22 Tower Semiconductorltd. Efficient test structure for non-volatile memory and other semiconductor integrated circuits
JP2005228788A (ja) 2004-02-10 2005-08-25 Seiko Epson Corp ウエーハとプローブカードとの位置合わせ方法、プローブ検査方法及びプローブ検査装置
KR100618696B1 (ko) * 2004-04-28 2006-09-08 주식회사 하이닉스반도체 인식 정보를 갖는 메모리 장치
US7761773B2 (en) 2005-06-30 2010-07-20 Sigmatel, Inc. Semiconductor device including a unique identifier and error correction code
JP2007096190A (ja) 2005-09-30 2007-04-12 Seiko Epson Corp プローブカードの針先研磨方法、及びプローブ装置
US8272827B2 (en) 2005-11-07 2012-09-25 Bufano Michael L Reduced capacity carrier, transport, load port, buffer system
US7609561B2 (en) * 2006-01-18 2009-10-27 Apple Inc. Disabling faulty flash memory dies
KR100712561B1 (ko) * 2006-08-23 2007-05-02 삼성전자주식회사 웨이퍼 형태의 프로브 카드 및 그 제조방법과 웨이퍼형태의 프로브 카드를 구비한 반도체 검사장치
US9734086B2 (en) 2006-12-06 2017-08-15 Sandisk Technologies Llc Apparatus, system, and method for a device shared between multiple independent hosts
JP5374246B2 (ja) 2009-06-12 2013-12-25 学校法人慶應義塾 密封型半導体記録媒体及び密封型半導体記録装置
US8595415B2 (en) 2011-02-02 2013-11-26 Micron Technology, Inc. At least semi-autonomous modules in a memory system and methods
US8446772B2 (en) * 2011-08-04 2013-05-21 Sandisk Technologies Inc. Memory die self-disable if programmable element is not trusted
TWI451106B (zh) * 2012-03-26 2014-09-01 Silicon Motion Inc 晶圓測試系統及其測試方法
JP6223583B2 (ja) * 2014-09-01 2017-11-01 三菱電機株式会社 半導体装置、半導体チップおよび半導体チップの特性情報管理方法
US11175309B2 (en) * 2014-12-24 2021-11-16 Qualitau, Inc. Semi-automatic prober
JP2018037006A (ja) * 2016-09-02 2018-03-08 ルネサスエレクトロニクス株式会社 半導体製品品質管理システム、半導体製品品質管理方法、および自動車
US10366967B2 (en) 2017-07-24 2019-07-30 Cerebras Systems Inc. Apparatus and method for multi-die interconnection
JP7074454B2 (ja) 2017-10-30 2022-05-24 キオクシア株式会社 計算機システムおよび制御方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000278632A (ja) 1999-03-23 2000-10-06 Toshiba Video Products Japan Kk 記録再生装置
JP2002042092A (ja) 2000-07-31 2002-02-08 Dainippon Printing Co Ltd 暗証コード照合機能をもった携帯型情報処理装置
JP2008107918A (ja) 2006-10-23 2008-05-08 Fujitsu Ltd 移動体識別管理システム、カードリーダおよび移動体識別管理方法
US20190227116A1 (en) 2018-01-23 2019-07-25 Texas Instruments Incorporated Wafer Probe Resumption of Die Testing

Also Published As

Publication number Publication date
US20210149568A1 (en) 2021-05-20
WO2021095252A1 (ja) 2021-05-20
CN113133325B (zh) 2024-12-20
TW202135082A (zh) 2021-09-16
US11422712B2 (en) 2022-08-23
SG11202012541XA (en) 2021-06-29
EP4060720A4 (en) 2023-08-16
EP4060720A1 (en) 2022-09-21
JPWO2021095252A1 (https=) 2021-05-20
CN113133325A (zh) 2021-07-16
TWI769571B (zh) 2022-07-01

Similar Documents

Publication Publication Date Title
JP7214758B2 (ja) ストレージデバイスおよびストレージシステム
JP4079506B2 (ja) 不揮発性半導体メモリシステムの制御方法
JP4524309B2 (ja) フラッシュメモリ用のメモリコントローラ
KR20200018999A (ko) 블록의 상태에 따라 사용 여부를 결정하는 메모리 시스템 및 메모리 시스템의 동작 방법
KR20110107857A (ko) 솔리드 스테이트 메모리 포멧팅
KR20220001222A (ko) 베드 블록을 처리하는 메모리 시스템 및 동작 방법
KR102863282B1 (ko) 리드 동작을 수행하는 메모리 시스템 및 메모리 시스템의 동작방법
KR20200113992A (ko) 메모리 시스템의 복구 동작 중 비휘발성 메모리 오픈 블록의 셀 디스터브를 줄이는 방법 및 장치
US10884652B2 (en) Trim command recording method, memory control circuit unit and memory storage device
KR102831444B1 (ko) 데이터 저장 장치 및 동작 방법과, 이를 위한 컨트롤러
CN110806983A (zh) 存储器系统及其操作方法
CN100422962C (zh) 半导体存储装置
JP4460967B2 (ja) メモリカード、不揮発性半導体メモリ、及び半導体メモリの制御方法
CN111506257A (zh) 用于在存储器系统中传输映射信息的装置和方法
KR20220090020A (ko) 비휘발성 메모리 시스템이 생성한 메타데이터를 전송하는 장치 및 방법
CN114661224A (zh) 数据存储设备及其操作方法
KR20210030599A (ko) 데이터를 분산 리드할 수 있는 메모리 시스템 및 메모리 시스템의 동작방법
CN116795729A (zh) 存储器系统以及存储器系统的控制方法
KR20220103378A (ko) 메모리 시스템에 저장된 데이터를 처리하는 장치 및 방법
KR20220108342A (ko) 메모리 시스템 내 프리 블록을 확보하는 장치 및 방법
JP2007293917A (ja) メモリシステムの制御方法
US10606509B2 (en) Data storage device managing write tag, writing operation method thereof, and storage system including the same
US11593006B2 (en) Data storage apparatus and method for managing valid data based on bitmap table
CN102043724A (zh) 用于闪存的区块管理方法、控制器与存储系统
CN118140205A (zh) 用于早期命令取消的存储系统和方法

Legal Events

Date Code Title Description
A524 Written submission of copy of amendment under article 19 pct

Free format text: JAPANESE INTERMEDIATE CODE: A527

Effective date: 20201204

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20220113

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220113

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20221122

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221208

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20221220

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230118

R151 Written notification of patent or utility model registration

Ref document number: 7214758

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151