SG11202012541XA - Storage device and storage system - Google Patents
Storage device and storage systemInfo
- Publication number
- SG11202012541XA SG11202012541XA SG11202012541XA SG11202012541XA SG11202012541XA SG 11202012541X A SG11202012541X A SG 11202012541XA SG 11202012541X A SG11202012541X A SG 11202012541XA SG 11202012541X A SG11202012541X A SG 11202012541XA SG 11202012541X A SG11202012541X A SG 11202012541XA
- Authority
- SG
- Singapore
- Prior art keywords
- storage
- storage device
- storage system
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
- G01R31/318511—Wafer Test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56016—Apparatus features
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C2029/5602—Interface to device under test
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2019/044933 WO2021095252A1 (en) | 2019-11-15 | 2019-11-15 | Storage device and storage system |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11202012541XA true SG11202012541XA (en) | 2021-06-29 |
Family
ID=75908679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11202012541XA SG11202012541XA (en) | 2019-11-15 | 2019-11-15 | Storage device and storage system |
Country Status (7)
Country | Link |
---|---|
US (1) | US11422712B2 (en) |
EP (1) | EP4060720A4 (en) |
JP (1) | JP7214758B2 (en) |
CN (1) | CN113133325A (en) |
SG (1) | SG11202012541XA (en) |
TW (1) | TWI769571B (en) |
WO (1) | WO2021095252A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2021095232A1 (en) * | 2019-11-15 | 2021-05-20 | キオクシア株式会社 | Storage system and wafer |
CN116368474A (en) | 2021-03-23 | 2023-06-30 | 铠侠股份有限公司 | Crystal box shell, probe, server rack and storage system |
EP4318246A1 (en) | 2021-03-23 | 2024-02-07 | Kioxia Corporation | Storage system |
TWI782589B (en) * | 2021-06-23 | 2022-11-01 | 力晶積成電子製造股份有限公司 | Wafer searching method and device |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2082354B (en) | 1980-08-21 | 1984-04-11 | Burroughs Corp | Improvements in or relating to wafer-scale integrated circuits |
JPS61297191A (en) * | 1985-06-27 | 1986-12-27 | 株式会社東芝 | Integrated circuit card |
JPS63253494A (en) * | 1987-04-09 | 1988-10-20 | Toshiba Corp | Portable electronic equipment |
JPS6428863A (en) | 1987-07-23 | 1989-01-31 | Mitsubishi Electric Corp | Semiconductor wafer |
US5360747A (en) * | 1993-06-10 | 1994-11-01 | Xilinx, Inc. | Method of reducing dice testing with on-chip identification |
JPH11120305A (en) * | 1997-10-14 | 1999-04-30 | Mitsubishi Electric Corp | Noncontact ic card system |
JPH11251382A (en) * | 1998-02-26 | 1999-09-17 | Hitachi Ltd | Semiconductor integrated circuit device |
JP3430015B2 (en) * | 1998-05-20 | 2003-07-28 | 東京エレクトロン株式会社 | Reliability test system |
JP4234244B2 (en) | 1998-12-28 | 2009-03-04 | 富士通マイクロエレクトロニクス株式会社 | Wafer level package and semiconductor device manufacturing method using wafer level package |
JP2000278632A (en) * | 1999-03-23 | 2000-10-06 | Toshiba Video Products Japan Kk | Recording and reproducing device |
JP3980807B2 (en) | 2000-03-27 | 2007-09-26 | 株式会社東芝 | Semiconductor device and semiconductor module |
JP4489915B2 (en) * | 2000-07-31 | 2010-06-23 | 大日本印刷株式会社 | Portable information processing device with password verification function |
US6871307B2 (en) * | 2001-10-10 | 2005-03-22 | Tower Semiconductorltd. | Efficient test structure for non-volatile memory and other semiconductor integrated circuits |
JP2005228788A (en) | 2004-02-10 | 2005-08-25 | Seiko Epson Corp | Method of aligning wafer with probe card, probe inspecting method, and probe inspection device |
KR100618696B1 (en) * | 2004-04-28 | 2006-09-08 | 주식회사 하이닉스반도체 | Memory device including self-ID number |
US7761773B2 (en) | 2005-06-30 | 2010-07-20 | Sigmatel, Inc. | Semiconductor device including a unique identifier and error correction code |
JP2007096190A (en) | 2005-09-30 | 2007-04-12 | Seiko Epson Corp | Method for polishing needle point of probe card, and probe device |
US7609561B2 (en) * | 2006-01-18 | 2009-10-27 | Apple Inc. | Disabling faulty flash memory dies |
CN101578700B (en) | 2006-08-18 | 2012-11-14 | 布鲁克斯自动化公司 | Reduced capacity carrier, transport, load port, buffer system |
KR100712561B1 (en) * | 2006-08-23 | 2007-05-02 | 삼성전자주식회사 | Wafer type probe card and method for fabricating the same and semiconductor test apparatus having wafer type probe card |
JP2008107918A (en) * | 2006-10-23 | 2008-05-08 | Fujitsu Ltd | Mobile body identification managing system, card reader, and mobile body identification managing method |
KR20090087119A (en) | 2006-12-06 | 2009-08-14 | 퓨전 멀티시스템즈, 인크.(디비에이 퓨전-아이오) | Apparatus, system, and method for managing data in a storage device with an empty data token directive |
JP5374246B2 (en) | 2009-06-12 | 2013-12-25 | 学校法人慶應義塾 | Sealed semiconductor recording medium and sealed semiconductor recording device |
US8595415B2 (en) | 2011-02-02 | 2013-11-26 | Micron Technology, Inc. | At least semi-autonomous modules in a memory system and methods |
US8446772B2 (en) * | 2011-08-04 | 2013-05-21 | Sandisk Technologies Inc. | Memory die self-disable if programmable element is not trusted |
TWI451106B (en) * | 2012-03-26 | 2014-09-01 | Silicon Motion Inc | Wafer testing system and testing method thereof |
DE112014006917B4 (en) * | 2014-09-01 | 2020-06-10 | Mitsubishi Electric Corporation | Semiconductor device and semiconductor chip |
US11175309B2 (en) * | 2014-12-24 | 2021-11-16 | Qualitau, Inc. | Semi-automatic prober |
JP2018037006A (en) * | 2016-09-02 | 2018-03-08 | ルネサスエレクトロニクス株式会社 | Semiconductor product quality management system, semiconductor product quality management method, and automobile |
US10366967B2 (en) | 2017-07-24 | 2019-07-30 | Cerebras Systems Inc. | Apparatus and method for multi-die interconnection |
JP7074454B2 (en) | 2017-10-30 | 2022-05-24 | キオクシア株式会社 | Computer system and control method |
US10955468B2 (en) * | 2018-01-23 | 2021-03-23 | Texas Instruments Incorporated | Wafer probe resumption of die testing |
-
2019
- 2019-11-15 WO PCT/JP2019/044933 patent/WO2021095252A1/en unknown
- 2019-11-15 JP JP2020567999A patent/JP7214758B2/en active Active
- 2019-11-15 CN CN201980039444.7A patent/CN113133325A/en active Pending
- 2019-11-15 SG SG11202012541XA patent/SG11202012541XA/en unknown
- 2019-11-15 EP EP19932226.4A patent/EP4060720A4/en active Pending
-
2020
- 2020-11-03 TW TW109138174A patent/TWI769571B/en active
- 2020-12-14 US US17/121,024 patent/US11422712B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN113133325A (en) | 2021-07-16 |
JP7214758B2 (en) | 2023-01-30 |
EP4060720A4 (en) | 2023-08-16 |
TWI769571B (en) | 2022-07-01 |
US20210149568A1 (en) | 2021-05-20 |
TW202135082A (en) | 2021-09-16 |
US11422712B2 (en) | 2022-08-23 |
EP4060720A1 (en) | 2022-09-21 |
JPWO2021095252A1 (en) | 2021-05-20 |
WO2021095252A1 (en) | 2021-05-20 |
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