JP7147972B2 - ヘテロ接合バイポーラトランジスタおよびその作製方法 - Google Patents

ヘテロ接合バイポーラトランジスタおよびその作製方法 Download PDF

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Publication number
JP7147972B2
JP7147972B2 JP2021521646A JP2021521646A JP7147972B2 JP 7147972 B2 JP7147972 B2 JP 7147972B2 JP 2021521646 A JP2021521646 A JP 2021521646A JP 2021521646 A JP2021521646 A JP 2021521646A JP 7147972 B2 JP7147972 B2 JP 7147972B2
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Japan
Prior art keywords
layer
emitter
nitride semiconductor
collector
substrate
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Japanese (ja)
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JPWO2020240725A1 (https=
Inventor
拓也 星
佑樹 吉屋
悠太 白鳥
弘樹 杉山
実 井田
秀昭 松崎
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NTT Inc
NTT Inc USA
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Nippon Telegraph and Telephone Corp
NTT Inc USA
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H10D10/821—Vertical heterojunction BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H10D62/136—Emitter regions of BJTs of heterojunction BJTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137—Collector regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides

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  • Bipolar Transistors (AREA)
JP2021521646A 2019-05-29 2019-05-29 ヘテロ接合バイポーラトランジスタおよびその作製方法 Active JP7147972B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/021213 WO2020240725A1 (ja) 2019-05-29 2019-05-29 ヘテロ接合バイポーラトランジスタおよびその作製方法

Publications (2)

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JPWO2020240725A1 JPWO2020240725A1 (https=) 2020-12-03
JP7147972B2 true JP7147972B2 (ja) 2022-10-05

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JP2021521646A Active JP7147972B2 (ja) 2019-05-29 2019-05-29 ヘテロ接合バイポーラトランジスタおよびその作製方法

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US (1) US12142672B2 (https=)
JP (1) JP7147972B2 (https=)
WO (1) WO2020240725A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020004051B4 (de) * 2020-07-06 2022-04-07 Azur Space Solar Power Gmbh Vertikaler hochsperrender III-V Bipolartransistor
JP7677448B2 (ja) * 2021-11-16 2025-05-15 日本電信電話株式会社 バイポーラトランジスタ
CN116313786B (zh) * 2021-12-21 2026-03-17 西安唐晶量子科技有限公司 一种界面极性偏转的InGaP/GaAs异质结双极型晶体管及其制备方法
JP7632774B1 (ja) * 2024-06-24 2025-02-19 三菱電機株式会社 半導体装置の製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015618A1 (ja) 2003-08-12 2005-02-17 Nippon Telegraph And Telephone Corporation 窒化物半導体成長用基板
JP2008016615A (ja) 2006-07-05 2008-01-24 Matsushita Electric Ind Co Ltd バイポーラトランジスタ
JP2013191655A (ja) 2012-03-13 2013-09-26 Nippon Telegr & Teleph Corp <Ntt> ヘテロ接合バイポーラトランジスタおよびその製造方法
JP2015211182A (ja) 2014-04-30 2015-11-24 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法
JP2017139338A (ja) 2016-02-04 2017-08-10 株式会社パウデック ヘテロ接合バイポーラトランジスタおよび電気機器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005079417A (ja) * 2003-09-02 2005-03-24 Matsushita Electric Ind Co Ltd 半導体装置及びヘテロ接合バイポーラトランジスタ
JP5628681B2 (ja) * 2008-10-21 2014-11-19 ルネサスエレクトロニクス株式会社 バイポーラトランジスタ
CN105378904B (zh) * 2013-07-10 2017-09-05 株式会社村田制作所 半导体装置
JP2018010896A (ja) * 2016-07-11 2018-01-18 株式会社村田製作所 ヘテロ接合バイポーラトランジスタ

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015618A1 (ja) 2003-08-12 2005-02-17 Nippon Telegraph And Telephone Corporation 窒化物半導体成長用基板
JP2008016615A (ja) 2006-07-05 2008-01-24 Matsushita Electric Ind Co Ltd バイポーラトランジスタ
JP2013191655A (ja) 2012-03-13 2013-09-26 Nippon Telegr & Teleph Corp <Ntt> ヘテロ接合バイポーラトランジスタおよびその製造方法
JP2015211182A (ja) 2014-04-30 2015-11-24 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法
JP2017139338A (ja) 2016-02-04 2017-08-10 株式会社パウデック ヘテロ接合バイポーラトランジスタおよび電気機器

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WO2020240725A1 (ja) 2020-12-03
JPWO2020240725A1 (https=) 2020-12-03
US20220208998A1 (en) 2022-06-30
US12142672B2 (en) 2024-11-12

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