JP7117747B2 - 電子部品の製造方法 - Google Patents
電子部品の製造方法 Download PDFInfo
- Publication number
- JP7117747B2 JP7117747B2 JP2017101964A JP2017101964A JP7117747B2 JP 7117747 B2 JP7117747 B2 JP 7117747B2 JP 2017101964 A JP2017101964 A JP 2017101964A JP 2017101964 A JP2017101964 A JP 2017101964A JP 7117747 B2 JP7117747 B2 JP 7117747B2
- Authority
- JP
- Japan
- Prior art keywords
- plating layer
- plating
- layer
- copper
- nickel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4846—Connecting portions with multiple bonds on the same bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Electroplating Methods And Accessories (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
- Electrodes Of Semiconductors (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Chemically Coating (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016192095 | 2016-09-29 | ||
JP2016192095 | 2016-09-29 | ||
JP2017061686 | 2017-03-27 | ||
JP2017061686 | 2017-03-27 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2018157173A JP2018157173A (ja) | 2018-10-04 |
JP2018157173A5 JP2018157173A5 (enrdf_load_stackoverflow) | 2020-07-02 |
JP7117747B2 true JP7117747B2 (ja) | 2022-08-15 |
Family
ID=63717420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017101964A Active JP7117747B2 (ja) | 2016-09-29 | 2017-05-23 | 電子部品の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP7117747B2 (enrdf_load_stackoverflow) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109504956A (zh) * | 2018-11-02 | 2019-03-22 | 江西华度电子新材料有限公司 | 一种提高热管、热板吸液芯表面抗氧化的处理方法 |
US20210387290A1 (en) * | 2018-12-17 | 2021-12-16 | Heraeus Precious Metals North America Conshohocken Llc | Process for forming an electric heater |
CN110644025A (zh) * | 2019-11-12 | 2020-01-03 | 长沙理工大学 | 一种超薄镍铜合金箔及其制备方法 |
KR102325114B1 (ko) * | 2019-12-06 | 2021-11-11 | 제엠제코(주) | 반도체 패키지의 제조 방법 |
CN115767948B (zh) * | 2022-11-14 | 2024-04-02 | 北京自动化控制设备研究所 | Mems惯性系统高密度低应力集成方法 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006066716A (ja) | 2004-08-27 | 2006-03-09 | Fuji Electric Holdings Co Ltd | 半導体装置 |
JP2008270353A (ja) | 2007-04-17 | 2008-11-06 | Toyota Central R&D Labs Inc | パワー半導体モジュール |
JP2009108394A (ja) | 2007-10-31 | 2009-05-21 | Meltex Inc | ニッケルで形成された被めっき表面の前処理に用いる活性化処理液及びその活性化処理液を用いた前処理方法 |
JP2010040691A (ja) | 2008-08-04 | 2010-02-18 | Ebara Corp | 鉛フリーバンプ形成方法 |
WO2010032780A1 (ja) | 2008-09-18 | 2010-03-25 | 古河電気工業株式会社 | 金属張積層体、回路基板及び電子部品 |
JP2011134925A (ja) | 2009-12-25 | 2011-07-07 | Sanken Electric Co Ltd | 電極構造 |
JP2013057127A (ja) | 2012-11-05 | 2013-03-28 | Jcu Corp | 酸性電解銅めっき液 |
JP2016092064A (ja) | 2014-10-30 | 2016-05-23 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
JP2016146402A (ja) | 2015-02-06 | 2016-08-12 | 凸版印刷株式会社 | 配線基板、半導体装置及び半導体装置の製造方法 |
-
2017
- 2017-05-23 JP JP2017101964A patent/JP7117747B2/ja active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006066716A (ja) | 2004-08-27 | 2006-03-09 | Fuji Electric Holdings Co Ltd | 半導体装置 |
JP2008270353A (ja) | 2007-04-17 | 2008-11-06 | Toyota Central R&D Labs Inc | パワー半導体モジュール |
JP2009108394A (ja) | 2007-10-31 | 2009-05-21 | Meltex Inc | ニッケルで形成された被めっき表面の前処理に用いる活性化処理液及びその活性化処理液を用いた前処理方法 |
JP2010040691A (ja) | 2008-08-04 | 2010-02-18 | Ebara Corp | 鉛フリーバンプ形成方法 |
WO2010032780A1 (ja) | 2008-09-18 | 2010-03-25 | 古河電気工業株式会社 | 金属張積層体、回路基板及び電子部品 |
JP2011134925A (ja) | 2009-12-25 | 2011-07-07 | Sanken Electric Co Ltd | 電極構造 |
JP2013057127A (ja) | 2012-11-05 | 2013-03-28 | Jcu Corp | 酸性電解銅めっき液 |
JP2016092064A (ja) | 2014-10-30 | 2016-05-23 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
JP2016146402A (ja) | 2015-02-06 | 2016-08-12 | 凸版印刷株式会社 | 配線基板、半導体装置及び半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
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JP2018157173A (ja) | 2018-10-04 |
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