JP7110195B2 - 半導体デバイスを製造するためのウェハエッジ・リフトピンの設計 - Google Patents
半導体デバイスを製造するためのウェハエッジ・リフトピンの設計 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000013461 design Methods 0.000 title description 8
- 235000012431 wafers Nutrition 0.000 claims description 169
- 238000012545 processing Methods 0.000 claims description 15
- 239000012636 effector Substances 0.000 description 4
- 239000004696 Poly ether ether ketone Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 229920002530 polyetherether ketone Polymers 0.000 description 2
- JUPQTSLXMOCDHR-UHFFFAOYSA-N benzene-1,4-diol;bis(4-fluorophenyl)methanone Chemical compound OC1=CC=C(O)C=C1.C1=CC(F)=CC=C1C(=O)C1=CC=C(F)C=C1 JUPQTSLXMOCDHR-UHFFFAOYSA-N 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68728—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of separate clamping members, e.g. clamping fingers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Description
本願は、2016年12月7日に出願された米国仮特許出願番号第62/431,175号に関連し、その優先権を主張するものであり、この文献の全体の内容は、参照により本明細書に組み込まれる。
Claims (16)
- 半導体デバイスを製造するための装置のウェハエッジ・リフトピンであって、当該ウェハエッジ・リフトピンは、
ウェハを支持するための水平方向上向き面と前記ウェハの横方向閉じ込めのための垂直方向傾斜面とを有するノッチ部分を含み、垂直中心線を有する頂部であって、前記垂直方向傾斜面は、半径に沿って前記ウェハから離れる方向に水平方向に広がる、頂部と、
該頂部の下の基部であって、前記ノッチ部分を横切る前記頂部の直径よりも大きい直径を有し、垂直中心線を有する基部と、
該基部の前記直径よりも小さい直径を有し、垂直中心線を有する底部と、を含み、
前記頂部及び前記基部の前記垂直中心線は、前記底部の前記垂直中心線から水平方向にずれており、それによって、当該リフトピンが回転する際に、当該リフトピンの回転によって、前記ウェハに対する前記垂直方向傾斜面によって提供される前記横方向閉じ込めの調整が可能になる、
ウェハエッジ・リフトピン。 - 前記基部の前記垂直中心線と前記底部の前記垂直中心線とが、約0.508mm(0.020インチ)~約0.635mm(0.025インチ)の間で水平方向にずれている、請求項1に記載のウェハエッジ・リフトピン。
- 前記ノッチ部分の掃引プロファイルによって、前記ウェハ上のウェハ整列ノッチが前記ノッチ部分の周りに着座するのを防止する、請求項1に記載のウェハエッジ・リフトピン。
- 前記垂直方向傾斜面と前記水平方向上向き面との交差部が、90°を超える角度を有する、請求項1に記載のウェハエッジ・リフトピン。
- 前記半径は、前記ウェハ上のウェハ整列ノッチが前記ノッチ部分の傾斜の周りに着座するのを防止するように十分に大きい、請求項1に記載のウェハエッジ・リフトピン。
- 半導体デバイスを製造するための装置のウェハエッジ・リフトピンであって、当該ウェハエッジ・リフトピンは、
ウェハを支持するための水平方向上向き面と前記ウェハの横方向閉じ込めのための垂直方向傾斜面とを有するノッチ部分を含み、垂直中心線を有する頂部であって、前記垂直方向傾斜面は、半径に沿って前記ウェハから離れる方向に水平方向に広がり、前記垂直方向傾斜面と前記水平方向上向き面との交差部が90°を超える角度を有し、前記ノッチ部分の掃引プロファイルによって、前記ウェハ上のウェハ整列ノッチが前記ノッチ部分の周りに着座するのを防止する、頂部と、
該頂部の下の基部であって、前記ノッチ部分を横切る前記頂部の直径よりも大きい直径を有し、垂直中心線を有する基部と、
該基部の前記直径よりも小さい直径を有する底部と、を含み、
前記頂部及び前記基部の前記垂直中心線は、前記底部の前記垂直中心線から水平方向にずれており、それによって、前記リフトピンが回転する際に、該リフトピンの回転によって、前記ウェハに対する前記垂直方向傾斜面によって提供される前記横方向閉じ込めの調整が可能になる、
ウェハエッジ・リフトピン。 - 前記基部の前記垂直中心線と前記底部の前記垂直中心線とが、約0.508mm(0.020インチ)~約0.635mm(0.025インチ)の間で水平方向にずれている、請求項6に記載のウェハエッジ・リフトピン。
- 前記半径は、前記ウェハ上のウェハ整列ノッチが前記ノッチ部分の傾斜の周りに着座するのを防止するように十分に大きい、請求項6に記載のウェハエッジ・リフトピン。
- ウェハを用いて半導体デバイスを製造するための装置であって、当該装置は、
前記ウェハが処理される処理チャンバと、
前記ウェハがロードされる、前記処理チャンバ内のチャックアセンブリと、
前記ウェハを上下動させるための複数の少なくとも3つのウェハエッジ・リフトピンと、を有しており、
前記複数の少なくとも3つのウェハエッジ・リフトピンのそれぞれは、
ウェハを支持するための水平方向上向き面と前記ウェハの横方向閉じ込めのための垂直方向傾斜面とを有するノッチ部分を含み、垂直中心線を有する頂部であって、前記垂直方向傾斜面は、半径に沿って前記ウェハから離れる方向に水平方向に広がる、頂部と、
該頂部の下の基部であって、前記ノッチ部分を横切る前記頂部の直径よりも大きい直径を有し、垂直中心線を有する基部と、
該基部の直径よりも小さい水平方向の直径を有し、垂直中心線を有する底部と、を含み、
前記頂部及び前記基部の前記垂直中心線は、前記底部の前記垂直中心線から水平方向にずれており、それによって、前記リフトピンが回転する際に、該リフトピンの回転によって、前記ウェハに対する前記垂直方向傾斜面によって提供される前記横方向閉じ込めの調整が可能になる、
装置。 - 前記複数の少なくとも3つのウェハエッジ・リフトピンを支持するリフトプレートをさらに有する、請求項9に記載の装置。
- リフトプレートは、該リフトプレートの中心を前記チャックアセンブリの中心と位置合わせするための中心合せ部分を含む、請求項9に記載の装置。
- 前記チャックアセンブリの外縁が、前記ウェハを上下動させるとき、前記複数の少なくとも3つのウェハエッジ・リフトピンが通過するクリアランス・スロットを含む、請求項9に記載の装置。
- 前記基部の前記垂直中心線と前記底部の前記垂直中心線とが、約0.508mm(0.020インチ)~約0.635mm(0.025インチ)の間で水平方向にずれている、請求項9に記載の装置。
- 前記ノッチ部分の掃引プロファイルによって、ウェハ整列ノッチが前記ノッチ部分の周りに着座するのを防止する、請求項9に記載の装置。
- 前記垂直方向傾斜面と前記水平方向上向き面との交差部が、90°を超える角度を有する、請求項9に記載の装置。
- 前記半径は、前記ウェハ上のウェハ整列ノッチが前記ノッチ部分の傾斜の周りに着座するのを防止するように十分に大きい、請求項9に記載の装置。
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Application Number | Priority Date | Filing Date | Title |
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US201662431175P | 2016-12-07 | 2016-12-07 | |
US62/431,175 | 2016-12-07 | ||
PCT/US2017/065166 WO2018106952A1 (en) | 2016-12-07 | 2017-12-07 | Wafer edge lift pin design for manufacturing a semiconductor device |
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JP2019537273A JP2019537273A (ja) | 2019-12-19 |
JP7110195B2 true JP7110195B2 (ja) | 2022-08-01 |
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US (1) | US10418270B2 (ja) |
JP (1) | JP7110195B2 (ja) |
KR (1) | KR20190085148A (ja) |
CN (1) | CN110050336B (ja) |
TW (1) | TWI760394B (ja) |
WO (1) | WO2018106952A1 (ja) |
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US20180158717A1 (en) | 2018-06-07 |
TW201834140A (zh) | 2018-09-16 |
US10418270B2 (en) | 2019-09-17 |
WO2018106952A1 (en) | 2018-06-14 |
KR20190085148A (ko) | 2019-07-17 |
TWI760394B (zh) | 2022-04-11 |
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CN110050336B (zh) | 2023-05-23 |
CN110050336A (zh) | 2019-07-23 |
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