JP6988140B2 - 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 - Google Patents
炭化珪素半導体装置および炭化珪素半導体装置の製造方法 Download PDFInfo
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- JP6988140B2 JP6988140B2 JP2017079316A JP2017079316A JP6988140B2 JP 6988140 B2 JP6988140 B2 JP 6988140B2 JP 2017079316 A JP2017079316 A JP 2017079316A JP 2017079316 A JP2017079316 A JP 2017079316A JP 6988140 B2 JP6988140 B2 JP 6988140B2
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- silicon carbide
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Description
本発明にかかる半導体装置は、ワイドバンドギャップ半導体として特に好適な炭化珪素(SiC)を用い作製された炭化珪素半導体装置について説明する。炭化珪素半導体装置について、炭化珪素半導体ショットキーバリアダイオードを例に説明する。図1は、実施の形態1にかかる炭化珪素半導体装置の構成を示す部分断面図である。
次に、実施の形態1にかかる炭化珪素半導体装置の製造方法について、例えば炭化珪素半導体ショットキーバリアダイオードを作成する場合を例に説明する。図2〜4は、実施の形態1にかかる炭化珪素半導体装置の製造途中の状態を示す断面図である。まず、窒素がドーピングされたn+型炭化珪素半導体基板100を用意する。次に、n+型炭化珪素半導体基板100上に、窒素がドーピングされたn型炭化珪素層1をエピタキシャル成長させる。
次に、実施の形態2について、p型ウェル領域とn型ソース領域とをそれぞれイオン注入で形成する二重注入(DI:Double Implante)プロセスによって作製された二重注入型MOSFET(DI−MOSFET)を例に説明する。図6は、実施の形態2にかかる炭化珪素半導体装置の構成を示す断面図である。
次に、実施の形態2にかかる炭化珪素半導体装置の製造方法について、例えば二重注入型MOSFETを作成する場合を例に説明する。図7〜9は、実施の形態2にかかる炭化珪素半導体装置の製造途中の状態を示す断面図である。まず、窒素がドーピングされたn+型炭化珪素半導体基板100を用意する。次に、n+型炭化珪素半導体基板100上に、窒素がドーピングされたn型炭化珪素層1をエピタキシャル成長させる。
次に、実施の形態3について、トレンチ構造を有する炭化珪素半導体装置を例に説明する。図10は、実施の形態3にかかる炭化珪素半導体装置の構成を示す断面図である。
次に、実施の形態3にかかる炭化珪素半導体装置の製造方法について、例えばトレンチ型炭化珪素半導体を作成する場合を例に説明する。図11〜15は、実施の形態3にかかる炭化珪素半導体装置の製造途中の状態を示す断面図である。まず、窒素がドーピングされたn+型炭化珪素半導体基板100を用意する。次に、n+型炭化珪素半導体基板100上に、窒素がドーピングされた第1n型炭化珪素層1をエピタキシャル成長させる。
2 第2n型炭化珪素層
3 p型炭化珪素層
4 p型イオン注入層(p+型ベース領域)
4a 下部p+型ベース領域
4b 上部p+型ベース領域
5 p+型イオン注入領域
6 n型イオン注入層
6a 下部n型イオン注入層
6b 上部n型イオン注入層
7 n+型ソース領域
8 p++型コンタクト領域
9 絶縁膜(ゲート絶縁膜)
10 ゲート電極
11 層間絶縁膜
12 コンタクト電極(ソース電極)
13 裏面電極
14 電極パッド
15 裏面電極パッド
16 チャネルストッパ
20 トレンチ
100 n+型炭化珪素半導体基板
Claims (6)
- 第1導電型の炭化珪素半導体基板と、
前記炭化珪素半導体基板のおもて面に設けられた、第1導電型の第1炭化珪素層と、
前記第1炭化珪素層の表面に選択的に設けられた絶縁膜と、
を備え、
前記絶縁膜の内部、前記絶縁膜と前記第1炭化珪素層の境界層、または、前記第1炭化珪素層の前記絶縁膜が設けられた表面では、フッ素または塩素のいずれも換算濃度が1×1017個/cm3未満であることを特徴とする炭化珪素半導体装置。 - 第1導電型の炭化珪素半導体基板と、
前記炭化珪素半導体基板のおもて面に設けられた、第1導電型の第1炭化珪素層と、
前記第1炭化珪素層の、前記炭化珪素半導体基板に対して反対側の表面に選択的に設けられた第2導電型の第2炭化珪素層と、
前記第2炭化珪素層の表面に設けられたゲート絶縁膜と、
を備え、
前記ゲート絶縁膜の内部、前記ゲート絶縁膜と前記第2炭化珪素層の境界層、または、前記第2炭化珪素層の前記ゲート絶縁膜が設けられた表面では、フッ素または塩素のいずれも換算濃度が1×1017個/cm3未満であることを特徴とする炭化珪素半導体装置。 - 第1導電型の炭化珪素半導体基板と、
前記炭化珪素半導体基板のおもて面に設けられた、第1導電型の第1炭化珪素層と、
前記第1炭化珪素層の、前記炭化珪素半導体基板に対して反対側の表面に選択的に設けられた第1導電型の第2炭化珪素層と、
前記第2炭化珪素層の、前記第1炭化珪素層に対して反対側の表面に選択的に設けられた第2導電型の第3炭化珪素層と、
少なくとも前記第3炭化珪素層を貫通し、前記第2炭化珪素層に達するトレンチと、
前記トレンチの表面に設けられたゲート絶縁膜と、
を備え、
前記ゲート絶縁膜の内部、前記ゲート絶縁膜と前記第2炭化珪素層の境界層、または、前記第2炭化珪素層の前記ゲート絶縁膜が設けられた表面では、フッ素または塩素のいずれも換算濃度が1×1017個/cm3未満であることを特徴とする炭化珪素半導体装置。 - 炭化珪素半導体基板のおもて面に第1導電型の第1炭化珪素層を形成する工程と、
前記第1炭化珪素層を含む基体表面に熱酸化膜を形成する工程と、
前記熱酸化膜をフッ酸を含む溶液で除去する工程と、
前記基体を、アンモニア水と過酸化水素水の混合液、塩酸と過酸化水素水の混合液、および、希フッ酸で洗浄する工程と、
前記基体を、減圧雰囲気で700℃以上1000℃以下の温度で保持する工程と、
前記基体上に絶縁膜を堆積する工程と、
を含むことを特徴とする炭化珪素半導体装置の製造方法。 - 炭化珪素半導体基板のおもて面に第1導電型の第1炭化珪素層を形成する工程と、
前記第1炭化珪素層を含む基体表面に熱酸化膜を形成する工程と、
前記熱酸化膜をフッ酸を含む溶液で除去する工程と、
前記基体を、アンモニア水と過酸化水素水の混合液と、塩酸と過酸化水素水の混合液、および、希フッ酸で洗浄する工程と、
前記基体を、水素およびシラン混合ガス雰囲気で700℃以上1700℃以下の温度で保持する工程と、
前記基体上に絶縁膜を堆積する工程と、
を含むことを特徴とする炭化珪素半導体装置の製造方法。 - 前記フッ素または塩素の換算濃度が1×1017個/cm3未満であることは、飛行時間型二次イオン質量分析法で検出することを特徴とする請求項1〜3のいずれか一つに記載の炭化珪素半導体装置。
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