JP6816940B2 - Game machine - Google Patents

Description

The present invention relates to gaming machines such as pachinko gaming machines and slot machines.

Examples of this type of gaming machine include a program related to the progress of a game for performing lottery and movement of each part according to a player's operation, and anomaly detection (for example, anomaly winning) that is not directly related to the progress of the game. A program related to determination) and the like are mixedly stored in one storage area (see, for example, Patent Document 1).

JP-A-2007-222418

In the gaming machine described in Patent Document 1, if a program related to the progress of the game and a program not directly related to the progress of the game are mixed in one storage area, which program is related to the progress of the game It was difficult to determine whether it was.

The present invention has been made by paying attention to such a problem, and an object of the present invention is to provide a game machine capable of easily distinguishing between a program related to the progress of a game and a program not related to the progress of a game. To do.

The gaming machine of the present invention
In the game machine that plays the game
A first storage means having a first storage area capable of storing a program,
A control means that controls based on a program stored in the first storage means,
A second storage area including a variable data storage area capable of storing variable data used when the control means performs control based on the program and a stack area for temporarily storing data used by the program. Memories and
With
The first storage area is
The first program area where the first program is stored and
A second program area in which the second program called by the first program is stored, and
Including
The variable data storage area is
A first variable data storage area that is updated and referenced in the first program and not updated in the second program.
A second variable data storage area that is updated and referenced in the second program but not updated in the first program.
Including
The stack area is
A first stack area for temporarily saving data used by the first program, and
A second stack area for temporarily saving data used by the second program, and
Including
The first program includes a first initialization program that initializes at least a portion of the first variable data storage area.
The second program includes a second initialization program that initializes at least a portion of the second variable data storage area.
The control means
In addition to executing the basic program of the first program, a timer interrupt occurs at predetermined time intervals to interrupt the running program and execute the interrupt program of the first program.
When the second program is called from the first program, the data used by the first program is saved in the first stack area in the first program, and then the second program is called and based on the second program. After executing the process and completing the process based on the second program, the data used by the first program is returned from the first stack area in the first program.
The second program may be called from both the basic program and the interrupt program.
When the interrupt program is executed, the data used by the running program is temporarily saved in the stack area.
When the second program is called from the basic program or when the second program is called from the interrupt program, the other program by the timer interrupt is used for the period during which the second program is executed. Prohibit interruption ,
It is determined whether or not the first initialization condition is satisfied according to the progress of the game, and when it is determined that the first initialization condition is satisfied, the initial initialization by the first initialization program is performed. Of the initialization and initialization by the second initialization program, only the initialization by the first initialization program is performed.
When it is determined whether or not the second initialization condition is satisfied when the power supply to the game machine is started, and when it is determined that the second initialization condition is satisfied, the second initialization condition is satisfied. It is characterized in that the initialization by the 1 initialization program and the initialization by the second initialization program are performed individually .
The gaming machine of means 1 of the present invention
In a game machine (slot machine 1) that plays a game
A storage means (ROM41b) having a storage area (game program area, non-game program area) capable of storing a program (game program, non-game program), and
A control means (main control unit 41) that performs control based on a program stored in the storage means, and
With
The storage area is
A game program area (game program area) in which a game program (game program) related to the progress of a game is stored, and
A non-game program area (non-game program area) in which a non-game program (non-game program) that is a program called by the game program and is not related to the progress of the game is stored,
Including
The control means
The basic process (main process) based on the game program is executed, and the interrupt process (timer interrupt process (main)) based on the game program is executed by interrupting the basic process at predetermined time intervals.
The non-game program may be called from both the basic process (main process) and the interrupt process (timer interrupt process (main)).
When the non-game program (non-game program area) is called from the basic process (main process), the non-game program (non-game program area) is also called from the interrupt process (timer interrupt process (main)). At times, it is characterized by prohibiting interruptions in other processes.
According to this feature, a game program area in which a game program related to the progress of a game is stored, a non-game program area in which a non-game program called by the game program and not related to the progress of the game is stored, and a non-game program area. Are assigned separately to each other, so that the gaming program and the non-gaming program can be easily identified according to the difference in the storage area. Further, when the non-game program is called from the basic process and when the non-game program is called from the interrupt process, the interrupt of other processes is prohibited, so that the interrupt is executed during the execution of the non-game program. It is possible to prevent malfunction due to this.

The gaming machine of the means 2 of the present invention is the gaming machine according to the means 1.
When the control means calls the non-game program (non-game program area) from the basic process (main process), the control means releases the prohibition of interruption with the end of the non-game program (non-game program area). When the non-game program (non-game program area) is called from the interrupt process (timer interrupt process (main)), the prohibition of interruption is maintained even after the end of the non-game program (non-game program area). It is characterized by.
According to this feature, it is possible to prevent the prohibition of interrupts from being lifted by executing a non-game program even while the interrupt process is being executed.

The gaming machine of means 3 of the present invention is the gaming machine according to means 1 or 2.
A stack area (game stack area) for saving data used by the game program (game program area) and a stack area (non-game stack area) for saving data used by the non-game program (non-game program area) are provided. It is characterized by being prepared separately.
According to this feature, the data used by the game program and the data used by the non-game program are saved in the stack areas provided separately, so that the stack area can be easily managed.

The gaming machine of means 4 of the present invention is the gaming machine according to any one of means 1 to 3.
When the non-game program (non-game program area) is executed, the control means saves the value of the register used in the game program (game program area) into the stack area (game stack area), and then saves the value of the register in the stack area (game stack area). It is characterized by executing processing in a non-game program (non-game program area).
According to this feature, it is possible to prevent the value of the register used by the game program from being changed as the non-game program is executed.

The gaming machine of the means 5 of the present invention is the gaming machine according to the means 4.
When the non-game program (non-game program area) is executed, the control means saves the value of the register used in the game program (game program area) into the stack area (game stack area). It is characterized in that the common call process 1 and the common call process 3) are called.
According to this feature, since the program to be executed when the non-game program is executed is standardized, the program capacity can be reduced.

The gaming machine of means 6 of the present invention is the gaming machine according to any one of means 1 to 5.
An address storage means (vector table) that can store the address of the interrupt program (timer interrupt process (main)) for executing the interrupt process, and
A determination means for determining at startup whether or not the address stored in the address storage means (vector table) is within a predetermined range (the area of the program area in which the program or the like is actually stored).
When it is determined that the address stored in the address storage means (vector table) is not within the predetermined range, the start limiting means (in the main control unit 41, the address of the vector table is in the program area of the program or the like. If it is not the area actually stored, it will not be started),
It is characterized by having.
According to this feature, it is possible to prevent an unintended interrupt process from being executed in advance.

The gaming machine of means 7 of the present invention is the gaming machine according to any one of means 1 to 6.
It is provided with a setting means (setting of various functions performed by referring to the HW parameter) for setting the control means.
The control means executes processing based on a program (game program or non-game program) after the setting by the setting means is performed, and prohibits interruption (starting) before the processing based on the program is started. Interruption prohibition setting by time setting)
It is characterized by that.
According to this feature, it is possible to prevent an unintended interruption from occurring.

The gaming machine of means 8 of the present invention is the gaming machine according to any one of means 1 to 7.
A plurality of timer value storage areas (for example, 1-byte timers A to C) and
When any of a plurality of types of time timing conditions (for example, 1-byte timers A to C) is satisfied, a timer value storage area (for example, 1-byte timer A) corresponding to the time timing conditions is satisfied. To C), a timer value storage means (main process) for storing the timer value according to the timing condition, and
A timer value updating means (time counter updating process) capable of updating the timer values stored in a plurality of timer value storage areas (for example, 1-byte timers A to C) every predetermined cycle (about 2.24 ms).
With
Consecutive addresses (804CH to 804EH) are assigned to a plurality of timer value storage areas (for example, 1-byte timers A to C) according to a predetermined rule (+1).
The timer value update means performs a predetermined operation (designated address + 1) for an update process (process of subtracting 1 from the value indicated by the pointer) for updating the timer value stored in the timer value storage area corresponding to the specified address. The feature is that multiple types of timer values can be updated by repeatedly executing while changing the specified address for the timer value storage area.
According to this feature, consecutive addresses are assigned to a plurality of timer value storage areas according to a predetermined rule, and an update process for updating the timer values stored in the timer value storage area corresponding to the specified address is predetermined. Since multiple types of timer values are updated by repeatedly executing while changing the specified address for the timer value storage area by performing the operation of, when performing the process of updating multiple types of timer values for each type of timer value. The program capacity can be reduced.
It should be noted that the assignment of consecutive addresses according to a predetermined rule means that, for example, an address to which N (N is a natural number) is added from the start address and the start address is assigned.
In addition, changing the designated address for the timer value storage area by performing a predetermined operation means, for example, changing the designated address by adding or subtracting a value according to the number of processes to the current designated address. It corresponds to changing the designated address by adding or subtracting a constant from the reference address. At this time, the value or constant according to the number of processes may differ depending on the storage capacity of the timer value. For example, in the configuration where the timer value is stored byte by byte, the value according to the number of processes is the number of processes. Depending on the number of processes, the values will be 1, 2, 3 ..., and the constant will be 1, but if the timer value is stored by 2 bytes, the value according to the number of processes will be 2, 4, 6 ... Depending on the number of processes. , The constant is 2.

In addition, the present invention may have only the invention-specific matters described in the claims of the present invention, and has a configuration other than the invention-specific matters together with the invention-specific matters described in the claims of the present invention. It may be a thing.

It is a front view of the slot machine of the Example to which this invention was applied. It is a perspective view which shows the internal structure of a slot machine. It is a figure which shows the symbol arrangement of a reel. It is a block diagram which shows the structure of a slot machine. It is a block diagram which shows the structure of the main control part. It is a figure which shows the memory map of ROM and RAM mounted on the main control part. It is a figure which shows the detail of the memory map of ROM and RAM mounted on the main control unit. It is a figure which shows the structure of a game program and a non-game program. It is a figure which shows the relationship between a game area and a non-game area. (A) is a flowchart showing the flow of processing when calling a non-game program from a process based on the game program during execution of the main process, and (b) is based on the game program during execution of the timer interrupt process. It is a flowchart which shows the flow of processing when calling a non-game program from processing. It is a flowchart which shows the control content of the initial setting process executed by the main control part. It is a flowchart which shows the control content of the setting change processing executed by the main control part. It is a flowchart which shows the control content of the game area initialization processing which the main control part executes. It is a flowchart which shows the control content of the non-game area initialization processing executed by the main control part. It is a flowchart which shows the control content of the main process executed by the main control unit. It is a flowchart which shows the control content of the timer interrupt process (main) executed by the main control unit. It is a flowchart which shows the control content of the timer interrupt process (main) executed by the main control unit. It is a flowchart which shows the control content of the power failure process (main) executed by the main control unit. It is a figure which shows the area of the RAM which the main control part initializes when the 1st condition and the 2nd condition are satisfied. It is a flowchart which shows the control content when the main control part determines the value of a timer counter. It is a figure which shows the storage area of the timer counter in RAM. It is a flowchart which shows the control content of the time counter update process executed by the main control part. It is a flowchart which shows the modification of the process flow at the time of calling a non-game program from the process based on a game program during execution of a timer interrupt process.

A mode for carrying out the slot machine according to the present invention will be described below based on examples.

An embodiment of the slot machine to which the present invention is applied will be described with reference to the drawings. As shown in FIG. 1, the slot machine 1 of the present embodiment has a housing 1a having an open front surface and a side of the housing 1a. It is composed of a front door 1b rotatably supported at the end.

As shown in FIG. 2, inside the housing 1a of the slot machine 1 of this embodiment, reels 2L, 2C, and 2R (hereinafter, left reel, middle reel, and right reel) in which a plurality of types of symbols are arranged on the outer circumference are arranged. ) Are arranged side by side in the horizontal direction, and as shown in FIG. 1, three consecutive symbols among the symbols arranged on the reels 2L, 2C, and 2R can be seen from the see-through window 3 provided on the front door 1b. It is arranged like this.

As shown in FIG. 3, on the outer peripheral parts of the reels 2L, 2C, and 2R, "red 7", "blue 7", "white 7", "BAR", "watermelon", "cherry a", and "cherry", respectively. Twenty-one each of a plurality of mutually distinguishable symbols such as "b", "bell", "replay a", "replay b", and "plum" are drawn in a predetermined order. The symbols drawn on the outer peripheral portions of the reels 2L, 2C, and 2R are displayed in the upper, middle, and lower three stages in the see-through window 3 provided at substantially the center of the front door 1b. In the following, "red 7", "blue 7", and "white 7" may be collectively referred to as "7", and "cherry a" and "cherry b" may be collectively referred to as "cherry". Yes, "replay a" and "replay b" may be collectively referred to as "replay".

Each reel 2L, 2C, 2R is rotated by reel motors 32L, 32C, 32R (see FIG. 4) provided corresponding to each, so that the symbols of each reel 2L, 2C, 2R are continuous with the perspective window 3. While the reels 2L, 2C, and 2R are stopped rotating, three consecutive symbols are derived and displayed on the perspective window 3 as a display result.

Inside the reels 2L, 2C and 2R, there are reel sensors 33L, 33C and 33R that detect the reference position for each of the reels 2L, 2C and 2R, and a reel LED 55 that irradiates the reels 2L, 2C and 2R from the back. , Are provided. Further, the reel LED 55 is composed of 12 LEDs corresponding to three consecutive symbols of reels 2L, 2C and 2R, and each symbol can be independently irradiated.

A display area 51a of the liquid crystal display 51 (see FIG. 1) is arranged at a position on the front side (player side) of the reels 2L, 2C, and 2R of the front door 1b. The liquid crystal display 51 has a liquid crystal panel having transparency in a state where no voltage is applied to the liquid crystal element, and passes through the transmission region 51b and the perspective window 3 corresponding to the perspective window 3 of the display region 51a. The reels 2L, 2C, and 2R can be visually recognized from the player side.

As shown in FIG. 1, the front door 1b has a medal insertion section 4 into which medals can be inserted, a medal payout exit 9 from which medals are paid out, and credits (the number of medals stored as a player-owned game value). In use, the maximum number of medals among the specified number of medals determined according to the gaming state within that range (in this embodiment, 3 is specified as the specified number of RT0 to 4 described later, and 2 is specified as the specified number of RB. MAXBET switch 6 operated when setting (is), medals stored as credits and medals used for setting the number of bets are settled (the medals used for setting the credits and the number of bets are returned. Settlement switch 10 operated at the time of), start switch 7 operated at the start of the game, stop switches 8L, 8C, 8R operated at the time of stopping the rotation of the reels 2L, 2C, 2R, respectively. The effect switches 56 used for the above are provided so as to be operable by the player.

In this embodiment, of the three reels 2L, 2C, and 2R that have started to rotate, the reel that stops first is referred to as the first stop reel, and the stop is referred to as the first stop. Similarly, the reel that stops second is called the second stop reel, the stop is called the second stop, the reel that stops third is called the third stop reel, and the stop is called the third stop. Alternatively, it is called a final stop.

Further, as shown in FIG. 1, the front door 1b shows a credit display 11 that displays the number of medals stored as credits, the number of medals paid out due to the occurrence of a prize, and the contents when an error occurs. A game auxiliary display 12 that displays an error code, information that can identify the reel stop order by the navigation notification described later, 1 BETLED 14 that notifies by lighting that the bet number is set to 1, and 2 bets are set. 2BETLED15 that notifies by lighting that the number of bets is set, 3BETLED16 that notifies by lighting that the number of bets is set 3, insertion request LED17 that notifies by lighting that a medal can be inserted, and a game by operating the start switch 7. A start effective LED18 that notifies by lighting that the start operation is valid, and a lighting that notifies that the wait (a state of waiting for the start of rotation of the reel because a certain period of time has not passed since the previous game start) is in progress. A game display unit 13 provided with a weighting LED 19 and a replaying LED 20 for notifying by lighting that a replay game is in progress is provided.

Inside the MAXBET switch 6, a BET switch effective LED21 (see FIG. 4) is provided to notify by lighting that the betting number setting operation by operating the MAXBET switch 6 is effective, and the stop switches 8L, 8C, Inside the 8R, left, middle, and right stop effective LEDs 22L, 22C, and 22R (see FIG. 4) are provided to notify by lighting that the reel stop operation by the corresponding stop switches 8L, 8C, and 8R is effective. An effect LED 56a (see FIG. 4) is provided inside the effect switch 56 to notify by lighting that the operation of the effect switch 56 is effective.

Inside the front door 1b, as shown in FIG. 2, a reset switch 23 for detecting an error state described later and a reset operation for canceling a stop state described later by a predetermined key operation, and a change of a setting value described later. The setting value display 24 that displays the setting value at that time while checking the inside or the setting value, the progress of the game until the stop state (reset operation is performed) at a predetermined trigger (for example, at the end of BB described later). A stop switch 36a for selecting the enable / disable of the stop function that controls the regulated state), and an automatic settlement process (for example, at the end of BB) for the player to use the medal stored as a credit. The automatic settlement switch 36b for selecting the enable / disable of the automatic settlement function that controls the settlement (return) regardless of the operation of the above, and the flow path of the medal inserted from the medal insertion unit 4 of the housing 1a. The flow path switching solenoid 30 for selectively switching to either the hopper tank 34a (see FIG. 2) side or the medal payout outlet 9 side provided inside, which will be described later, is charged from the medal insertion section 4, and is charged from the hopper tank 34a. An insertion medal sensor 31 that detects medals that have flowed down to the side, a medal selector 29 that has an insertion port sensor 26 that detects the insertion of foreign matter on the upstream side of the insertion medal sensor 31, and a door open detection switch that detects the open state of the front door 1b. 25 (see FIG. 4) is provided.

Inside the housing 1a, as shown in FIG. 2, the above-mentioned reels 2L, 2C, 2R, reel motors 32L, 32C, 32R (see FIG. 4), and reel reference positions of the respective reels 2L, 2C, and 2R are respectively. Reel unit 2 composed of detectable reel sensors 33L, 33C, 33R (see FIG. 4), external output board 1000 for outputting an external output signal (see FIG. 4), and medals inserted from the medal insertion unit 4 are stored. The hopper tank 34a, the hopper motor 34b (see FIG. 4) for paying out the medals stored in the hopper tank 34a from the medal payout outlet 9, and the payout sensor 34c (see FIG. 4) for detecting the medal paid out by driving the hopper motor 34b (see FIG. 4). A hopper unit 34 and a power supply box 100 (see FIG. 4) are provided.

An overflow tank 35 for storing medals overflowing from the hopper tank 34a is provided on the side of the hopper unit 34. Inside the overflow tank 35, a full tank sensor 35a (see FIG. 4) for detecting that the stored medals are full is provided.

As shown in FIG. 2, the front surface of the power supply box 100 functions as a setting key switch 37 for switching to a setting change state or a setting confirmation state, and a reset switch for canceling an error state or a stop state in normal times. However, in the setting change state, the reset / setting switch 38 that functions as a setting switch for changing the setting value of the winning probability (ball output rate) of the internal lottery described later, and the power supply that is operated when the power is turned on / off. A switch 39 is provided.

Since the power supply box 100 is provided inside the housing 1a and the front door 1b is configured to be openable by a predetermined key operation possessed by a clerk or the like, it is provided on the front surface of the power supply box 100. The setting key switch 37, the reset / setting switch 38, and the power switch 39 can be operated only by a clerk or the like who has the key, and cannot be operated by the player. The same applies to the reset switch 23 detected by a predetermined key operation. In particular, since the setting key switch 37 requires further key operation after opening the front door 1b by key operation, only the clerk who has the key to operate the setting key switch 37 among the clerk of the amusement park. It is possible to operate.

When playing a game on the slot machine 1 of this embodiment, first, medals are inserted from the medal insertion unit 4, or the number of bets is set using credits. To use the credit, operate the MAXBET switch 6. When the specified number of bets determined according to the game state is set, the winning line LN (see FIG. 1) becomes valid, and the operation of the start switch 7 is valid, that is, the game can be started. Become. In this embodiment, 3 cards are set as the specified number of bets in RT0 to 4 described later, and 2 cards are set as the specified number of bets in RB described later, and the specified number is set according to these gaming states. When the number of bets is set, the winning line LN becomes valid. If more than the maximum number of medals are inserted out of the specified number corresponding to the gaming state, that amount will be added to the credit.

The winning line is a line set to determine whether the combination of symbols displayed on the perspective windows 3 of the reels 2L, 2C, and 2R is a combination of winning symbols. In this embodiment, as shown in FIG. 1, only the winning line LN set across the symbols arranged horizontally in the middle stage of the reel 2L, the middle stage of the reel 2C, and the middle stage of the reel 2R, that is, the middle stage is used as the winning line. It is set. In this embodiment, only one winning line is applied, but a plurality of winning lines may be applied.

Further, in the present embodiment, in order to make it easy to recognize that the winning line LN has a combination of symbols constituting the winning, the invalid lines LM1 to 4 are set separately from the winning line LN. The invalid lines LM1 to LM1 to 4 are not determined to win by the combination of the symbols aligned with the invalid lines LM1 to 4, but are invalid lines when the winning line LN has a combination of symbols constituting a specific winning. By configuring the combination of symbols (for example, bell-bell-bell) that will be awarded when the winning line LN is aligned with any of LM1 to LM4, the symbols constituting the winning line LN are the symbols that constitute a specific winning. This makes it easier to recognize that the combinations are complete.

In this embodiment, as shown in FIG. 1, the upper stage of the reel 2L, the upper stage of the reel 2C, and the upper stage of the reel 2R, that is, the lower stage of the invalid lines LM1 and the reel 2L set across the symbols arranged horizontally in the upper stage. , Lower reel 2C, lower reel 2R, that is, invalid line LM2 set across the symbols arranged horizontally in the lower row, upper reel 2L, middle reel 2C, lower reel 2R, that is, lined down to the right. However, there are four types of invalid line LM: invalid line LM3 set across the symbols, lower row of reel 2L, middle row of reel 2C, upper row of reel 2R, that is, invalid line LM4 set across the symbols lined up to the right. It is defined as.

Further, in this embodiment, as a winning combination, a prize is won when a predetermined combination of symbols defined as a winning combination (for example, "bell-watermelon-cherry b") is prepared in the winning line LN, and a predetermined symbol is also obtained. By aligning the combinations, any of the invalid lines LM1 to LM4 has a symbol combination (for example, "watermelon-watermelon-watermelon") that is an index that is easier to recognize than a predetermined symbol combination, and thus the invalid lines LM1 to LM4 Includes roles that can be made to appear as if they have won a prize by combining the symbols that match any of the above. In the following, when a predetermined combination of symbols is aligned with the winning line LN, the combination of symbols aligned with any of the invalid lines LM1 to LM4 is referred to as a symbol combination as an index, and a combination of symbols as an index is configured. The symbol is called an index symbol.

When the start switch 7 is operated while the game can be started, the reels 2L, 2C, and 2R are rotated, and the symbols of the reels 2L, 2C, and 2R are continuously changed. When any of the stop switches 8L, 8C, and 8R is operated in this state, the rotation of the corresponding reels 2L, 2C, and 2R is stopped, and the display result is derived and displayed on the perspective window 3.

When all reels 2L, 2C, and 2R are stopped, one game is completed, and a predetermined combination of symbols (hereinafter, also referred to as a combination) on the winning line LN is displayed on each reel 2L, 2C, and 2R. If the game is stopped as a result, a prize will be generated, and a number of medals determined according to the prize will be given to the player and added to the credit. Further, when the maximum number of credits (50 in this embodiment) is reached, medals are directly paid out from the medal payout outlet 9 (see FIG. 1). Further, when the combination of symbols accompanying the transition of the gaming state stops on the winning line LN as the display result of each reel 2L, 2C, 2R, the combination of symbols is shifted to the gaming state according to the combination of symbols. ..

In this embodiment, the game starts when the operation of the start switch 7 is detected while the operation of the start switch 7 is valid, and the game ends when all the reels are stopped. In addition, one unit of control (game control) for executing the game starts when all the controls associated with the end of the previous game are completed, and when all the controls associated with the end of the game are completed. finish.

Further, in this embodiment, a configuration using three reels is illustrated, but a configuration using only one reel, a configuration using two reels, and a configuration using four or more reels may be used. In the configuration using two or more reels, the winning may be determined based on the combination of the display results derived to all the two or more reels. Further, in this embodiment, the variable display device is configured by a physical reel, but the variable display device may be configured by an image display device such as a liquid crystal display.

Further, in the slot machine 1 in the present embodiment, after the game is started and the reels 2L, 2C, and 2R are rotated to start the fluctuation of the symbol, one of the stop switches 8L, 8C, and 8R is operated. When this is done, the rotation of the reels corresponding to the stop switches 8L, 8C, 8R is stopped and the symbol is stopped and displayed. The maximum stop delay time from the operation of the stop switches 8L, 8C, 8R to the stop of the rotation of the corresponding reels 2L, 2C, 2R is 190 ms (milliseconds).

The reels 2L, 2C, and 2R rotate 80 times per minute and change the symbol of 80 x 21 (the number of symbol frames per reel) = 1680 frames, so that a maximum of 4 frames can be drawn in 190 ms. You will be able to do it. That is, the symbols that can be selected as the stop symbols are the symbols displayed when the stop switches 8L, 8C, and 8R are operated, and the symbols up to 4 frames ahead of the stops, for a total of 5 frames.

Therefore, for example, when any of the stop switches 8L, 8C, and 8R is operated, when the symbol displayed at the lower stage of the reel corresponding to the stop switch is used as a reference, the symbol is up to 4 frames ahead. Since the symbol can be displayed in the lower row, the symbol displayed in the middle row of the reel corresponding to the stop switch when any of the stop switches 8L and 8R is operated in each of the reels 2L, 2C and 2R. Designs arranged within 5 frames including the above can be displayed on the winning line.

In the following, reels 2L, 2C, and 2R may be simply referred to as reels when it is not necessary to distinguish them. Further, the reel 2L may be referred to as a left reel, the reel 2C may be referred to as a middle reel, and the reel 2R may be referred to as a right reel. Further, the operation of stopping the reels 2L, 2C and 2R by operating the stop switches 8L, 8C and 8R may be referred to as a stop operation.

FIG. 4 is a block diagram showing the configuration of the slot machine 1. As shown in FIG. 4, the slot machine 1 is provided with a game control board 40, an effect control board 90, and a power supply board 101. The game control board 40 controls the game state, and the effect control board 90 controls the game state. The effect is controlled according to the above, and the drive power supply for the electric components constituting the slot machine 1 is generated by the power supply board 101 and supplied to each part.

An AC100V power supply is supplied to the power supply board 101 from the outside, and a DC voltage required for driving the electric components constituting the slot machine 1 is generated from the AC100V power supply, so that the game control board 40 and the effect control board 90 are generated. It is supposed to be supplied to. Further, the above-mentioned hopper motor 34b, payout sensor 34c, full tank sensor 35a, setting key switch 37, reset / setting switch 38, and power switch 39 are connected to the power supply board 101.

On the game control board 40, the MAXBET switch 6, the start switch 7, the stop switch 8L, 8C, 8R, the settlement switch 10, the reset switch 23, the stop switch 36a, the automatic settlement switch 36b, the input medal sensor 31, and the door open. The detection switch 25, the reel sensors 33L, 33C, and 33R are connected, and the payout sensor 34c, the full tank sensor 35a, the setting key switch 37, and the reset / setting switch 38 described above are connected via the power supply board 101. The detection signals of these connected switches are input. Further, on the game control board 40, the above-mentioned credit display 11, game auxiliary display 12, 1-3 BETLED 14 to 16, input request LED 17, start effective LED 18, wait LED 19, replay LED 20, BET switch effective LED 21, left. , Middle, right stop effective LEDs 22L, 22C, 22R, set value display 24, flow path switching solenoid 30, reel motors 32L, 32C, 32R are connected, and the hopper motor 34b described above is connected via the power supply board 101. These electric components are connected and are driven based on the control of the main control unit 41 described later mounted on the game control board 40.

The game control board 40 has a main control unit 41 that performs processing related to the progress of the game and directly or indirectly controls each part of the control circuit mounted on the game control board 40, and an oscillation signal having a predetermined frequency. A control clock generation circuit 42 that generates a control clock CCLK, a random clock generation circuit 43 that generates a random clock RCLK that is an oscillation signal having a predetermined frequency different from the oscillation frequency of the control clock CCLK, and a game control board. The switch detection circuit 44 that takes in the detection signal input from the switches connected directly to the 40 or via the power supply board 101 and transmits it to the main control unit 41, and the motor drive signal (stepping) output from the main control unit 41. The motor drive circuit 45 that transmits the phase signal of the motor to the reel motors 32L, 32C, 32R, the solenoid drive circuit 46 that transmits the solenoid drive signal output from the main control unit 41 to the flow path switching solenoid 30, and the main control. The LED drive circuit 47 that transmits the LED drive signal output from the unit 41 to various indicators and LEDs connected to the game control board 40 and the voltage of the power supply supplied to the slot machine 1 are monitored to reduce the voltage drop. A power failure detection circuit 48 that outputs a voltage drop signal to that effect to the main control unit 41 when detected, and the main control unit 41 in a state where the power supply is unstable such as when the power is turned on or when the power is cut off. It is equipped with a reset circuit 49 that gives a system reset signal to the device.

FIG. 5 shows a configuration example of the main control unit 41 mounted on the game control board 40. The main control unit 41 is a one-chip microcomputer, and includes an external bus interface 501, a clock circuit 502, a collation block 503, a unique information storage circuit 504, an arithmetic circuit 505, a reset / interrupt controller 506, and the like. CPU (Central Processing Unit) 41a, ROM (Read Only Memory) 41b, RAM (Random Access Memory) 41c, free run counter circuit 507, random number circuits 508a and 508b, timer circuit 509, and interrupt controller 510. The parallel input port 511, the serial communication circuit 512, the parallel output port 513, and the address decoding circuit 514 are provided.

The reset / interrupt controller 506 is for controlling various resets and interrupt requests that occur inside or outside the main control unit 41. The reset / interrupt controller 506 includes an out-of-designated area travel prohibition (IAT) circuit 506a and a watchdog timer (WDT) 506b. The IAT circuit 506a is a circuit that monitors whether or not the user program is correctly executed in the designated area, and has a function of outputting an IAT generation signal when it detects that the user program has been executed outside the designated area. Further, the watchdog timer 506b has a function of generating a timeout signal for each set period.

The external bus interface 501 is a bus interface having an interface function between the external bus and the internal bus of the chip constituting the main control unit 41, an address bus, a data bus, and a direction control function for each control signal. The clock circuit 502 is a circuit that generates the internal system clock SCLK by dividing the control clock CCLK by two or the like. The collation block 503 has a function of connecting to an external collation machine and collating chips. The unique information storage circuit 504 is a circuit that stores a plurality of types of unique information that is internal information of the main control unit 41. The arithmetic circuit 505 is a circuit that performs multiplication and division.

The CPU 41a is a control CPU that executes game control in the slot machine 1 by executing a user program (game control processing program for game control) based on the control code read from the ROM 41b. When such game control is executed, a fixed data read operation in which the CPU 41a reads fixed data from the ROM 41b, a variable data writing operation in which the CPU 41a writes various variable data to the RAM 41c and temporarily stores them, and a CPU 41a is temporarily stored in the RAM 41c. Variable data read operation to read various variable data, CPU 41a receives input of various signals from the outside of the main control unit 41 via the external bus interface 501, parallel input port 511, serial communication circuit 512, etc., CPU 41a Also performs transmission operations such as outputting various signals to the outside of the main control unit 41 via the external bus interface 501, the serial communication circuit 512, the parallel output port 513, and the like.

The ROM 41b stores a control code indicating a user program (game control processing program for game control), fixed data, and the like. The RAM 41c provides a work area or the like for game control. Here, at least a part of the RAM 41c may be a backup RAM backed up by a backup power supply. That is, even if the power supply to the slot machine 1 is stopped, at least a part of the contents of the RAM 41c is stored for a predetermined period.

An 8-bit free run counter is mounted as the free run counter circuit 507. The random number circuits 508a and 508b are circuits that generate numerical data such as 8-bit random numbers and 16-bit random numbers, which are random number values having a predetermined update range. In this embodiment, the hardware random number generated by the 16-bit random number circuit 508b out of the random number circuits 508a and 508b is used as a random number for internal lottery described later. The timer circuit 509 is a 16-bit programmable timer, which counts down the set timer value based on the input of the control clock CCLK, and outputs an interrupt request signal to the interrupt controller when it reaches 0000H. In this embodiment, the timer circuit 509 can be used to perform periodic interrupt requests and time measurement.

The interrupt controller 510 is a circuit that controls an external interrupt request from an interrupt terminal and an interrupt request from a built-in peripheral circuit (for example, serial communication circuit 512, random number circuits 508a, 508b, timer circuit 509). .. The parallel input port 511 has a built-in 8-bit wide input-only port. Further, the parallel output port 513 included in the main control unit 41 shown in FIG. 4 has a built-in 11-bit wide output dedicated port. The serial communication circuit 512 is a circuit that performs asynchronous serial communication in input / output to the outside.

The address decoding circuit 514 is a circuit for decoding each functional block inside the main control unit 41 and decoding a chip select signal which is a decoding signal for an external device. The chip select signal enables the internal circuit of the main control unit 41 or an external device as a peripheral device to be selectively and effectively operated to be accessed from the CPU 41a.

For example, when the main control unit 41 accesses an area of the storage area of the ROM 41b in which a program or the like is not stored, or when there is an access to an area of the storage area of the RAM 41c for which access prohibition is set. That is, by generating an illegal access reset when there is an access to a memory area that is not accessed in normal operation, the progress of the game is disabled, and the unused area and operation of ROM 41b are disabled. Even when an illegal program is stored in an area unrelated to the above, an unused area of the RAM 41c, or the like, it is possible to prevent the illegal program from being executed.

Further, the main control unit 41 is activated when an internal or external reset occurs. At this time, the value set in the vector table assigned to the ROM 41b and in which the start address of the interrupt process is set. However, it is judged whether it is a value indicating unused or a value indicating the area where the program etc. is actually stored, and if it is neither of the values, it is not started and interrupts. It is possible to prevent in advance that an unintended process is executed due to an occurrence or the like.

The main control unit 41 transmits various commands to the sub control unit 91 via the parallel output port 513. The command transmitted from the main control unit 41 to the sub control unit 91 is sent in only one direction, and the command is not sent from the sub control unit 91 to the main control unit 41. Further, in this embodiment, the command is transmitted to the sub-control unit 91 via the parallel output port 513, that is, the command is transmitted as a parallel signal, but the command is transmitted via the serial communication circuit 512. A configuration in which a command is transmitted to the sub control unit 91, that is, a configuration in which the command is transmitted as a serial signal may be used.

Further, the main control unit 41 inputs the detection states of various switches connected to the game control board 40 from the parallel input port 511. Then, the main control unit 41 executes the main process of gradually shifting according to the detection states of the various switches input from the parallel input ports 511. Further, the main control unit 41 can interrupt the main process and execute the interrupt process when the interrupt occurs. In this embodiment, the timer interrupt process (main) is executed at regular time intervals (about 0.56 ms in this embodiment) when a timeout occurs in the timer circuit 509. Further, the main control unit 41 is set to automatically prohibit other interrupts during the execution of the interrupt process, and when a plurality of interrupts occur at the same time, a predetermined order is obtained. The interrupt to be executed with priority is set. If another interrupt factor occurs during the execution of the interrupt process and the interrupt factor continues even after the interrupt process is completed, the interrupt is interrupted when the interrupt process is completed. The ban will be automatically lifted, at which point a new interrupt will occur. In addition, it is set to automatically prohibit other interrupts during the execution of the interrupt process, and the interrupt prohibition is not automatically canceled when the interrupt process is completed, but the interrupt process is performed. Other interrupts may be prohibited by the program at the start, and the interrupt prohibition may be canceled by the program at the end of the interrupt process.

The main control unit 41 repeatedly loops the processing according to the control state until the detection state of the various switches connected to the game control board 40 changes as the main processing, and responds to the change in the detection state of the various switches. Execute the process of gradual migration. Further, the main control unit 41 executes the timer interrupt process (main) at regular time intervals (about 0.56 ms in this embodiment). The execution interval of the timer interrupt process (main) is set to be longer than the total time of the time in which the process repeated according to the control state in the main process completes and the execution time of the timer interrupt process (main). This means that the process of repeating the timer interrupt process (main) between this time and the next time according to the control state always completes at least one cycle.

An effect switch 56 is connected to the effect control board 90, and a detection signal of the effect switch 56 is input. Further, an effect device such as a liquid crystal display 51, an effect LED 52, speakers 53, 54, and a reel LED 55 is connected, and these effect devices are controlled by a sub control unit 91 described later mounted on the effect control board 90. It is designed to be driven based on. In this embodiment, the sub-control unit 91 mounted on the effect control board 90 controls the output of the effect devices such as the liquid crystal display 51, the effect LED 52, the speakers 53, 54, and the reel LED 55. However, an output control unit that directly controls the output of the effect device is mounted on the effect control board 90 or another board separately from the sub control unit 91, and the sub control unit 91 is based on a command from the main control unit 41. The output pattern of the effect device may be determined, and the output control unit may control the output of the effect device based on the output pattern determined by the sub control unit 91. In such a configuration, the sub control unit 91 and the output control may be used. The output control of the production device is performed by both units. Further, in this embodiment, the liquid crystal display 51, the effect LED 52, the speakers 53, 54, and the reel LED 55 are exemplified as the effect device, but the effect device is not limited to these, and for example, a mechanically driven display is used. A device or a mechanically driven role object may be applied as a directing device.

The effect control board 90 includes a sub control unit 91 composed of a microcomputer provided with a sub CPU 91a, a ROM 91b, a RAM 91c, and an I / O port 91d to control the effect, and a liquid crystal display 51 connected to the effect control board 90. The display control circuit 92 that controls the display, the effect LED 52, the LED drive circuit 93 that controls the drive of the reel LED 55, and the audio output circuit 94 that controls the audio output from the speakers 53 and 54, when the power is turned on or A reset circuit 95 that gives a reset signal to the sub CPU 91a when an initialization command from the sub CPU 91a is not input for a certain period of time, and a switch detection circuit 96 that detects a detection signal input from switches connected to the effect control board 90. , The clock device 97 that outputs time information including date information and time information, and when the power supply voltage supplied to the slot machine 1 is monitored and a voltage drop is detected, a voltage drop signal indicating that fact is sent to the sub CPU 91a. A power failure detection circuit 98 that outputs to the device, other circuits, and the like are mounted.

The sub CPU 91a receives a command transmitted from the game control board 40 to perform various controls for performing the effect, and directly or indirectly controls each part of the control circuit mounted on the effect control board 90. ..

In the game control board 40, the reset circuit 95 has a lower voltage for releasing the reset signal than the reset circuit 49 that gives the system reset signal to the main control unit 41, and the sub control unit 91 controls the main control when the power is turned on. It is designed to start at an earlier stage than the unit 41. On the other hand, the power failure detection circuit 98 is set to have a lower voltage for outputting the voltage drop signal than the power failure detection circuit 48 for outputting the voltage drop signal to the main control unit 41 in the game control board 40, and is set to have a lower voltage when the power is cut. The sub control unit 91 detects a power failure at a stage later than that of the main control unit 41, and performs a power failure process (sub) described later.

Like the main control unit 41, the sub control unit 91 has an interrupt function, generates an interrupt when receiving a command from the main control unit 41, and acquires a command transmitted from the main control unit 41. , Executes command reception interrupt processing to be stored in the buffer. Further, the sub control unit 91 generates an interrupt every time the number of input of the system clock reaches a certain number, that is, at a fixed time interval (about 2 ms), and executes a timer interrupt process (sub) described later. Further, unlike the main control unit 41, the sub control unit 91 interrupts the process when an interrupt occurs based on the reception of a command, even if the timer interrupt process (sub) is being executed. The command reception interrupt process is executed at the same time, and even if the interrupt that triggers the timer interrupt process (sub) occurs at the same time, the command reception interrupt process is executed with the highest priority. Further, the backup power supply is also supplied to the sub control unit 91 at the time of a power failure, and the data stored in the RAM 91c is held while the backup power supply is supplied.

In the slot machine 1 of this embodiment, the medal payout rate changes according to the set value. More specifically, the medal payout rate is changed by using the winning probability according to the set value in the lottery that affects the advantage to the player such as the internal lottery, the navigation stock lottery, and the additional lottery described later. The set value is composed of 6 stages from 1 to 6, with 6 having the highest payout rate, and the smaller the value in the order of 5, 4, 3, 2, 1 the lower the payout rate. That is, when 6 is set as the set value, the advantage is highest for the player, and the smaller the value in the order of 5, 4, 3, 2, 1 is, the lower the advantage is.

In order to change the set value, it is necessary to turn on the power of the slot machine 1 after turning on the setting key switch 37. When the setting key switch 37 is turned on and the power is turned on, the setting value read from the RAM 41c is displayed as a display value on the setting value display 24, and the setting value can be changed by operating the reset / setting switch 38. Move to the changed state. When the reset / setting switch 38 is operated in the setting change state, the display value displayed on the setting value display 24 is updated by 1 (when the setting value 6 is further operated, the setting value is changed to 1). Return). Then, when the start switch 7 is operated, the display value is fixed as the set value. Then, when the setting key switch 37 is turned off, the confirmed display value (setting value) is stored in the RAM 41c of the main control unit 41, and the game shifts to a state in which the game can proceed.

It should be noted that, when the power is turned on while the setting key switch 37 is on, the setting change state may be entered on condition that the door open detection switch 25 detects the opening of the front door 1b. Well, with such a configuration, it is possible to prevent the setting from being changed illegally when the front door 1b is not opened. Further, in the configuration of shifting to the setting change state on condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 corresponds to the opening of the front door 1b after shifting to the setting change state. It is preferable to maintain the setting change state even if the detection is not performed. Therefore, even if the front door 1b is temporarily closed during the setting change, the operation for shifting to the setting change state is performed again. It is not necessary and the setting change operation is not complicated. Further, when the setting key switch 37 is turned off after the start switch 7 is operated to confirm the set value after shifting to the setting change state, the door open detection switch 25 detects the front door 1b to be opened. On the condition that the setting is changed, the setting change state may be terminated and the game may proceed to a state in which the game can proceed. Even in such a configuration, the front door 1b is illegally opened. It is possible to prevent the setting from being changed.

Further, in order to confirm the set value, the setting key switch 37 may be turned on after the game is finished and the bet number is not set. When the setting key switch 37 is turned on in such a situation, the setting value display 24 displays the setting value read from the RAM 41c, so that the setting value can be confirmed. In the setting confirmation state, the progress of the game is impossible, and by turning off the setting key switch 37, the setting confirmation state ends and the game returns to the state in which the progress is possible.

After the game is over, when the setting key switch 37 is turned on when the number of bets is not set, it is a condition that the door opening detection switch 25 detects the opening of the front door 1b. In addition, a configuration that shifts to the setting confirmation state may be used, and such a configuration can prevent the setting value from being illegally confirmed when the front door 1b is not opened. Further, in the configuration of shifting to the setting confirmation state on the condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 corresponds to the opening of the front door 1b after shifting to the setting confirmation state. It is preferable to maintain the setting confirmation state even if the detection is not performed. Therefore, even if the front door 1b is temporarily closed during the setting confirmation, the operation for shifting to the setting confirmation state again is performed. It is not necessary and the setting confirmation operation is not complicated. Further, when the setting key switch 37 is turned off after the start switch 7 is operated to confirm the set value after shifting to the setting confirmation state, the door open detection switch 25 detects the front door 1b to be opened. On the condition that the setting is confirmed, the setting confirmation state may be terminated and the game may be returned to the state in which the game can proceed. Even in such a configuration, the front door 1b is illegally not opened. It is possible to prevent the set value from being confirmed.

In the slot machine 1 of the present embodiment, the main control unit 41 determines whether or not a voltage drop signal from the power failure detection circuit 48 is detected each time the timer interrupt process (main) is executed. When the determination process is performed and it is determined that the voltage drop signal is detected in the power failure determination process, the power failure process (main) for setting the data for determining whether the data in the RAM 41c is normal at the next return is performed. Execute.

Then, the main control unit 41 returns the processing state of the main control unit 41 to the state before the power failure based on the data stored in the RAM 41c, provided that the data in the RAM 41c is normal at the time of its activation. However, when the RAM 41c data is not normal, it is determined that the RAM is abnormal, the RAM error error code is set in the register to control the RAM error error state, and the progress of the game is disabled.

The error state shifts to the normal error state that is canceled by the reset operation (operation of the reset / setting switch 38 or the reset switch 23) and the setting change state described above, and is canceled until a new setting value is set. The RAM error state is a special error state, including the special error state without, and once controlled to the RAM error error state, it shifts to the setting change state and is released until a new setting value is set. Will not be done.

Further, the sub control unit 91 also determines whether or not the voltage drop signal from the power interruption detection circuit 98 is detected in the timer interrupt processing (sub), and when it is determined that the voltage drop signal is detected, At the next return, the power interruption process (sub) for setting the data for determining whether the data in the RAM 91c is normal is executed.

Then, the sub-control unit 91 returns the processing state of the sub-control unit 91 to the state before the power failure based on the data stored in the RAM 91c, provided that the data in the RAM 91c is normal at the time of its activation. However, when the data in the RAM 91c is not normal, it is determined that the RAM is abnormal, and the RAM 91c is initialized. In this case, unlike the main control unit 41, only the RAM 91c is initialized, and the execution of the effect is not disabled.

Further, even if it is determined that the data in the RAM 91c is normal at the time of its activation, the sub control unit 91 is activated when it receives a setting command described later indicating that the setting has been changed from the main control unit 41. The RAM 91c is initialized even when neither the return command nor the setting command, which will be described later, indicating that the control state of the main control unit 41 has been restored is received even after a certain period of time has elapsed. In this case as well, only the RAM 91c is initialized, and the execution of the effect is not disabled.

Next, the initialization of the RAM 41c of the main control unit 41 will be described. The usable area of the storage area of the RAM 41c of the main control unit 41 is divided into a game RAM area, an unused area 4, and a non-game RAM area. Further, the game RAM area is divided into a special work, an important work, a general work, an unused area 3, and a game stack area. The special work is a work in which data that is not initialized even if the set value is changed is stored, and software random numbers, set values, data indicating the game state, and the like are stored. The important work is a work in which data that is inconvenient to be initialized at the end of a specific game state (RB, BB) is stored, and is the LED display data, input port, output port input / output data, and game time. The timekeeping counter etc. are stored. The general work is a work in which data that can be initialized at the end of a specific game state is stored, and a stop symbol, the number of medals to be paid out, and the like are stored. The unused area 3 is a work that is not used in any of the programs. The game stack area is an area in which data saved from the register of the main control unit 41 is stored during execution of the game program described later.

In this embodiment, the main control unit 41 displays the data of the RAM 41c when the setting key switch 37 is started when the setting key switch 37 is ON and the data of the RAM 41c is destroyed when the setting key switch 37 is started. Each initial is when the initialization condition consisting of five is satisfied: when it is not destroyed, when the setting change state is finished, when the specific game state (RB, BB) is finished, and when one game is finished. Five types of initialization with different regions to be initialized are performed according to the conversion conditions.

Initialization 0 is initialization performed when the data in the RAM 41c is destroyed at the time of startup with the setting key switch 37 ON, and initialization 0 initializes all the usable areas. .. The initialization 1 is the initialization performed when the data of the RAM 41c is not destroyed at the time of starting with the setting key switch 37 ON, and in the initialization 1, the area other than the special work of the game RAM area is not. All areas of the game RAM area are initialized. The initialization 2 is the initialization performed after the setting change state is completed by starting the setting key switch 37 in the ON state, and in the initialization 2, the special work and the game stack area (in use) in the game RAM area. Areas other than) are initialized. The initialization 3 is an initialization performed at the end of a specific game state, and in the initialization 3, the general work, the unused area 3, and the game stack area (unused) in the game RAM area are initialized. The initialization 4 is an initialization performed at the end of one game, and in the initialization 4, the unused area 3 of the game RAM area and the game stack area (unused) are initialized. The storage area of the data indicating the set value and the game state is allocated to the special work, and the data of the RAM 41c is not destroyed at the time of starting with the setting key switch 37 ON, that is, the data of the RAM 41c. If is normal and the setting is changed, the set value and the data indicating the game state will be retained. Further, the storage area of the timer counter, which will be described later, is allocated to the important work, and is held without being initialized at the end of the game or the end of a specific game state.

Further, when the main control unit 41 of this embodiment executes the above-mentioned initialization, the start address and the end address are specified as the RAM addresses to be initialized, so that the main control unit 41 is one byte from the specified start address. After overwriting the data of 1 with 0, the logical sum of the 1-byte data is calculated, and if the calculation result is 0, the process of moving to the next address is repeated until the specified end address is reached. , Initializes the RAM area in the specified address range.

When the main control unit 41 in this embodiment is activated due to the occurrence of a reset, the main control unit 41 is set at startup. In the startup setting, the status flag provided in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result and the execution result of the instruction, and particularly includes the interrupt master permission flag that sets the prohibition / permission of interrupt. Since the initial value of the interrupt master permission flag is a value indicating the prohibition of interrupts, the main control unit 41 is started in a state where interrupts are prohibited. After that, after setting various functions by referring to the HW parameters described later, when a reset occurs according to the program stored in the program / data area, it is started in the interrupt-prohibited state and then executed first. Start the initial setting process.

In the initial setting process, the main control unit 41 first sets the interrupt to prohibit, then determines whether or not the setting key switch 37 is in the ON state at startup, and the setting key switch 37 is ON at startup. When it is determined that the state is in the state, the process shifts to the setting change process, and the RAM 41c is initialized at the start of the setting change process. At this time, if the data in the RAM 41c is normal, by holding the special work and initializing the other areas, a part of the control state (set value, game state, etc.) before the change can be obtained even after the setting is changed. On the other hand, if the data in the RAM 41c is not normal, the abnormality in the data in the RAM 41c can be surely eliminated by initializing all the areas of the usable area including the special work. It has become.

After initializing the RAM 41c, interrupt is set to allow, the set value is updated by 1 in the range of 1 to 6 each time the reset / setting switch 38 is operated, and after the ON of the start switch 7 is detected, The set value when the ON of the setting key switch 37 is detected is stored in the RAM 41c, and the setting change process is completed.

In this way, the initial value of the interrupt master permission flag is a value indicating that interrupts are prohibited, and the main control unit 41 is started in a state where interrupts are prohibited, and even in the initial setting process after startup, first , Since the initial setting process is executed after the interrupt is set to prohibit, it is possible to prevent an unintended interrupt from occurring.

Further, after the setting change processing is completed, the main control unit 41 executes a main process for stepwise processing according to the progress of the game for each game unit. Further, in the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. Then, after the setting change process is completed, the main process is started from the stage before the process of initializing the RAM 41c in the main process, and the initialization of the RAM 41c after the setting change process is completed and the game unit. Initialization of each RAM 41c can be performed by a common process.

In the slot machine 1 of this embodiment, a specified number of bets that can be set according to the gaming state (RT0 to RT4, RB) (in this embodiment, 3 for RT0-4 and 2 for RB) is determined. Therefore, it is possible to start the game on the condition that a predetermined number of bets set according to the gaming state is set. In this embodiment, the winning line LN is activated when a predetermined number of bets are set according to the gaming state.

Then, in this embodiment, when all reels 2L, 2C, and 2R are stopped, the activated winning line (in the case of this embodiment, all winning lines are always activated, so that the following is valid. A winning line is obtained when a combination of symbols called a role is aligned on the winning line (the winning line is simply called the winning line). The combination may be a combination of the same symbols or a combination including different symbols.

The types of winning roles are determined according to the game status, but they can be broadly divided into small roles that involve paying out medals and re-starting the next game without the need to set the number of bets. There is a game role and a special role with a transition to a game state that is advantageous to the player. In the following, the small role and the replay role are collectively referred to as the general role. In order for each winning combination determined according to the game state to be won, it is necessary to win the internal lottery described later and set the winning flag of the winning combination in the RAM 41c. Of the winning flags for each of these combinations, the winning flags for the small combination and the replay combination are valid only in the game in which the flags are set, and are invalid in the next game, but the winning flag for the special combination is , It is valid until the combinations of the allowed combinations are complete by the flag, and is invalid in the game in which the combinations of the allowed combinations are complete. That is, once the winning flag of the special role is won, even if the combination of the winning combination permitted by the flag cannot be aligned, the winning flag is not invalidated and is carried over to the next game. It becomes.

Hereinafter, the internal lottery of this embodiment will be described. The internal lottery is performed before the display results of all reels 2L, 2C, and 2R are derived (specifically, the start switch 7) whether or not the main control unit 41 allows the winning of each of the above-mentioned combinations. Is determined at the time of detection). In the internal lottery, first, a random number value (an integer of 0 to 65535) for the internal lottery is acquired when the start switch 7 is detected. Specifically, the value generated by the random number circuit 508b and stored in the random number value register of the random number circuit 508b is set in the lottery work assigned to the RAM 41c. Then, for each combination determined according to the game state (RT0-4, RB), the numerical data stored in the lottery work and each combination determined according to the current game state, the number of bets, and the set value. Judgment as to whether or not to allow winning is performed according to the number of judgment values of.

In the internal lottery, the number of judgment values determined according to the winning combination, the current game state, and the set value to be the target of the internal lottery is sequentially added to the random number value for the internal lottery (numerical data stored in the lottery work). When the numbers are added and the result of the addition overflows, it is determined that the winning combination has been won. Therefore, the winning combination is won with a probability (number of determination values / 65536) according to the magnitude of the number of determination values.

Then, when the winning of any of the winning combinations is determined, the winning flag corresponding to the winning combination is set in the internal winning flag storage work assigned to the RAM 41c. The internal winning flag storage work is composed of a 2-byte storage area, in which the upper byte is assigned as the special role storage work in which the winning flag of the special combination is set, and the lower byte is the winning of the general combination. It is assigned as a general role storage work for which a flag is set. Specifically, when the special role is won, the winning flag of the special role indicating that the special role has been won is set in the special role storage work, and the winning flag set in the general role storage work is cleared. In addition, when the general role is won, the winning flag of the general role indicating that the general role has been won is set in the general role storage work. If neither combination nor combination of combinations is won, only the general combination storage work is cleared.

Next, the stop control of the reels 2L, 2C and 2R will be described. The main control unit 41 refers to the table index and the table creation data stored in the ROM 41b when the reel starts to rotate and when the reel stops and the reel that is still rotating remains. , Create a stop control table for each spinning reel. Then, when any operation corresponding to the rotating reel is effectively detected among the stop switches 8L, 8C, and 8R, the stop control table of the corresponding reel is referred to, and the referenced stop control table is slipped. Based on the number of frames, control is performed to stop the rotation of the reels 2L, 2C, and 2R corresponding to the operated stop switches 8L, 8C, and 8R.

In this embodiment, a value of 0 to 4 is set as the number of sliding frames, and it is possible to pull in a maximum of 4 symbols to stop the reel after detecting the stop operation. That is, the stop position of the symbol can be specified from a range of up to 5 frames including the stop operation position where the stop operation is detected. Further, since it is necessary to move one frame to move the reel for one symbol, it is possible to pull in a maximum of four symbols after detecting the stop operation to stop the reel, and stop when the stop operation is detected. It is possible to specify the stop position of a symbol from a range of up to 5 symbols including the operation position.

In this embodiment, when any of the winning combinations is won, when the stop operation is performed, the winning winning combinations can be stopped together on the winning line within a pull-in range of up to 4 frames. If possible, control is performed to align and stop the winning combination, and control is performed to stop the winning combination without aligning it within a pull-in range of a maximum of 4 frames. If the special role and the small role are won at the same time, such as when the special role is carried over from before the previous game and the small role is won, the maximum on the winning line is when the stop operation is performed. If the winning small wins can be aligned and stopped within the pull-in range of 4 frames, the control is performed to align and stop the small wins that have been won within the pull-in range of up to 4 frames on the winning line. If it is not possible to draw in, if it is possible to align and stop the winning special roles in the drawing range of up to 4 frames on the winning line, control is performed to align and stop them, and the winning combination is Control is performed so that the four frames are stopped without being aligned within the pull-in range. That is, in such a case, the control of aligning the small winning combination on the winning line is prioritized over the special winning combination, and the special winning combination can be won only when the small winning combination cannot be drawn in. If the special role and the small role can be drawn in at the same time, only the small role will be drawn in, and the small role will not be aligned on the winning line at the same time as the special role. In addition, when a special role and a small role are won at the same time, the control to align the special role on the winning line is prioritized over the small role, and only when the special role cannot be drawn in, the small role is placed on the winning line. Alignment control may be performed.

Further, in this embodiment, when the special role and the re-game combination are won at the same time, such as when the special role is carried over from before the previous game and the re-game combination is won, the stop operation is performed. At that time, control is performed so that the symbols of the re-game combination are aligned and stopped within a pull-in range of up to 4 frames on the winning line. In this case, the symbols constituting the re-game combination or the symbols constituting the re-game combination to be elected at the same time are arranged within 5 symbols, that is, within 4 frames for each of the reels 2L, 2C, and 2R. Since it can always be stopped at any position within the pull-in range of 4 frames, if the special role and the re-game combination are won at the same time, regardless of the operation timing of the stop switches 8L, 8C, 8R by the player. Instead, all the re-game roles will be awarded. That is, in such a case, the control of aligning the re-game combination on the winning line is prioritized over the special combination, and the re-game combination is sure to win the prize. If the special role and the re-game role can be drawn in at the same time, only the re-game role is drawn in, and the special role will not be aligned on the winning line at the same time as the re-game role.

In this embodiment, the reel stop control is performed using a stop control table that can specify the number of slip frames for each timing when the stop operation is performed. However, the stop position that can specify the stop position can be specified. A configuration that specifies the stop position from the table and stops the reel at the specified stop position, and searches for a stop position that can be stopped at the timing when the stop operation is performed without using the stop control table or stop position table. A configuration that performs stop control to specify and stop the reel at the specified stop position, stop control using the stop control table, stop control using the stop position table, and stop without using the stop control table or stop position table. A configuration in which stop control by searching and specifying a stop position may be used together, or a configuration in which a stop control table or a stop position table is partially changed to perform stop control may be used.

In the present embodiment, the main control unit 41 measures the game time, which is the time elapsed from the time when the rotation of the reel is started after the start of the game, that is, the time when the rotation of the reel is started. After the end of one game, a specified number of bets are set by inserting medals, etc., and when the game start operation is performed with the game start operation enabled, the reel rotation of the previous game starts. If the game time at which counting is started from a time point is equal to or longer than the specified time (4.1 seconds in this embodiment), that is, if the specified time has elapsed from the start time of reel rotation of the previous game, no wait is generated. At that point, the rotation of the reel for the game in the game is started. On the other hand, after the end of one game, a specified number of bets are set by inserting medals, etc., and when the game start operation is performed with the game start operation enabled, the reel rotation of the previous game starts. If the game time at which timing is started from that point is less than the specified time, that is, if the specified time has not elapsed since the start of reel rotation in the previous game, a wait is generated and the reel rotation is started at that point. Instead, the game waits until the game time at which timing is started from the start of reel rotation of the previous game reaches the specified time, and when the specified time is reached, the rotation of the reel is started.

In this embodiment, the main control unit 41 controls to output an external output signal indicating a gaming state, an error occurrence status, and the like. These external output signals are output to hall equipment such as a hall computer via an information providing terminal board of a game store (hall) in which the external output board 1000 and the slot machine 1 are installed.

The main control unit 41 has a medal IN signal indicating the number of medals used for setting the number of bets, a medal OUT signal indicating the number of medals given to the player due to the occurrence of a prize, and a game state of RB (regular bonus). An RB signal indicating that the game is in progress, a BB signal indicating that the game state is in BB (big bonus), an ART signal indicating the start of ART described later, a door opening signal indicating that the front door 1b is open, and a door opening signal described later. A setting change signal indicating that the mode has been changed to the setting change mode, an insertion error signal indicating an abnormality of the medal selector, and a payout error signal indicating an abnormality of the hopper unit 34 are output.

The external output board 1000 is provided with a relay circuit, a parallel / serial conversion circuit, terminals for each output signal, and a connector to be connected for electrically connecting to the circuit of the information providing terminal board. Of the signals output from the game control board 40, the medal IN signal, medal OUT signal, RB signal, BB signal, and ART signal are directly output to the information providing terminal board as pulse signals via the relay circuit. .. On the other hand, the door open signal, the setting change signal, the input error signal, and the payout error signal are converted into a security signal which is a serial signal that can be individually identified by the parallel serial conversion circuit to provide information. It is output to the terminal board.

Next, a command transmitted by the main control unit 41 to the sub control unit 91 will be described.

In this embodiment, the main control unit 41 gives the sub control unit 91 a number of input commands, a credit command, a game state command, an ART state command, an internal winning command, a freeze command, an ART lottery result command, and a reel acceleration information command. , Stop operation command, number of slip frames command, stop command, game end command, winning number command, payout start command, payout end command, standby command, stop command, error command, return command, setting command, setting confirmation command, Send multiple types of commands, including door commands and operation detection commands. These commands consist of 1-byte type data indicating the type of the command and 1-byte extended data indicating the content of the command, and the sub-control unit 91 can determine the type of the command from the type data.

The number of inserted medals command is a command that can specify the number of inserted medals, that is, the number of medals used to set the number of medals, and is a state from the end of the game (after changing the setting) to the start of the game, when the power is restored. , Or when a medal is inserted in a state where the specified number of bets is not set, or when the MAXBET switch 6 is operated to set the bet number, the medal is transmitted. Further, since the input number command is transmitted when the bet number setting operation is performed, it is possible to identify that the bet number setting operation has been performed by receiving the input number command.

The credit command is a command that can specify the number of medals stored as credits, is a state from the end of the game (after changing the setting) to the start of the game, and in a state where a specified number of bets are set. Sent when a medal is inserted and credits are added.

The game state command is a command that can specify the game state (RT0 to 4, RB) of the game, and is transmitted when the start switch 7 is operated to start the game.

The ART status command is a command that can specify whether or not AT is in progress, whether or not it is in ART, the number of games remaining until the specified number of games described later is reached, the number of games remaining in the precursory period, and the number of games remaining in ART. , When the game starts and is sent after the game state command.

The internal winning command is a command that can specify the internal lottery result, and is transmitted when the start switch 7 is operated to start the game and after the ART status command. The internal winning command includes a first internal winning command and a second internal winning command, and a state in which navigation notification is performed when a notification target combination to be notified in an internal lottery is won (AT). (When navigation notification is performed during medium or non-AT), the first internal winning command that can specify the type of winning notification target combination and the stop order that is advantageous for the player is transmitted, and the navigation notification is sent. If it is not performed (when navigation notification is not performed during non-AT), the type of the winning notification target combination can be specified, but the stop order advantageous to the player cannot be specified. The command is sent.

The game status command, ART status command, and internal winning command are transmitted when the start switch 7 is operated and the game starts. Therefore, by receiving these commands, the start switch 7 is operated and the game starts. It is possible to identify that.

The freeze command is a command that can specify whether or not the game is controlled to a freeze state that delays the progress of the game for a predetermined period, and if it is controlled to the freeze state, the type can be specified, and when the game starts. It is sent after the internal winning command is sent.

The ART lottery result command is a command that can specify whether or not the ART lottery or the additional lottery, which will be described later, has been won, the number of games of the winning ART or the number of games to be added, and is when the game starts and the ART is started. It is transmitted after the internal winning command is transmitted in the game in which the lottery or the additional lottery is performed.

The reel acceleration information command is a command that can specify that the reel rotation starts as the game progresses, and is transmitted when the reel rotation starts as the game progresses. Since it is also transmitted when the reel starts rotating with the end of the freeze state, after the start of the freeze state is specified by the freeze command, the reel acceleration information command is received to accompany the progress of the game. Not only the rotation of the reel starts, but also the end of the frozen state can be specified.

The stop operation command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, or the area number of the stop operation position of the corresponding reel, and is used for the stop operation of each reel. It is transmitted every time the accompanying stop control is performed.

The slide frame number command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, and the number of slide frames that move from the stop operation of the corresponding reel to the stop. Therefore, each time the stop control associated with the stop operation of each reel is performed, the corresponding stop operation command is transmitted and then transmitted.

The stop command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, or the area number of the stop position of the corresponding reel, and is a stop control associated with the stop operation of each reel. Is sent after the corresponding slip frame count command is sent each time.

The stop operation command, the number of sliding frames command, and the stop command can all specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, and are accompanied by the stop operation of each reel. Since it is transmitted every time the stop control is performed, it is possible to specify that the stop operation of any of the reels has been performed and the reel to be stopped by receiving these commands.

The game end command is a command that can specify that the game has ended, and is transmitted when the player presses the stop switch to stop the third stop reel and releases the stop switch.

The winning number command is a command that can specify the combination of symbols aligned on the winning line LN, the presence or absence of winning, the type of winning, and the number of medals to be paid out at the time of winning, so that the player stops the third stop reel. It is when the stop switch is pressed and the stop switch is released, and is transmitted after the game end command is transmitted.

Both the game end command and the winning number command are transmitted when the player presses the stop switch to stop the third stop reel and releases the stop switch. Therefore, by receiving these commands, It is possible to identify that all the operations necessary for advancing one game have been completed.

The payout start command is a command for notifying the start of payout of medals, and is transmitted when the payout of medals by winning a prize or settlement of credits (including the medal used for setting the number of bets) is started. In addition, the payout end command is a command for notifying the end of payout of medals, and is transmitted when the payout of medals by winning a prize and settlement of credits is completed.

The standby command is a command indicating that the game shifts to the standby state, and when the game shifts to the standby state after the estimated end time (60 seconds in this embodiment) elapses without setting the number of bets after one game ends, credits are given. It is sent after the payout of medals by settlement (including the medal used to set the number of bets) is completed and the payout end command is sent.

The stop command is a command indicating the occurrence or release of the stop state, and when the ending effect waiting time elapses after the end of the BB, the stop command indicating the occurrence of the stop state is transmitted and the reset operation is performed. When the stop state is released, a stop command indicating the release of the stop state is transmitted.

An error command is a command that indicates the occurrence or cancellation of an error state and the type of error state. When an error is determined and controlled to an error state, an error command indicating the occurrence of an error state and its type is sent and reset. When the operation is performed and the error state is cleared, an error command indicating the error state is cleared is sent.

The return command is a command indicating that the main control unit 41 has returned to the control state before the power failure, and is transmitted when the main control unit 41 returns to the control state before the power failure.

The setting command is a command that indicates the start or end of the setting change state and the setting value after the setting change. When the setting change state is entered, the setting command indicating the start of the setting change state is sent, and when the setting change state ends. A setting command indicating the end of the setting change state and the setting value after the setting change is sent. Further, since the control state of the main control unit 41 is initialized with the transition to the setting change state, it is possible to specify that the control state of the main control unit 41 has been initialized by the setting command indicating the start of the setting. ..

The setting confirmation command is a command that indicates the start or end of the setting confirmation state. When the setting confirmation state is entered, the setting confirmation command that indicates the start of the setting confirmation is sent, and the setting that indicates the end of the setting confirmation is sent when the setting confirmation state ends. A confirmation command is sent.

The door command is a command indicating the detection state of the door open detection switch 25, that is, on (open state) / off (closed state), and is the number of bets for the next game when the power is turned on and when one game ends (after the game ends). Is transmitted when the detection state of the door open detection switch 25 changes (on to off, off to on) (before the setting of can be started).

The operation detection command is a command indicating the detection state (on / off) of the operation switches (MAXBET switch 6, start switch 7, stop switch 8L, 8C, 8R), and is transmitted at regular time intervals.

Of these commands, commands other than the door command and the operation detection command are generated in the main process, temporarily stored in the command queue provided in the RAM 41c, and transmitted in the subsequent timer interrupt process (main) command transmission process. To.

On the other hand, the door command is generated in the door monitoring process of the timer interrupt process (main), temporarily stored in the command queue provided in the RAM 41c, and transmitted in the subsequent command transmission process of the timer interrupt process (main). To.

Further, the operation detection command is generated based on the detection state of the switch every time the command transmission process of the timer interrupt process (main) is executed 10 times, and is temporarily stored in the command queue provided in the RAM 41c. , It is transmitted in the command transmission process of the timer interrupt process (main) after that.

Next, the effect control executed by the sub control unit 91 based on the command transmitted by the main control unit 41 to the effect control board 90 will be described. When the sub control unit 91 receives a command from the main control unit 41, the sub control unit 91 executes a command reception interrupt process. In the command reception interrupt process, the command acquired from the command transmission line is stored in the reception buffer provided in the RAM 91c.

In the timer interrupt processing (sub), the sub control unit 91 determines whether or not an unprocessed command is stored in the reception buffer, and if an unprocessed command is stored, the earliest of them. The control pattern table stored in the ROM 91b is referred to based on the command received in the step, and the liquid crystal display 51, the effect LED 52, the speaker 53, 54, the reel LED 55, etc. are based on the control contents registered in the control pattern table. Controls the output of various production devices. In the control pattern table, for each of a plurality of types of effect patterns, a display pattern of the liquid crystal display 51 corresponding to the type of command, a lighting mode of the effect LED 52, an output mode of the speakers 53 and 54, a lighting mode of the reel LED 55, etc. The control patterns of these effect devices are registered, and when the sub-control unit 91 receives a command, the sub-control unit 91 of the control patterns registered corresponding to the effect patterns set in the RAM 91c in the game of the control pattern table. Among them, the control pattern corresponding to the type of the received command is referred to, and the output control of the effect device is performed based on the control pattern. As a result, the effect according to the effect pattern and the progress of the game is executed.

If the sub-control unit 91 receives a new command during the execution of the effect triggered by the reception of a certain command, the sub-control unit 91 stops the effect based on the control pattern being executed and uses the newly received command. An effect based on the corresponding control pattern is executed. That is, even if the production is not completed to the end, when a new command is received, the production that was being executed is canceled and a new production is performed unless the new command received is not the command that triggers the new production. The effect based on the command will be executed.

When the internal winning command is received, the effect pattern is selected at a selection rate according to the result of the internal lottery indicated by the internal winning command, and is set in the RAM 91c. The selection rate of the effect pattern is registered in the effect table stored in the ROM 91b, and when the sub-control unit 91 receives the internal winning command, it is stored in the effect table according to the result of the internal lottery indicated by the internal winning command. The registered selection rate is referred to, one of the effect patterns is selected from a plurality of types of effect patterns according to the selection rate, and the selected effect pattern is set in the RAM 91c as the effect pattern of the game. Therefore, even if the same command is received, a different control pattern is selected depending on the effect pattern selected when the internal winning command is received, and as a result, different effects may be performed depending on the effect pattern.

In the slot machine 1 of the present embodiment, the main control unit 41 has a notification period during which navigation notification can be executed to notify the stop order that is advantageous to the player according to the internal lottery result by the lighting mode of the game auxiliary display 12. It is possible to control the assist time (hereinafter referred to as AT).

When the main control unit 41 is controlled by the AT, the main control unit 41 executes the navigation notification by winning the navigation target combination according to the game state, and also transmits a push order command to the sub control unit 91. As a result, the navigation effect using the liquid crystal display 51 or the like is executed. Further, in the present embodiment, the main control unit 41 can execute the navigation notification and execute the navigation effect by satisfying certain conditions even in the normal state not controlled by the AT.

FIG. 6 is an address map of the memory area used by the main control unit 41. As shown in FIG. 6, the memory area used by the main control unit 41 includes a memory area (0000H to 7FFFH) allocated to the ROM 41b and a memory area (F000H to FFFFH) allocated to the RAM 41c.

The memory area of the ROM 41b includes a program / data area (0000H to 26FFH) in which a program and fixed data are stored, a ROM comment area (2700H to 277FH) in which arbitrary data such as a program title and version can be set, and a later description. Vector table area (2780H to 27A7H) where the upper address of the subroutine of the CALLV instruction and the start address of the timer interrupt process (main) are set, and the parameters for setting the internal functions of the main control unit 41 in terms of hardware. The HW parameter area (27A8H to 27FFH) in which is set and the unused area (2800H to 7FFFH) in which access is prohibited are included.

The parameters set in the HW parameter area in the ROM 41b include the final address (HPRGEND) of the ROM area used in the program / data area, the start address (HRAMSTAT) and the final address (HRAMEND) of the RAM area for which access is prohibited.

The memory area of the RAM 41c is an internal function register area (F4B0H to F4B0H) in which a usable area (F000H to F400H) that can be used as a work and a register group for controlling each function mounted on the main control unit 41 are stored. F6FFH) and unused areas (F401H to F4AFH, F700H to FFFFH) whose access is prohibited.

FIG. 7 is an address map of the program / data area in the ROM 41b of the main control unit 41 and the usable area in the RAM 41c.

As shown in FIG. 7A, the program / data area in the ROM 41b includes a game program area in which a game program related to the progress of the game is stored, a game data area in which game data used by the game program is stored, and a game data area in which the game data used by the game program is stored. It includes a used area 1, a non-game program area in which a non-game program not related to the progress of a game is stored, a non-game data area in which non-game data used by the non-game program is stored, and an unused area 2. ..

The progress of the game is to proceed with a series of processes constituting the game, and if it is a slot machine, the stage where the number of medals can be set and the game can be started, the game is started and the reels are rotated. The stage of causing the reel to be stopped, the stage of deriving the display result, and the stage of giving the value of a medal or the like according to the display result are advanced.

The game program area related to the progress of the game and the non-game program not related to the progress of the game are separately allocated, and are allocated rearward in the storage area of ROM 41b among the game program area and the non-program area. Since an unused area 1 of at least 16 bytes or more is allocated to the area in front of the non-programmed area, a game program area related to the progress of the game and a non-game program not related to the progress of the game are stored in the storage area. It can be easily identified according to the difference between the two.

Further, the game program area and the game data area, and the non-game program area and the non-game data area are allotted to continuous areas, while the game program area and the game data area related to the progress of the game and the non-game area not related to the progress of the game. Since the game program and the non-game data area are allocated to areas that are not continuous with an unused area 1 of at least 16 bytes or more in between, the game program area and the game data area related to the progress of the game and the progress of the game The non-game program and the non-game data area, which are not involved, can be easily specified according to the difference in the storage area.

In the above, the front and back of the storage area are the magnitude relations of the address values assigned to the storage area, and the smaller address is the front and the larger address is the rear. Therefore, the storage area allocated after the one storage area corresponds to the storage area having an address value larger than that of the one storage area, and the storage area allocated before the one storage area. , A storage area whose address value is smaller than that of one storage area is applicable.

Further, the game program may be allocated behind the non-game program area, and the unused area may be allocated in front of the game program allocated behind the non-game program area. A game program area related to the progress of the game and a non-game program not related to the progress of the game can be easily specified according to the difference in the storage area.

Further, the game program area and the non-game program area may be allocated to adjacent areas with the unused area 1 in between, and even with such a configuration, the game program area related to the progress of the game , A non-game program that is not related to the progress of the game can be easily identified according to the difference in the storage area.

Further, since 0 values are stored in all the unused areas 1 and 2 of the program / data area of the ROM 41b, the game program area and the game data area, the non-game program area and the non-game data, The unused areas 1 and 2 can be easily distinguished, and even when invalid data is stored in the unused areas 1 and 2, it can be easily found.

It should be noted that 1 may be stored in all the unused areas 1 and 2 of the program / data area of the ROM 41b, and even in such a configuration, the game program area, the game data area, and the non-game The program area and non-game data can be easily distinguished from the unused areas 1 and 2, and even when invalid data is stored in the unused areas 1 and 2, it can be easily found. ..

Further, if the game program area and the non-game program area are allocated to separate areas, the game program area and the non-game program area may be allocated to adjacent areas. Even with such a configuration, the game program area related to the progress of the game and the non-game program not related to the progress of the game can be easily specified according to the difference in the storage area.

Further, both the game program area and the non-game program area start from an address (0H) in which the lower four digits have the same value when the address is expressed in binary, and the program / data area of ROM 41b. Of these, the game program area related to the progress of the game and the non-game program area not related to the progress of the game can be easily distinguished from other areas.

In addition, both the game program area and the non-game program area not only start from an address having the same 0 in the lower 4 digits when the address is expressed in binary, but also in the lower 1 digit when the address is expressed in hexadecimal. Starts from the same 0 address (0H), so the game program area and the non-game program area can be easily distinguished from other areas not only when the address is expressed in hexadecimal but also when the address is expressed in hexadecimal. can do.

In both the game program area and the non-game program area, regardless of whether the address is expressed in binary or hexadecimal, the lower N (N is a natural number of 1 or more) starts from the address having the same value. The game program area and the non-game program area can be easily distinguished from other areas. For example, the value of the lower N (N is a natural number of 1 or more) digits is the same 1. The same effect can be obtained with a configuration starting from the address of.

As shown in FIG. 7B, the usable area of the RAM 41c includes a game RAM area used as a work by the game program, a non-game RAM area used by the non-game program as a work, and an unused area 4. The game RAM area includes a special work, an important work, a general work, an unused area 3, and a game stack area in which the game program saves data, and the non-game RAM area includes a game. An area that can be referred to by the program, an area that cannot be referred to by the game program, and a non-game stack area in which the non-game program saves data are included. In this embodiment, the game stack area and the non-game stack area are individually provided in different areas, but a single stack area shared by the game program and the non-game program may be provided.

The unused area 3 is an area in which neither the game program nor the non-game program is used, and is an area that is surplus with respect to the game RAM area having a predetermined capacity.

Further, the unused area 4 is an area of 16 bytes or more in which neither the game program nor the non-game program is used. Since the game RAM area and the non-game RAM area are allocated to areas that are not continuous with the unused area 4 in between, the game RAM area used by the game program related to the progress of the game and the non-game RAM area not related to the progress of the game The non-game RAM area used by the game program and the non-game RAM area can be easily specified according to the difference in the storage area.

In the following, the game program area, the game data area, and the game RAM area may be collectively referred to as a game area, and the non-game program area, the non-game data area, and the non-game RAM area may be collectively referred to as a non-game area. .. Further, the unused area 1, the unused area 2, the unused area 3 and the unused area 4 may be collectively referred to as an unused area.

Based on the parameters set in the HW parameter area, the main control unit 41 permits access to the available area of the RAM 41c when the access is prohibited in the program / data area of the ROM 41b. When there is access to an area that is not set to, when there is access to an area other than the program / data area in ROM 41b, or when there is access to an area other than the usable area in RAM 41c. That is, since the progress of the game is disabled by generating an illegal access reset when there is an access to a memory area that is not accessed in normal operation, an area that is not related to the unused area or operation of the ROM 41b. Even when an illegal program is stored in an unused area of the RAM 41c, it is possible to prevent the illegal program from being executed.

In particular, in this embodiment, the game program area and the non-game program area are allocated to the program / data area of the ROM 41b that is permitted to be accessed by the program, and the game program area is assigned to the front of the non-game program area behind the game program area. An unused area 1 is allocated to the area, and a group of programs / data areas including an area from the start address of the game program area to the final address of the non-game program based on the parameters set in the HW parameter area. While the access to the area (the area from the game program area to the non-game data area) is collectively set to allow, the other areas, that is, the game program, the game data, and the non-game program among the program / data areas, Since access to the area after the non-game data in which the non-game data is not stored is prohibited, it is possible to prevent unintended control by a malicious program or illegal data.

Further, in the program / data area of the ROM 41b that is permitted to be accessed by the program, the game area is allocated behind the non-game program area, and the unused area is in front of the game program area behind the non-game program area. Is assigned, and access to a group of areas including the area from the start address of the non-game program area to the final address of the game program in the program / data area is collectively based on the parameters set in the HW parameter area. Even if access to other areas is prohibited while setting the permission, it is possible to prevent unintended control by malicious programs and malicious data.

A game program area and a non-game program area are allocated to the program / data area, and an unused area 1 is allocated to an area behind the game program area and before the non-game program area, and the program / data. Of the areas, to a group of areas including the game program area (area from the game program area to the game data area) and to a group of areas including the non-game program (area from the non-game program area to the non-game data area). Access may be set to allow each and access to other areas may be prohibited. Even with such a configuration, the program / data area to the area where the game program or non-game program is not stored Since access to the data is prohibited, it is possible to prevent unintended control by malicious programs and malicious data. Further, in the program / data area of the ROM 41b that is permitted to be accessed by the program, the game area is allocated behind the non-game program area, and the unused area is in front of the game program area behind the non-game program area. Is assigned, and a group of areas including the game program area (the area from the game program area to the game data area) and a group of areas including the non-game program (from the non-game program area to the non-game area) in the program / data area. Access to each of the areas up to the data area) may be set to allow and access to other areas may be prohibited. Even with such a configuration, game programs and non-games in the program / data area may be set. Since access to the area where the program is not stored is prohibited, it is possible to prevent unintended control by malicious programs and malicious data.

Further, in the above, the configuration is such that the area itself that allows access in the program / data area is set, but by setting the area that prohibits access in the program / data area, the area that indirectly permits access is set. It may be configured to be performed.

The main control unit 41 determines that the user program is executed when the user program is executed in an area other than the designated area where the program running is permitted, that is, in normal operation, based on the parameters set in the HW parameter area. When the user program is executed in a non-existing area, the IAT circuit 506a outputs an IAT generation signal to disable the progress of the game. Therefore, the unused area of the ROM 41b, the area unrelated to the operation, and the RAM 41c are not yet used. Even when an illegal program is stored in the used area or the like, it is possible to prevent the illegal program from being executed.

In particular, in this embodiment, the game program area and the non-game program area are allocated to the program / data area of the ROM 41b that is permitted to be accessed by the program, and the game program area is assigned to the front of the non-game program area behind the game program area. The unused area 1 is assigned to the area, and the IAT circuit 506a permits the program running for each of the game program area and the non-game program area in the program / data area based on the parameters set in the HW parameter area. While it is set as a designated area, program running is prohibited in other areas, that is, in the program / data area where game programs and non-game programs are not stored, so it is not intended due to malicious programs or illegal data. It is possible to prevent control from being performed.

Further, in the program / data area of the ROM 41b that is permitted to be accessed by the program, the game area is allocated behind the non-game program area, and the unused area is in front of the game program area behind the non-game program area. Is assigned, and based on the parameters set in the HW parameter area, the IAT circuit 506a sets each of the game program area and the non-game program area of the program / data area as designated areas for permitting program running. Therefore, even if the program running in other areas is prohibited, it is possible to prevent unintended control due to an illegal program or illegal data.

A game program area and a non-game program area are allocated to the program / data area, and an unused area 1 is allocated to an area behind the game program area and before the non-game program area, and an HW parameter area. A group of areas including the area from the start address of the game program area to the final address of the non-game program in the program / data area based on the parameters set in (the area from the game program area to the non-game data area). The IAT circuit 506a may be collectively set as a designated area for permitting program running, and program running in other areas may be prohibited. Even in such a configuration, the program / data area may be configured. Since the program running in the area where the game program and the non-game program are not stored is prohibited, it is possible to prevent unintended control by the malicious program or the illegal data. Further, in the program / data area of the ROM 41b that is permitted to be accessed by the program, the game area is allocated behind the non-game program area, and the unused area is in front of the game program area behind the non-game program area. Is assigned, and based on the parameters set in the HW parameter area, a group of areas (from the game program area) including the area from the start address of the non-game program area to the final address of the game program in the program / data area. Even if the IAT circuit 506a collectively sets the area up to the non-game data area as a designated area that allows program running and program running in other areas is prohibited, it is due to an illegal program or illegal data. It is possible to prevent unintended control from being performed.

Further, in the above, the area itself that allows the program running is set in the program / data area, but the program running is indirectly permitted by setting the area that prohibits the program running in the program / data area. The configuration may be such that an area is set.

The program executed by the main control unit 41 includes a main routine that manages the progress of the entire program and a subroutine that is called during the execution of another program.

Further, a CALL instruction is included as an instruction for causing the main control unit 41 to execute the program stored in the program / data area.

The CALL instruction is an instruction that calls and executes a subroutine stored at an address specified in the main routine or the subroutine. When calling a subroutine by a CALL instruction, the main control unit 41 stores the address of the caller in the stack area, and calls and executes the subroutine stored in the designated address. Then, after the subroutine is completed, the address of the caller stored in the stack area, that is, the program of the main routine or the subroutine of the caller who executed the CALL instruction is returned.

Further, the CALL instruction includes a normal CALL instruction and a CALLV instruction which is a special CALL instruction. The normal CALL instruction is an instruction that calls a subroutine by specifying both the upper address and the lower address and specifying the address by the specified upper address and lower address, whereas the CALLV instruction specifies only the lower address. By doing so, it is an instruction to specify an address by a preset upper address and a specified lower address in the vector table area of ROM 41b and call the subroutine, and call the subroutine with a smaller amount of data than a normal CALL instruction. It becomes possible.

The RST instruction is an instruction to call and execute a subroutine stored in a specific address corresponding to a specified value by designating a value corresponding to a plurality of predetermined specific addresses, and is an instruction to execute the above-mentioned ordinary CALL. It is possible to call a subroutine with a smaller amount of data than an instruction or a CALLV instruction. When the subroutine is called by the RST instruction, the main control unit 41 stores the address of the caller in the stack area, and calls and executes the subroutine stored in the specific address corresponding to the specified value. Then, after the subroutine is completed, the address of the caller stored in the stack area, that is, the main routine or subroutine of the caller who executed the RST instruction is returned.

A jump instruction is an instruction to move to a program stored at an address specified in a main routine or a subroutine. The main control unit 41 moves to the program stored at the address specified by the jump instruction, and executes the destination program. In this case, unlike the CALL instruction and the RST instruction, the program does not return to the source program even if the program after the transfer ends.

Further, the main control unit 41 includes an LD instruction as an instruction for reading the data stored in the program / data area. The LD instruction is an instruction to read the data stored at the address specified in the main routine or the subroutine into the specified register. The main control unit 41 reads the data stored at the address specified by the LD instruction, and stores the read data in the register specified by the LD instruction.

Of the game programs stored in the ROM 41b, the frequently used subroutines are stored in the game program area of the ROM 41b where the start address is a specific value (for example, 00H). On the other hand, in the vector table area of the ROM 41b, a specific value is set as the upper address of the subroutine called by the CALLV instruction. Then, when the main control unit 41 calls a subroutine in which the upper address of the start address is a specific value, the main control unit 41 uses the CALLV instruction to specify only the lower address, thereby setting the specific value set in the vector table area as the upper address. Specify, specify the lower address specified as the lower address, and call and execute the subroutine stored in the address that combines the upper and lower addresses. For this reason, the upper addresses that form part of the addresses used when calling the subroutines that are used particularly frequently in the game program are set in advance as specific values in the vector table, and are based on the specific values set in the vector table. Since the address is specified, it is possible to call a subroutine with a smaller amount of data than a normal CALL instruction that calls a program by specifying both the upper address and the lower address, and when calling these subroutines. It is possible to reduce the waste of the program for specifying the address.

The subroutines that are particularly frequently used among the non-game programs stored in the ROM 41b are stored in the non-game program area of the ROM 41b where the start address is a specific value, and the CALLV instruction is given in the vector table area of the ROM 41b. By setting a specific value as the upper address of the subroutine to be called in, and when the main control unit 41 calls the subroutine in which the upper address of the start address is the specific value, these subroutines are specified by using the CALLV instruction to specify only the lower address. Even if the configuration is such that the program is called and executed, it is possible to call the subroutine with a smaller amount of data than the normal CALL instruction that calls the program by specifying both the upper address and the lower address, and these subroutines can be called. It is possible to reduce the waste of the program for specifying the address when calling.

Further, the upper address used when calling by the CALLV instruction may be set to a specific register of the main control unit 41 instead of the vector table area.

Further, not limited to the CALLV instruction, a part of the address is specified by using the value stored in the vector table area, the value set in the specific register, etc., and the subroutine is specified by specifying the remaining part of the address. If the configuration uses a special CALL instruction that enables the storage address of the subroutine to be specified, it is possible to reduce the waste of the program for specifying the address when calling the subroutine. In addition, identification values with a smaller amount of data than the addresses are assigned to each of the multiple areas that make up the vector table area, and the storage addresses of the subroutines are set in each of these multiple areas, and the identification values are specified to identify them. Even in a configuration using a special CALL instruction that makes it possible to specify the storage address of the subroutine stored in the area corresponding to the value, it is possible to reduce the waste of the program for specifying the address when calling the subroutine. ..

Further, the game data that is particularly frequently used among the game data stored in the ROM 41b is stored in the area where the start address is a specific value in the game data area of the ROM 41b, and a special LD is stored in the vector table area of the ROM 41b. By setting a specific value as the upper address of the data to be read by the command, and when the main control unit 41 calls the game data in which the upper address of the start address is the specific value, only the lower address is specified by using a special LD command. , Even if the configuration is such that these game data are read, it is possible to call the game data with a smaller amount of data as compared with the normal LD instruction that reads data by specifying both the upper address and the lower address. It is possible to reduce the waste of the program for specifying the address when reading the game data of.

In addition, the non-game data that is particularly frequently used among the non-game data stored in the ROM 41b is stored in the non-game data area of the ROM 41b where the start address is a specific value, and is stored in the vector table area of the ROM 41b. When a specific value is set as the upper address of the data to be read by the special LD instruction and the main control unit 41 calls the non-game data in which the upper address of the start address is the specific value, only the lower address is used by the special LD instruction. By specifying, even if the configuration is such that these non-game data are read, the non-game data is called with a smaller amount of data than the normal LD instruction that reads data by specifying both the upper address and the lower address. This makes it possible to reduce the waste of the program for specifying an address when reading these non-game data.

Further, even in these cases, the upper address used when calling with a special LD instruction may be set to a specific register of the main control unit 41 instead of the vector table area.

In addition, a part of the address is specified using the value stored in the vector table area, the value set in a specific register, etc., and the data storage address can be specified by specifying the remaining part of the address. If the configuration uses the special LD instruction, it is possible to reduce the waste of the program for specifying the address when reading the data. In addition, identification values that are smaller than the address are assigned to each of the multiple areas that make up the vector table area, data storage addresses are set for each of these multiple areas, and identification values are specified. Even in a configuration using a special LD instruction that makes it possible to specify the storage address of the data stored in the area corresponding to the value, it is possible to reduce the waste of the program for specifying the address when reading the data. ..

The main control unit 41 is activated when a system reset by inputting a system reset signal, a WDT reset by WDT506b, and the above-mentioned illegal access reset occur. At this time, the value set in the vector table area, that is, The upper address of the subroutine of the CALLV instruction and the start address of the timer interrupt process (main) are values indicating the area in which the program or the like is actually stored in the program area, or FFFFH (in an unused vector table area). It is determined whether it is a value to be set), and if the value set in the vector table area is neither a value indicating outside the area in which the program is set nor FFFFH, it is not started. It is possible to prevent in advance that an unintended process is executed due to an interruption or the like.

The game program is a program related to the progress of the game, and is a program for executing a process that hinders the progress of the game unless the process based on the program is executed. On the other hand, the non-game program is a program that is not related to the progress of the game, and even if it is called from the game program and returns to the game program without executing the process based on the program, the game can be progressed. It is a program for executing processing.

As shown in FIG. 8, the game program includes a game-dedicated program included only in the game program, and a common determination program and a common general-purpose program included in both the game program and the non-game program.

The game-dedicated program includes, for example, a game start waiting process, an internal lottery process, a reel control process, a game end setting process, an external output 1 process, an initial setting process, a power failure process, and an error process. In the game start waiting process, after the control of one game is completed, the number of bets is set by inserting medals, etc., and after the specified number of bets is set, the start switch 7 is operated to start the game. The internal lottery process is a process of performing an internal lottery and setting a winning flag, etc., and the reel control process is a process of starting the rotation of the reel and operating the stop switches 8L, 8C, 8R. This is a process for stopping the reel with, and the game end setting process determines whether or not a prize has been generated according to the stop position of the stopped reel, and pays out medals, sets the re-game, and sets the game state. The external output 1 process is a process for performing output control of the medal IN signal, medal OUT signal, RB signal, BB signal, and RT signal among the external output signals. , The initial setting process is a process for making the game possible when the power is turned on (checking for backup abnormality, initializing the register, etc.), and the power failure process is the state before the power failure after the power failure occurs. This is a process for recovering, and the error processing includes various abnormalities (medal insertion abnormality, foreign matter detection in the medal selector 29, reel rotation abnormality, medal payout abnormality, foreign matter detection near the payout exit, RAM abnormality). This is a process for disabling the game when an abnormality in the set value, an empty hopper tank 34a, a full tank detection of the overflow tank 35, etc. are detected. Further, although not particularly shown, the game program also includes the above-mentioned processing related to AT (control related to lottery related to AT, control related to navigation notification, etc.).

The common determination program in the game program includes, for example, input determination processing and payout determination processing. The insertion determination process is a process of determining whether or not the medal has passed normally by the insertion medal sensor 31, and is a process executed in a state where medals can be inserted for setting the number of bets and the like. The payout determination process is a process of determining whether or not the medal has passed normally by the payout sensor 34c, and is a process executed in a state where the payout of the medal is permitted at the time of winning a small winning combination or at the time of credit settlement. Is.

The common general-purpose program in the game program is a process called and executed from a plurality of types of processes constituting the game program. For example, counter update process, port input process, data conversion process, LED display process, data setting process, etc. Includes command setting processing. The counter update process is a process for updating the specified counter value, the port input process is a process for acquiring the input state of the specified port, and the data conversion process is input using game data. It is a process of converting and outputting the data, the LED display process is a process of setting to display the specified value on the LED, and the data setting process is a process of setting the specified data. The command setting process is a process of setting a specified command in the command queue.

In particular, when an abnormality is detected as described above, the game program resets the setting value according to the type of abnormality (random number abnormality, RAM abnormality, backup abnormality, setting value abnormality, and resets it. In the case of an abnormality other than the above, it includes error processing that disables the progress of the game until the reset operation) is established.

As shown in FIG. 8, the non-game program includes a non-game dedicated program included only in the non-game program, and the same common determination program and common general-purpose program as the game program.

The non-game dedicated program includes, for example, test signal output processing, foreign matter detection processing, door monitoring processing, external output 2 processing, input medal error judgment processing, payout medal error judgment processing, power failure judgment processing, normal command transmission processing, and power failure. Includes time command transmission processing. The test signal output process is a process for outputting a test signal generated in connection with the result of the game, and the foreign matter detection process is a process for detecting a foreign matter in the medal passage by the slot sensor 26. The door monitoring process is a process for detecting the opening of the front door 1b, and the external output 2 process is a security signal (door opening signal, setting change signal, closing error signal, payout error signal) among the external output signals. This is a process for controlling the output, and the inserted medal error determination process detects the backflow of the inserted medal, the medal jam detection in the medal selector 29, and the foreign matter detection in the medal selector 29 based on the detection status of the inserted medal sensor 31. The payout medal error determination process is a process for performing backflow detection of payout medals, medal clogging detection near the payout exit, and foreign matter detection near the payout exit based on the detection status of the payout sensor 34c. , The power failure determination process is a process for determining whether or not a voltage drop signal from the power failure detection circuit 48 is detected, and the normal command transmission process is a command setting of a game-dedicated program and a non-game-dedicated program. This is a process for transmitting the first command set in the command queue by the process to the sub-control unit 91, and the command transmission process at the time of power failure is set in the command queue. This is a process for transmitting all the existing commands to the sub-control unit 91.

The common general-purpose program in the non-game program is a process called and executed from a plurality of types of processes constituting the non-game program, and like the common general-purpose program in the game program, for example, counter update process, port input process, and so on. Includes data conversion processing, LED display processing, data setting processing, and command setting processing.

The non-game program includes a process of determining whether or not the detection status is a predetermined detection status based on the detection status of the detection means (input port sensor 26, full tank sensor 35a, door open detection switch 25) not related to the progress of the game.

In addition, the non-game program functions as a detection means related to the progress of the game in a specific control state among a plurality of control states (game start waiting process, internal lottery process, reel control process, game end setting process). In other control states, the detection means (for example, the insertion medal sensor 31 and the payout sensor 34c) that functions as the detection means that is not related to the progress of the game is based on the detection status in the control state that is not related to the progress of the game. Processing to determine whether or not it is in a predetermined detection status (for example, detection processing of inserted medals and detection processing of paid medals for detecting an abnormality caused by detection of insertion of medals during reel rotation or withdrawal of medals) Including. It should be noted that such a determination process corresponds to a common determination program because it is the same process as the process of determining whether or not the detection status is a predetermined detection status based on the detection status in the control state related to the progress of the game in the game program. ..

Among the processes included in the game program, the number of medals to be paid out in the external output 1 process, the process of counting the number of medals inserted in the game start waiting process, the process of switching the flow path switching solenoid 30, and the process of setting at the end of the game. Processing that counts, processing that detects that the hopper tank 34a is empty, processing that updates software random numbers, processing related to AT, processing that sends internal winning commands, etc. that are not directly related to the progress of the game If so, all or part of these processes may be included in the non-game program. On the other hand, if the processes included in the non-game program are indirectly related to the progress of the game, all or part of these processes may be included in the game program.

In this embodiment, as shown in FIG. 9, the CPU 41a of the main control unit 41 calls the non-game program in the process based on the game program to execute the process based on the non-game program, and after the process based on the non-game program is completed. , Return to the process based on the game program.

As shown in FIG. 9, in principle, when executing the process based on the game program, the CPU 41a executes the process based on the game program with reference to the game data in the game data area, and uses the game RAM area as a work. , It is possible to refer to and update the contents of the game RAM area. Further, in principle, when executing the process based on the non-game program, the CPU 41a executes the process based on the non-game program with reference to the game data in the non-game data area, and uses the non-game RAM area as a work. It is possible to refer to and update the contents of the non-gaming RAM area.

Further, the CPU 41a does not refer to the non-game data area and does not update the non-game RAM area when executing the process based on the game program, but it is possible to refer to the non-game RAM area. , In executing the process based on the non-game program, the game data area is not referred to and the game RAM area is not updated, but the game RAM area can be referred to.

Further, in the processing based on the game program, only a specific area required for the game program (for example, an error flag setting area indicating abnormality detection) can be referred to in the non-game RAM area, and the non-game program can be used. Based on the processing, only a specific area (for example, an internal winning flag setting area, a game state setting area, an RT setting area, etc.) necessary for the non-game program can be referred to in the game RAM area. In addition, a specific area of the non-game RAM area to which processing based on the game program can be referred to, and a specific area of the game RAM area to which processing based on the non-game program can be referred to may be allocated to continuous address areas. Although it is preferable, the configuration may be such that a part or all of the address area is not continuous.

As described above, in this embodiment, the game program area in which the game program related to the progress of the game is stored, the game data area in which the game data referred to by the game program is readable, and the work data referred to by the game program are stored. A game RAM area that is readable and writable, a non-game program area that is a program called by the game program and stores non-game programs that are not related to the progress of the game, and a non-game that the non-game program refers to. Since the non-game data area in which the data is readable and stored and the non-game RAM area in which the work data referred to by the non-game program is readable and writable are allocated separately, the game program, The game data and the work data of the game program and the non-game program, the non-game data, and the work data of the non-game program can be easily specified according to the difference in the storage area.

Further, by separating the game program area and the game data area and the non-game program area and the non-game data area, the area occupied by the ROM 41b can be compactly managed according to each function. It will be easier to identify the relevant data.

Further, in the present embodiment, the non-game RAM area can be referred to when the game program is executed, and the game RAM area can be referred to when the non-game program is executed. The data used by the non-game program can be easily used when executing the game program, and the data used by the game program can be easily used when executing the non-game program. On the other hand, it is impossible to update the non-game RAM area when executing the game program, and it is impossible to update the game RAM area when executing the non-game program. Does not affect the processing of the non-game program, and the non-game program does not affect the processing of the game program.

Further, in the present embodiment, the processing based on the game program can refer only to a specific area (for example, an error flag setting area indicating abnormality detection) required for the game program in the non-game RAM area. , The processing based on the non-game program can refer only to a specific area (for example, an internal winning flag setting area, a game state setting area, an RT setting area, etc.) necessary for the non-game program in the game RAM area. Therefore, since the data that the game program can refer to in the non-game RAM area and the data that the non-game program can refer to are limited to a specific area, the reference destination of the game program or the non-game program can be easily specified. be able to.

As shown in FIG. 10A, the main control unit 41 of this embodiment can call a non-game program from a process based on the game program during execution of the main process, and FIG. 10B shows. As shown, it is possible to call a non-game program from a process based on the game program during execution of the timer interrupt process.

As shown in FIG. 10A, when a non-game program is called from the main process based on the game program, the game program sets the start address of the non-game program to be called in a specific area and performs a common call process. Execute 1. The common call process 1 is a process included in the game program. In the common call process 1, the register of the game program is saved in the game stack area, and the stack pointer (SP, the address indicating the current position of the game stack area). Is saved in the SP save area of the game RAM area, and then the timer interrupt is set to prohibit by setting the value of the interrupt master permission flag to a value indicating interrupt prohibition, and then set to a specific area. Call the non-game program at the address you are using.

On the other hand, the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program is set based on the called non-game program, and the processing of the non-game program is executed. After that, it returns to the calling game program, that is, the common call processing 1.

After returning to the common call process 1, the common call process 1 releases the prohibition of timer interrupt by setting the value of the interrupt master permission flag to a value indicating interrupt permission, and saves the game stack area and SP. Based on the data saved in the area, the register and the stack pointer of the game program are returned to the state before calling the non-game program, and the process ends.

As described above, in the present embodiment, when the game program calls the non-game program, the interrupt is set to be prohibited by the common call process 1, and when the non-game program returns to the game program, the interrupt is performed. Since the prohibition is lifted, the interruption can be set to be prohibited for the period during which the non-game program is being executed.

When the non-game program is called from the main process based on the game program, the non-game program first sets interrupts to be prohibited, executes various processes, and ends the non-game program. The prohibition of interrupts may be lifted, and with such a configuration, interrupts can be set to be prohibited during the period in which the non-game program is being executed, as in the present embodiment. Further, since the non-game program sets the prohibition and cancellation of interrupts, it is not necessary to set and cancel the prohibition of interrupts in the common call process 1 of the game program, and the capacity of the game program can be reduced. ..

As shown in FIG. 10B, when calling a non-game program from the timer interrupt process based on the game program, the game program sets the start address of the non-game program to be called in a specific area and is common. Call processing 2 is executed. In the common call processing 2, the register of the game program is saved in the game stack area, and the stack pointer (SP, the address indicating the current position of the game stack area) is saved in the SP save area of the game RAM area, and then specified. Call the non-game program of the address set in the area of.

On the other hand, the called non-game program sets the stack pointer of the non-game program, executes the processing of the non-game program, and then returns to the common call processing 2 of the caller.

After returning to the common call process 2, the common call process 2 changes the stack pointer of the register and the game program to the state before calling the non-game program based on the data saved in the game stack area and the SP save area. Return and finish.

As described above, unlike the common call process 1, the common call process 2 does not set and cancel the timer interrupt as prohibited, but as described above, the main control unit 41 performs other interrupts during the execution of the timer interrupt process. Since the execution of the interrupt process is prohibited, the interrupt can be prohibited for the period during which the non-game program is executed.

In this embodiment, when the game program executes the common call process 1 and the common call process 2 to call the non-game program and execute the non-game program, the register actually used by the game program is used. Since the process of saving and protecting all the areas of the register is performed regardless of the presence or absence, when returning to the game program, it is possible to surely return from the state at the time when the non-game program was called. ..

The non-game program protects the value of the register used by the game program immediately before calling the non-game program from the process based on the game program in the game program without executing the common call process 1 and the common call process 2. After all the processing based on the above is completed, the value of the register protected at the first stage of returning to the game program may be restored. With such a configuration, the register may be restored before the non-game program is called. Since the protection process is performed and the register is restored after returning from the non-game program, the data stored in the register by the non-game program does not affect the game program.

Further, when the non-game program is called, the non-game program first saves the stack pointer and the register of the game program, and the stack pointer and the register of the game program are restored at the end of the non-game program. Also, with such a configuration, when returning to the game program, it is possible to surely return from the state at the time when the non-game program was called, and also to return to the game program. The capacity can be reduced.

Next, various control contents executed by the main control unit 41 in this embodiment will be described below with reference to FIGS. 11 to 18.

First, the initial setting process executed by the main control unit 41 at startup will be described. When the main control unit 41 is activated due to the occurrence of a reset, the main control unit 41 sets the startup time. In the startup setting, the status flag provided in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result and the execution result of the instruction, and particularly includes the interrupt master permission flag that sets the prohibition / permission of interrupt. Since the initial value of the interrupt master permission flag is a value indicating the prohibition of interrupts, the main control unit 41 is started in a state where interrupts are prohibited. After that, the main control unit 41 sets various functions with reference to the HW parameters, and then performs the initial setting process according to the program stored in the program / data area. In this embodiment, the initial setting process is included in the game program.

As shown in FIG. 11, in the initial setting process, interrupting is prohibited by first setting the value of the interrupt master permission flag to a value indicating interrupt prohibition (Sa1). As described above, the main control unit 41 is activated in the interrupt-prohibited state, but in Sa1, interrupts are prohibited again. Next, initialization data is set (Sa2), and each output port including the parallel output port 513 is initialized (Sa3). Next, the built-in register is set (Sa4).

Next, it is determined whether or not the power supply voltage is normal (Sa5). If the power supply voltage is not normal, the determination is repeated until it becomes normal. If the power supply voltage is normal, the upper address of the interrupt vector is set (Sa6). Then, the access to the RAM 41c is permitted (Sa7), and the stack pointer is initialized (Sa8).

Next, the RAM parity of the game RAM area (the area of F000H to F1FFH including the game stack area and the unused area 3) in the usable area of the RAM 41c is calculated (Sa9). Then, it is determined whether or not the calculated RAM parity is 0 (Sa10). As will be described later, if the power interruption process (main) is normally performed when the power is cut off last time, the RAM parity should be 0. Therefore, if the RAM parity is not 0 in the step of Sd10, the game of RAM 41c The data stored in the RAM area is not normal, and in this case, the process proceeds to the Sa13 step and the destruction diagnosis data is cleared (Sa13). On the other hand, when the RAM parity becomes 0, the destruction diagnosis data stored in the game RAM area is further acquired (Sa11), and it is determined whether or not the acquired destruction diagnosis data is correct (Sa12). Clear the data for destructive diagnosis (Sa13).

Next, it is determined whether or not the setting key switch 37 is in the ON state (Sa14). When the setting key switch 37 is in the ON state, the timer interrupt is set (Sa19). Specifically, the register of the timer circuit 509 built in the main control unit 41 is set so that the timer interrupt is executed periodically at predetermined time intervals. In this embodiment, the value corresponding to about 0.56 ms is set in a predetermined register (time constant register), so that the timer interrupt is periodically generated every about 0.56 ms. Further, in the timer circuit 509, the timer is initialized by setting the register, and the time counting is started from the initial value. When the timer interrupt setting in the step of Sa19 is completed, the process shifts to the setting change process.

On the other hand, when the setting key switch 37 is in the OFF state, it is determined whether or not the stored contents of the RAM 41c are destroyed (Sa15). In the step of Sa15, it is determined whether or not the RAM abnormality flag described later is set, and whether or not the stored contents of the RAM 41c are destroyed based on the determinations of Sa10 and Sa12. If the stored contents of the RAM 41c are not destroyed, a return command is transmitted to the sub-control unit 91 (Sa16). When the stored contents of the RAM 41c are not destroyed, it is determined that the RAM abnormality flag is not set and the RAM parity is 0 in the step of Sa10, and the destruction diagnosis data is further stored in the step of Sa12. This is the case when it is determined to be correct.

After the step of Sa16, all the registers are restored based on the data stored in the game RAM area of the RAM 41c (Sa17), and the timer interrupt setting similar to the step of Sa19 is set (Sa18). Then, the process shifts to the Sd24 process of the timer interrupt process (main) described later. As a result, the state of the game RAM area and the non-game RAM area of the RAM 41c before the power failure and the processing executed before the power failure are restored.

If the stored contents of the RAM 41c are destroyed in the step of Sa15, a RAM abnormality flag indicating that the stored contents of the RAM 41c are not normal is set in the RAM 41c (Sa20), and the process proceeds to error processing. In error handling, the progress of the game is disabled. Further, in the error state in which the RAM abnormality flag is set and the transition is made, the setting key switch 37 is turned on and the power switch 39 is turned on, so that the error state can be canceled by shifting to the setting change processing. On the other hand, when the power switch 39 is turned on without turning on the setting key switch 37, the RAM error flag is still set, and it is determined that the RAM is destroyed in the step of Sa15. It becomes an error state again.

Next, the setting change process executed by the main control unit 41 will be described. In this embodiment, the setting change process is included in the game program.

As shown in FIG. 12, the main control unit 41 first sets the start address of the RAM 41c, that is, the start address (F000H) of the usable area in the register (Sb1). Next, it is determined whether or not the stored contents of the RAM 41c are destroyed in the same manner as in the step of Sa15 shown in FIG. 11 (Sb2). If the contents of the RAM 41c are not destroyed, that is, if the contents of the RAM are not abnormal, the start address of the RAM to be initialized at the start of setting change (the final address of the usable area in which important work is stored). (Next address) is set in the register (Sb3). That is, the address set in Sb1 is changed. If the contents of the RAM 41c are destroyed, that is, if the contents of the RAM are abnormal, the process proceeds to step Sb4.

Next, the final address (F1FFH) of the game stack area (in use) is specified as the final address of the RAM to be initialized (Sb4), the game area initialization process is executed, and the address specified in the step of Sb1 or Sb3 is used. The area up to the final address of the initialization target RAM is initialized (Sb5). Since the start address (F000H) of the usable area is set in the step of Sb1, if the RAM contents are abnormal, all the areas of the game RAM area of the RAM 41c are initialized in the step of Sb5. It becomes. On the other hand, in the step of Sb3, the address next to the final address of the area in which the special work is stored in the usable area is set as the start address of the initialization target RAM at the start of setting change, so that the RAM contents are set. If it is not abnormal, the area other than the special work in the game RAM area of the RAM 41c is initialized in the step Sb5.

After that, the non-game area initialization process described later is executed to initialize the area from the start address of the unused area 4 to the final address of the non-game stack area (in use), that is, the unused area 4 and the non-game RAM area. (Sb6).

Next, a setting command (start) indicating the start of the setting change state is transmitted to the sub control unit 91 (Sb7) to allow interruption (Sb8).

Next, it is determined whether or not the reset / setting switch 38 has changed from OFF to ON (Sb9). When the reset / setting switch 38 changes from OFF to ON, the set value of the register is updated (1 is added in the case of 1 to 5 and updated to 1 in the case of 6) (Sb10). If the reset / setting switch 38 does not change, it is determined whether or not the start switch 7 has changed from OFF to ON (Sb11). If the start switch 7 does not change, the process returns to the step of Sb7. On the other hand, when the start switch 7 changes from OFF to ON, it is determined whether or not the setting key switch 37 is in the OFF state (Sb12). If the setting key switch 37 is not in the OFF state, it waits until the setting key switch 37 is in the OFF state. When the setting key switch 37 is in the OFF state, the data of the set value set in the register is stored in the special work of the RAM 41c (Sb13).

Next, a setting command (end) indicating the end of the setting change state is transmitted to the sub control unit 91 (Sb14). Then, the start address of the initialization target RAM at the end of the setting change (the address next to the final address of the area in which the special work is stored in the usable area) is set in the register (Sb14), and the process proceeds to the main process. ..

Next, the game area initialization process executed by the main control unit 41 will be described. In this embodiment, the game area initialization process is included in the game program.

As shown in FIG. 13, the main control unit 41 acquires the start address and end address of the initialization target RAM set in the register (Sf1). Then, the start address value is subtracted from the end address value of the initialization target RAM to calculate the capacity of the initialization target RAM (Sf2), and the calculated capacity of the initialization target RAM is set in the register (Sf3). Further, the start address value of the initialization target RAM is set as a designated address (Sf4), and the 1-byte data stored in the designated address is overwritten with 0 to clear it (Sf5). After that, the logical sum of the 1-byte data is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to the step of Sf5 and the 1-byte data is again obtained. Is overwritten with 0 to clear. Then, when it is determined that the calculation result is 0 in the step of Sf6, the designated address is updated to the address next to the address currently set as the designated address (Sf7), and the register is subtracted by 1. (Sf8), it is determined whether or not the register is 0 (Sf9).

If it is determined in the step of Sf9 that the register is not 0, the process returns to the step of Sf5, and the processing of the steps Sf5 to Sf9 is repeated until the register becomes 0. If it is determined in the step of Sf9 that the register is 0, the game area initialization process is terminated and the program returns to the calling program.

As described above, in the game area initialization process of the present embodiment, the capacity of the initialization target RAM is calculated by designating the start address and the end address of the initialization target RAM, and the start address of the initialization target RAM is calculated. By sequentially clearing the area corresponding to the capacity of the initialization target RAM, the area of the designated initialization target RAM in the game RAM area is initialized.

In the game area initialization process of this embodiment, by designating the start address and end address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address and end address, and the start address is calculated. By setting the address as the initial value of the specified address and repeating the process of updating the specified address to the next address after clearing the data of the specified address, as many times as the capacity of the initialization target RAM, the beginning of the initialization target RAM The area from the address to the end address is initialized, but by specifying the start address and end address of the RAM to be initialized, the start address is set as the initial value of the specified address, and the data of the specified address is used. By repeatedly executing the process of updating the specified address to the next address after clearing until the specified address becomes the end address, the area from the start address to the end address of the initialization target RAM is initialized. Is also good.

Next, the non-gaming area initialization process executed by the main control unit 41 will be described. In this embodiment, the non-game area initialization process is included in the non-game program.

As shown in FIG. 14, the main control unit 41 sets the start address of the unused area 4 as the start address of the initialization target RAM (Sg1). Then, the start address value of the initialization target RAM (the start address value of the unused area 4) was subtracted from the final address value of the usable area of the RAM 41c to calculate the capacity of the initialization target RAM (Sg2). The capacity of the RAM to be initialized is set in the register (Sg3). Further, the start address value of the initialization target RAM (the start address value of the unused area 4) is set as the designated address (Sg4), and the 1-byte data stored in the designated address is overwritten with 0 to clear the data. (Sg5). After that, the logical sum of the 1-byte data is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to the step of Sg5 and the 1-byte data is again obtained. Is overwritten with 0 to clear. Then, when it is determined that the calculation result is 0 in the step of Sg6, the designated address is updated to the address next to the address currently set as the designated address (Sg7), and the register is subtracted by 1. (Sg8), it is determined whether or not the register is 0 (Sg9).

If it is determined in the step of Sg9 that the register is not 0, the process returns to the step of Sg5, and the processing of the steps Sg5 to Sg9 is repeated until the register becomes 0. If it is determined in the step of Sg9 that the register is 0, the non-game area initialization process is terminated and the program returns to the calling program.

As described above, in the non-gaming area initialization process of the present embodiment, the RAM area corresponding to the capacity of the initialization target RAM is sequentially cleared from the start address of the initialization target RAM (the start address of the unused area 4). The area from the start address to the end address of the initialization target RAM, that is, the unused area 4 and the non-gaming RAM area are initialized.

In the non-gaming area initialization process of this embodiment, by designating the start address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address, and the start address is set to the designated address. The process of updating the specified address to the next address after clearing the data of the specified address as the initial value is repeatedly executed as many times as the capacity of the initialization target RAM, from the start address to the end address of the initialization target RAM. By specifying the start address and end address of the RAM to be initialized, the start address is set as the initial value of the specified address, and the specified address is cleared after the data of the specified address is cleared. May be configured to initialize the area from the start address to the end address of the initialization target RAM by repeatedly executing the process of updating to the next address until the designated address becomes the end address.

Further, in the non-gaming area initialization process of the present embodiment, by setting the start address of the unused area 4 as the start address of the initialization target RAM, all the areas of the unused area 4 and the non-game area RAM area are initialized. However, the non-game area initialization process may be performed as long as at least a part of the non-game RAM area is initialized, and a part of the non-game RAM area is initialized. However, a part of the non-gaming RAM area and the unused area 4 may be initialized.

Further, in the present embodiment, in the game area initialization process and the non-game area initialization process, the 1-byte data stored in the designated address is overwritten with 0 to clear the data, and then the logic of the 1-byte data is performed. The sum is calculated to determine whether or not the calculation result is 0 (Sf6), and if the calculation result is not 0, the 1-byte data is overwritten with 0 and cleared. Although the configuration is such that the data of the address to be used is cleared, a configuration in which the 1-byte data stored in the specified address is overwritten with 0 and cleared may be used.

Next, the main process executed by the main control unit 41 will be described. The main process is repeatedly executed for each unit of game. Then, one cycle of the main process corresponds to one unit of the game. In this embodiment, the main process is included in the game program.

As shown in FIG. 15, the main control unit 41 first prohibits interruption (Sc1). Next, the final address of the initialization target RAM (the final address of the game stack area (unused)) is set (Sc2).

Next, the game area initialization process is executed to clear the area of the RAM 41c indicated by the designated address (Sc3). At this time, if the main process is started after the setting change process, the area in which the special work is stored as the start address of the initialization target RAM when the setting change process is completed. The address next to the final address of is set, and in Sc2 of the main process, the final address of the game stack area (unused) is set as the final address of the initialization target RAM, so that the special work of the game RAM area is set. And the area other than the game stack area (in use) (important work, general work, unused area 3, stack area (unused)) will be initialized. Further, at the end of a game that is not in a specific game state, the start address of the RAM to be initialized at the end of the game (the start address of the unused area 3) is set in the Sc10 step described later, and the initialization is performed in the Sc2 step. Since the final address of the target RAM (the final address of the game stack area (unused)) is set, the unused area 3 and the game stack area (unused) of the usable areas are initialized. Further, at the end of the specific game state and at the end of the game, the start address of the initialization target RAM at the end of the specific game state (special work in the game RAM area is stored) in the Sc11 step described later. The final address (the address next to the final address of the area) is set, and in the Sc2 step, the final address of the initialization target RAM at the end of the specific game state (the final address of the game stack area (unused)) is set. Therefore, the general work, the unused area 3, and the game stack area (unused) in the game RAM area are initialized.

After the RAM is initialized in the step of Sc3, the interrupt is permitted (Sc4), and the game start waiting process is executed (Sc5). In the game start waiting process, a process of waiting in a state in which the bet number can be set, setting a predetermined number of bets according to the game state, and starting the game when the start switch 7 is operated is executed.

Next, the internal lottery process is executed (Sc6). In the internal lottery process, whether to allow the above-mentioned winning of each winning combination based on the random value for the internal lottery latched at the same time as the game starts by the detection of the start switch 7 in the step of Sc5 (that is, the derivation of the display result is derived. Performs the process of deciding whether or not to allow it.

Next, the reel control process is executed (Sc7). In the reel control process, the process of rotating each reel 2L, 2C, 2R in response to the operation of the start switch 7, the result of the internal lottery in the step of Sd2, and the operation of the stop switches 8L, 8C, 8R by the player are detected. A process of stopping the rotation of the corresponding reels 2L, 2C, and 2R is executed according to the fact.

Next, the game end setting process is executed (Sc8). In the game end setting process, when it is determined that the rotation of all reels 2L, 2C, and 2R has stopped in the Sc7 process, a prize is generated according to the display result derived for each reel 2L, 2C, and 2R. Execute the process of determining whether or not. Then, when it is determined that a prize has been generated, credits are added and medals are paid out based on the number of payouts according to the prize. When a prize is won, a process of setting the game state is executed in preparation for the next game after the payout of medals is completed. Further, if no winning is generated, after the reels are stopped, a process of setting the game state is executed in preparation for the next game.

When the game end time setting process is completed, it is determined whether or not it is the end of a specific game state (Sc9), and if it is not the end of the specific game state, the start address of the initialization target RAM at the end of the game is set. Set (Sc10) and return to the step of Sc1. If it is the end of the specific gaming state, the start address of the initialization target RAM at the end of the specific gaming state is set (Sc11), and the process returns to the Sc1 step.

In the main process, a command storage process that generates a command and sets it in the command queue is executed according to the progress of the game, and the set command is executed in the subsequent timer interrupt process (main) during normal operation. It is transmitted to the sub-control unit 91 by the command transmission process.

16 and 17 are flowcharts showing the control contents of the timer interrupt process (main) executed by the main control unit 41 interrupting the main process (mainly the main process) at regular intervals (intervals of about 0.56 ms). is there. The timer interrupt process (main) is a process executed by an interrupt generated according to the count of the timer circuit 509, and the address in which the timer interrupt process (main) program is stored is a vector table. It is set as a value corresponding to the timer interrupt of. Then, when the timer interrupt occurs, the process from the address is executed. In addition, other interrupts are automatically prohibited during the execution period of the timer interrupt process (main). In this embodiment, the timer interrupt process (main) is included in the game program.

As shown in FIG. 16, in the timer interrupt process (main), first, the register in use is saved in the game stack area (Sd1).

Next, a power failure determination process is performed (Sd2). In the power failure determination process, it is determined whether or not a voltage decrease signal has been input from the power failure detection circuit 48, and if the voltage decrease signal has been input, whether or not the voltage decrease signal has been input even in the previous power failure determination process. If a voltage drop signal is input even in the previous power failure determination process, it is determined that there is a power failure, and a power failure flag indicating that is set.

After the power failure determination process in the step of Sd2, it is determined whether or not the power failure flag is set (Sd3), and if the power failure flag is not set, the process proceeds to Sd4 and the detection data of various switches from the input port. Performs port input processing to input. On the other hand, when the power failure flag is set in the step of Sd3, all the untransmitted commands set in the command queue are sent to the sub control unit 91 by executing the command transmission process at the time of power failure. After transmission (Sd25), the process proceeds to the power interruption process (main).

Next, the branch counter for identifying the timer interrupt to be executed in the timer interrupt process (main) is advanced by 1 from the four types of timer interrupts 1 to 4 (Sd5). In the step of Sd5, 1 is added when the branch counter value is 0 to 2, and the value is updated to 0 when the counter value is 3. That is, the branch counter value loops in the order of 0 → 1 → 2 → 3 → 0 ... Each time the timer interrupt process (main) is executed.

Next, it is determined whether it is 2 or 3, that is, timer interrupt 3 or timer interrupt 4 by referring to the branch counter value (Sd6), and if it is not timer interrupt 3 or timer interrupt 4, that is, timer interrupt. In the case of 1 or timer interrupt 2, the motor phase signal output process for outputting the phase signal data of the reel motors 32C, 32C, 32R is executed (Sd7).

Next, it is determined whether or not it is 1 by referring to the branch counter value, that is, whether or not it is timer interrupt 2 (Sd8), and if it is not timer interrupt 2, that is, if it is timer interrupt 1, the reel motor Reel start processing (Sd9) that controls the step time interval at the start of 32L, 32C, 32R, motor step processing (Sd10) that changes the phase signal data of the reel motors 32L, 32C, 32R, reel motors 32L, 32C , 32R is stopped, and after a certain period of time has elapsed, the motor phase signal standby process (Sd11) for changing the phase signal to one-phase excitation is sequentially executed, and then the process proceeds to the step of Sd24.

Further, when it is determined in the step of Sd8 that the timer interrupt is 2, the normal command transmission process (Sd12) for transmitting various commands set in the command queue to the sub-control unit 91, and the door open detection switch 25 Door monitoring process (Sd13) for monitoring the detection status, requesting transmission of door commands, etc., external output signal update process (Sd14) for updating the external output signal, LED dynamic display process (Sd15) for dynamically lighting various indicators, After sequentially executing the control signal output process (Sd16) for outputting data such as lighting signals of various LEDs to the output port and the time counter update process (Sd17) for updating various time counters, the process proceeds to the step of Sd24.

Further, when it is determined in the step of Sd6 that the timer interrupt is 3 or the timer interrupt 4, it is further determined whether or not the branching counter value is 3, that is, whether or not the timer interrupt is 4 (Sd18). If it is not the timer interrupt 4, that is, if it is the timer interrupt 3, the origin passage process (Sd19) for checking the origin passage (passage of the reel reference position) of the rotating reels 2L, 2C, and 2R, and the switches After sequentially executing the switch input determination process (Sd20) for determining whether or not the detection state has changed, the process proceeds to the step of Sd24.

Further, when it is determined in the step of Sd18 that the timer interrupt is 4, the stop switch process (Sd21) for determining the stop position according to the detection of the stop switches 8L, 8C, 8R, and the two-phase when it is time to stop. After sequentially executing the stop process (Sd22) for starting the brake by excitation and the final stop process (Sd23) for three-phase excitation after a certain time from the start of the brake in the stop process, the process proceeds to the step of Sd24.

In the step of Sd24, the register saved in the game stack area in Sd1 is restored, and the process returns to the process before the interrupt.

In this embodiment, the timer interrupt process (main) is included in the game program, while the power failure determination process, the command transmission process at the time of power failure, the command transmission process during normal operation, and the door open monitoring process are included in the non-game program. As described above, the main control unit 41 sets interrupt prohibition in the timer interrupt process (main), saves the stack pointers and registers of the game programs, and then calls these non-game programs. It has become like. Further, when the timer interrupt processing (main) is returned from these non-game programs, the stack pointer and the register of the game program are returned to the state before the non-game program is called, and then the subsequent processing is performed. It is supposed to run. Since the main control unit 41 is set to prohibit other interrupts during the execution of the interrupt process, the main control unit 41 executes the subsequent process in the interrupt prohibited state even after returning from the non-game program. To do.

In addition, the non-gaming program that is executed in the timer interrupt process (main), such as power failure determination process, power failure command transmission process, normal command transmission process, and door open monitoring process, must be executed before these non-game programs. Processes other than certain processes (for example, port input process that needs to be executed before branching of timer interrupt, motor phase signal output process), that is, control effects whether performed before or after the non-game program It is designed to be executed before the processing without.

Next, the power interruption process executed by the main control unit 41 will be described.

FIG. 18 shows the power interruption process (main) executed after the power interruption command transmission process when the main control unit 41 determines that the power interruption flag is set in the timer interrupt process (main) described above. It is a flowchart which shows the control content. In this embodiment, the power interruption process is included in the game program.

In the power failure process (main), the main control unit 41 first saves all the registers that may be used in the stack area (Se1).

Next, all output ports including the parallel output port 513 that outputs commands are initialized (Se2). As a result, the output state of the output port corresponding to the last output command by the command transmission process at the time of power failure is initialized. Then, the destruction diagnosis data is set in the game RAM area (Se2). The destruction diagnosis data is 5A (H), that is, a value containing 1 in any bit. Next, the RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of all areas (including the unused area 3) of the game RAM area becomes 0, and all the game stack areas are set. The RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of the areas (unused area 3, game stack area (unused) and game stack area (in use)) becomes 0 ( Se4), prohibiting access to the RAM 41c (Se5). After that, the voltage drops, the CPU 41a of the main control unit 41 stops, and the state shifts to the standby state. Then, when the voltage drops in this standby state, the main control unit 41 is internally stopped in operation, and the operation is surely stopped in the event of a power failure.

In this embodiment, the adjustment data is set in the target area so that the calculation result of the target area in the power interruption process becomes a specific value (0 in this embodiment), and the target area is set in the start-up process. Whether or not the data in the RAM 41c is normal is determined by whether or not the calculation result of the area is a specific value. However, the calculation result of the target area in the power failure process and the target area in the start-up process are determined. It may be configured to determine whether or not the data in the RAM 41c is normal depending on whether or not the calculation result of the above matches. Further, the calculation method is not limited to the exclusive OR, and other calculation methods (for example, total sum) may be used.

Further, in this embodiment, the RAM parity adjustment data 1 is calculated using the data stored in all the areas of the game RAM area including the unused area 3 in the power interruption processing, and the unused area 3 is used in the startup processing. Whether or not the RAM 41c is normal is determined based on the RAM parity calculated using the data stored in all the areas of the game RAM area including the game RAM area, and an invalid program is stored in the unused area 3. In this case, it is determined that the RAM is abnormal, so that it is possible to prevent an invalid program from being stored in the unused area 3.

In this embodiment, the RAM parity adjustment data is calculated using the data stored in all the areas of the game RAM area including the unused area 3 in the power interruption process, and the unused area 3 is included in the start-up process. The configuration is such that whether or not the RAM 41c is normal is determined based on the RAM parity calculated using the data stored in all the areas of the game RAM area, but the RAM parity of the game RAM area including the unused area 3 is adjusted. Data is calculated and set in the game RAM area, and RAM parity adjustment data in the non-game RAM area is calculated and set in the non-game RAM area, and stored in the game RAM area including the unused area 3 in the startup process. It may be configured to determine whether or not the RAM 41c is normal based on the RAM parity calculated using the calculated data and the RAM parity calculated using the data stored in the non-gaming RAM area. In such a configuration, if an invalid program is stored in the game RAM area or the non-game RAM area, it is determined that the RAM is abnormal. Therefore, the invalid program is stored in either the game RAM area or the non-game RAM area. Can be prevented from being memorized.

As described above, in this embodiment, the main control unit 41 is started in the interrupt-prohibited state when a reset occurs, and is interrupted by the program at the start of the initial setting process to be executed for the first time thereafter. The prohibition is performed, and even if the main control unit 41 is activated in a state where the interrupt is not prohibited for some reason, it is possible to prevent an unintended interrupt from occurring.

Further, after the main control unit 41 is activated, after setting the timer interrupt in the timer circuit 509, the interrupt is permitted, and the interrupt occurs in a state where the timer interrupt does not operate normally. It can be prevented from being interrupted. Further, in the timer circuit 509, the timer is initialized by setting the timer interrupt, and the time counting is started from the initial value, and the time from the start until the first interrupt occurs. The timer interrupt can be generated at regular time intervals without any deviation from the time until the second and subsequent interrupts occur. Further, the main control unit 41 updates the setting of the timer circuit 509 to the initial value by the program in the initial setting process, and the setting of the timer circuit 509 is rewritten for some reason at the time of startup. Even if there is, it is possible to prevent an unintended interruption from occurring.

Further, if the setting key switch 37 is in the ON state at the time of activation, the main control unit 41 shifts to the setting change processing, and initializes the RAM 41c at the start of the setting change processing. At this time, if the data in the RAM 41c is normal, the special work is held and the other usable areas, that is, the game RAM area excluding the special work, the unused area 3, and the non-game RAM area are initialized. Even after changing the setting, a part of the control state (set value, game state, etc.) before the change can be retained, but if the data in the RAM 41c is not normal, all areas of the usable area are initialized. As a result, the abnormality in the data of the RAM 41c can be surely eliminated.

Further, since the RAM error flag is set in the main control unit 41 when a RAM abnormality is determined, the RAM parity is 0 when the power is turned off again after the RAM abnormality error occurs and the power is turned on again. Therefore, even when the destruction diagnosis data is determined to be normal, it is possible to determine whether or not the data in the RAM 41c is destroyed based on the RAM abnormality flag.

Further, after the setting change processing is completed, the main control unit 41 executes a main process for stepwise processing according to the progress of the game for each game unit. Further, in the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. Then, after the setting change process is completed, the main process is started from the stage before the process of initializing the RAM 41c in the main process, and the initialization of the RAM 41c after the setting change process is completed and the game unit. Initialization of each RAM 41c can be performed by a common process.

Further, when the RAM 41c is initialized, the main control unit 41 prohibits interrupts until the initialization is completed, and the timer interrupt process (main) is performed during the execution of the initialization of the RAM 41c. When it occurs, it is possible to prevent the initialized contents from being changed or the processing performed in the timer interrupt processing (main) from being performed normally.

Further, the main control unit 41 updates the output state of the external output signal in the main process, and changes the output state of the external output signal in the subsequent timer interrupt process (main) based on the updated output state. At the same time, when updating the output status of the external output signal, interrupting is prohibited until the update is completed, and the timer interrupt processing (main) occurs before the output status of the external output signal is completed. By doing so, it is possible to prevent an external output signal indicating unintended data from being output.

The main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program which is a program called by the game program and is not related to the progress of the game. In addition to executing the main process based on the program, it is possible to interrupt the main process at predetermined time intervals and execute the timer interrupt process (main) based on the game program, and the timer interrupt process can also be executed from the main process. It is also possible to call and execute a non-game program from (main).

In such a configuration, the main control unit 41 may malfunction due to the timer interrupt processing (main) being executed while the non-game program is being executed.

On the other hand, the main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program which is a program called by the game program and is not related to the progress of the game. It is possible to execute the main process based on the game program, and it is also possible to interrupt the main process at predetermined time intervals and execute the timer interrupt process (main) based on the game program, and also from the main process. , In a configuration in which the non-game program can be called and executed from the timer interrupt process (main), when the non-game program is called from the main process, after setting the interruption of other processes to prohibit, the relevant processing is performed. While calling the non-game program, when calling the non-game program from the timer interrupt process (main), that is, when calling the non-game program in a situation where further interruption is unlikely to occur, interrupt other processes. Since the non-game program is called without being set to prohibit, it is possible to reduce the program capacity related to the prohibition of interruption while preventing malfunction due to execution of interruption during execution of the non-game program. ..

The timer interrupt processing (main) executed by the main control unit 41 of this embodiment includes processing by a game program, for example, LED dynamic display processing, control signal output processing, etc., and processing by a non-game program, for example, normal time. It is composed of a plurality of processes including a command transmission process and a command transmission process at the time of power failure, and among a plurality of processes constituting the timer interrupt process (main), a process by a predetermined game program. In particular, since the non-game program is called before the process that can be executed before or after these non-game programs, that is, a plurality of processes constituting the timer interrupt process (main). Since the non-game program is called at the earliest possible stage, for example, even if the timer interrupt process (main) is not completed for some reason and the next timer interrupt occurs and double interrupts occur. , It is possible to prevent other interrupts from being executed during the execution of a non-game program.

The main control unit 41 of this embodiment can execute the game program and the non-game program, and has a game stack area for saving data used by the game program and a non-game stack area for saving data used by the non-game program. , Is provided separately, and the main control unit 41 saves the data used by the game program and the data used by the non-game program in the stack area separately provided, so that the stack area Is easy to manage. In particular, the data used by the game program saved due to the occurrence of the timer interrupt and the data used by the non-game program performed during the execution of the timer interrupt process (main) are mixed and stored in one stack area. Since there is no such thing, stack management is not complicated.

When executing the non-game program, the main control unit 41 of the present embodiment saves the register value used in the game program to the game stack area, calls the non-game program, and performs processing in the non-game program. When the processing in the non-game program is completed, the saved register value is restored, so that the register value used by the game program is prevented from being changed as the non-game program is executed. it can.

Further, when calling a non-game program from a process based on the game program, the common call process 1 or the common call process 2 that saves the value of the register used in the game program in the game stack area is called. By standardizing the program for executing the non-game program in the process, the program capacity can be reduced.

In this embodiment, when the non-game program is called from the process based on the game program in the main process, the common call process 1 is executed, while the non-game program is called from the process based on the game program in the timer interrupt process. the case, by executing the common call processing 2 that is different from the common call processing 1, but is configured to retract the value of the register is used in the game program in the game stack area, based on the game program in the main processing process A common common call process may be executed both when the non-game program is called from and when the non-game program is called from the process based on the game program in the timer interrupt process.

The main control unit 41 of this embodiment has a configuration in which a non-game program can be called and executed from both the main process and the timer interrupt process (main), and the non-game program can be executed from the main process. When calling, interrupt of other processing is set to prohibit and the non-game program is called, while when calling the non-game program from the timer interrupt processing (main), interrupt of other processing is set to prohibit. Although it is configured to call the non-game program without doing so, the main control unit 41 may call the non-game program from the main process or the non-game program from the timer interrupt process (main). It may be configured to prohibit interruption of the processing of.

Specifically, when the main control unit 41 calls the non-game program from the process based on the game program during the execution of the main process, the main control unit 41 executes the common call process 1 as in the present embodiment, while interrupting the timer. When a non-game program is called from a process based on the game program during execution of the process, as shown in FIG. 23, the game program sets the start address of the non-game program to be called in a register and performs a common call process. Execute 3. The common call process 3 is a process included in the game program as in the common call process 1. In the common call process 3, the register of the game program is saved in the game RAM area, and the stack pointer (SP, game stack area) is saved. (Address indicating the current position of) is saved in the SP save area of the game RAM area, and then the value of the interrupt master permission flag is set to a value indicating interrupt prohibition to prohibit interrupt interrupt. After that, the non-game program of the address set in the register is called.

On the other hand, the called non-game program sets the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program, executes the processing of the non-game program, and then executes the process. It returns to the game program of the caller, that is, the common call process 3. After returning to a common call processing 3, a common call processing 3, similar to the common call processing 2, on the basis of the data saved in the game RAM area, the stack pointer register and a game program, a non-gaming program It returns to the state before calling and ends. That is, in the common call process 3, the interrupt prohibition is maintained even after the end of the non-game program without setting the value of the interrupt master permission flag after the process of the non-game program is completed.

In such a configuration, the main control unit 41 prohibits interruption of other processes not only when the non-game program is called from the main process but also when the non-game program is called from the timer interrupt process (main). Therefore, as in the present embodiment, it is possible to prevent a malfunction due to the interruption being executed during the execution of the non-game program.

In particular, when the timer interrupt process (main) is executed, the interrupt prohibition is set, and the interrupt prohibition is canceled at the end of the timer interrupt process (main), so that the timer interrupt process (main) Interruption of other processing is prohibited during execution, but even in this case, interrupting of other processing is prohibited again when calling a non-game program from the timer interrupt processing (main), so something Even if the interrupt prohibition setting is canceled due to the cause, it is possible to prevent a malfunction due to the interrupt being executed during the execution of the non-game program.

Further, as described above, the interrupt prohibition is set when the timer interrupt process (main) is executed, and the interrupt prohibition is released at the end of the timer interrupt process (main). The configuration is such that interrupts of other processes are prohibited during execution of (main), but when interrupting other processes is prohibited again when calling a non-game program from timer interrupt processes (main). By maintaining the setting for prohibiting interrupts of other processes set when the non-game program is called even after the non-game program ends, the non-game interrupt process (main) is being executed. It is possible to prevent the prohibition of interrupts from being lifted by executing the program.

Next, the initialization of the RAM 41c of the main control unit 41 will be described with reference to FIG.

The main control unit 41 of the present embodiment initializes the game RAM area, the unused area 4, and the non-game RAM area when it is determined that the stored contents of the RAM 41c are destroyed at the start of the setting change process. That is, initialization 0 is performed to initialize all the usable areas.

Further, when it is determined that the stored contents of the RAM 41c are not destroyed at the start of the setting change process, the area of the game RAM area excluding the special work, the unused area 4, and the non-game RAM area are initialized. That is, initialization 1 is performed to initialize an area other than the special work among the usable areas.

Further, at the end of the setting change process, the important work, the general work, the unused area 3, and the game stack area (unused) in the game RAM area are initialized, that is, the special work and the game stack area in the game RAM area. Perform initialization 2 to initialize areas other than (in use).

Further, at the end of a specific game state and at the end of one game, initialization 3 is performed to initialize the general work, the unused area 3, and the game stack area (unused) in the game RAM area.

Further, at the end of one game, which is not the end of a specific game state, the initialization 4 for initializing the unused area 3 and the game stack area (unused) in the game RAM area is performed.

As described above, the main control unit 41 of the present embodiment performs initialization 0 to 4 when the predetermined condition is satisfied, and when the first condition is satisfied as the predetermined condition, of the usable area of the RAM 41c. When at least a part of the game RAM area in which the data used by the game program is stored is initialized and the second condition is satisfied as a predetermined condition, at least a part of the game RAM area and the usable area of the RAM 41c Initialize at least a part of the non-gaming RAM area used by the non-gaming program.

Specifically, as shown in FIG. 19, as the first condition, at the end of one game, the unused area 3 and the game stack area (unused), which are a part of the game RAM area among the usable areas. Is initialized, but the non-gaming RAM area of the usable area is not initialized. Further, as the first condition, at the end of the specific game state, the general work, the unused area 3, and the game stack area (unused), which are a part of the game RAM area, are initialized, but are used. Of the possible areas, the non-gaming RAM area is not initialized. Further, as the first condition, after the setting change state is completed, the important work, the general work, the unused area 3, and the game stack area (unused), which are a part of the game RAM area, are initialized. However, the non-gaming RAM area of the usable area is not initialized.

On the other hand, as a second condition, if there is no abnormality in the RAM when the setting change state is started, the important work, the general work, the unused area 3, which is a part of the game RAM area among the usable areas, The game stack area (unused) and the game stack area (used) are initialized, and all areas of the non-game RAM area are initialized. If there is an abnormality in the RAM when the setting change state is started, all the areas of the game RAM area among the usable areas are initialized, and all the areas of the game RAM area are initialized.

The main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program which is a program called by the game program and is not related to the progress of the game, and is capable of executing the game program and the non-game. It is equipped with a ROM 41d for storing a program.

In such a configuration, if a game program and a non-game program are mixed in one ROM 41d, it is difficult to determine which program is the program related to the progress of the game.

On the other hand, in the present embodiment, the ROM 41d includes a game program area in which the game program is stored and a non-game program area in which the non-game program is stored, and the game program area and the non-game program. Since the area and the area are assigned separately, the game program and the non-game program can be easily specified according to the difference in the storage area.

Further, the main control unit 41 of this embodiment is used as a work of a game program and stores a game RAM area for storing data used by the game program, and a game RAM area used as a work of a non-game program and stores data used by the non-game program. A non-game RAM area and a RAM 41c including the non-game RAM area are provided, and since the game RAM area and the non-game RAM area are separately allocated in the RAM 41c, the data used by the game program and the data used by the non-game program are used. The data can be easily specified according to the difference in the storage area, and the main control unit 41 initializes at least a part of the game RAM area when the first initialization condition is satisfied, and the first When the initialization condition of 2 is satisfied, at least a part of the game RAM area is initialized, and at least a part of the non-game RAM area is initialized, so that the data used by the game program stored in the RAM 41c Of the data used by the non-game program, appropriate data can be initialized according to the situation.

As the first initialization condition, the main control unit 41 of this embodiment initializes the unused area 3 and the game stack area (unused), which are a part of the game RAM area, when one game is completed. As the first initialization condition, when the special game state (BB) is finished and one game is finished, the general work, the unused area 3, and the game stack, which are a part of the game RAM area, are finished. When the area (unused) is initialized and the setting change is completed and the main process is started as the first initialization condition, the important work area, the general work area, and the unused area that are a part of the game RAM area are not used. Since the used area 3 and the game stack area (unused) are initialized, appropriate data can be initialized according to the situation.

Further, as a second initialization condition, the main control unit 41 of the present embodiment has an important work, a general work, and an unused area which are a part of the game RAM area when there is no abnormality in the RAM at the start of setting change. 3. Initialize the game stack area (unused) and the game stack area (in use), and of the non-game RAM areas, the area referenced by the game program, the area not referenced by the game program, and the non-game stack area ( (Unused) and non-game stack area (in use), that is, all areas of the non-game RAM area are initialized, and as a second initialization condition, when there is an abnormality in the RAM at the start of setting change, the game RAM area Of these, special work, important work, general work, unused area 3, game stack area (unused) and game stack area (in use), that is, all areas of the game RAM area are initialized, and the non-game RAM area is initialized. Of these, to initialize all areas of the area referenced by the game program, the area not referenced by the game program, the non-game stack area (unused) and the non-game stack area (in use), that is, the non-game RAM area. , Data used by the gaming program stored in the RAM 41c and data used by the non-gaming program, which are appropriate depending on the situation can be initialized.

The main control unit 41 of this embodiment has a configuration in which a part of the game RAM area is initialized when the first initialization condition is satisfied, but the main control unit 41 is the first. When the initialization condition is satisfied, at least a part of the game RAM area may be initialized, and all the areas of the game RAM area may be initialized.

Further, the main control unit 41 of the present embodiment is configured to initialize a part of the game RAM area and all areas of the non-game RAM area when the second initialization condition is satisfied. However, the main control unit 41 initializes at least a part of the game RAM area and initializes at least a part of the non-game RAM area when the second initialization condition is satisfied. Any area may be used, and all areas of the game RAM area may be initialized, all areas of the non-game RAM area may be initialized, or at least a part of the non-game RAM area may be initialized. It may be the one that initializes all the areas of both the game RAM area and the non-game RAM area.

Since the main control unit 41 of the present embodiment configures the program for initializing the game RAM area and the program for initializing the non-game RAM area as separate programs, the game program is a non-game RAM area. Since there is no need to initialize, the capacity of the game program can be reduced. Further, the program for initializing the game RAM area can be shared both when the first initialization condition is satisfied and when the second initialization condition is satisfied. Further, a program for initializing the game RAM area is provided as a game program, and a program for initializing the non-game RAM area is provided as a non-game program. Therefore, the game program initializes the non-game RAM area, or the non-game program performs the game RAM. It is possible to prevent the game program from affecting the non-game program and the non-game program from affecting the game program without initializing the area.

As the first initialization condition, the main control unit 41 of the present embodiment sets the game end processing setting in the main processing, and then determines that it is not the end of a specific game state, that is, the end of one game. By setting the start address of the RAM to be initialized at the end of the game and executing the game area initialization process, a predetermined area of the game RAM area is initialized, so that the game progresses for each game unit. A part of the unnecessary game RAM area can be initialized.

The main control unit 41 of this embodiment is activated with the setting key switch 37 turned on, and when the setting change process is started, that is, the second initialization condition is satisfied based on the setting change operation being performed. At that time, the game area initialization process is executed to initialize a predetermined area of the game RAM area, and the non-game area initialization process is executed to initialize the predetermined area of the non-game RAM area. It is possible to initialize both the game RAM area and the non-game RAM area based on the setting change operation (initialization operation) of the game clerk.

The game RAM area of the RAM 41c of the present embodiment includes an unused area 3 that is not used when performing control based on the game program or when performing control based on the non-game program, and includes the first initialization condition. Since the unused area 3 is initialized both when the above is satisfied and when the second initialization condition is satisfied, it is possible to prevent invalid data from being stored in the unused area 3.

In this embodiment, the unused area 3 is initialized both when the first initialization condition is satisfied and when the second initialization condition is satisfied, but at least when the first initialization condition is satisfied. If the unused area 3 is initialized when any one of the conditions is satisfied when the second initialization condition is satisfied, it is possible to prevent invalid data from being stored in the unused area 3. Further, if the first initialization condition is a configuration including a plurality of conditions, and if the configuration is such that the unused area 3 is initialized when at least one of the conditions is satisfied, invalid data is stored in the unused area 3. It can be prevented from being done. The same applies even if the second initialization condition includes a plurality of conditions.

The main control unit 41 of this embodiment is used as a work of a game program and is used as a game RAM area for storing data used by the game program, and a non-game RAM area is used as a work of a non-game program and stores data used by the non-game program. A RAM 41c including a game RAM area is provided, and the RAM 41c has a configuration capable of holding data stored in the RAM 41c for a predetermined period even if the power supply to the slot machine 1 is stopped by the backup power supply, and is a main. When the power supply to the slot machine 1 is started, the control unit 41 starts the initial setting process, and whether or not the stored contents of the RAM are normal based on the data stored in the RAM 41c held by the backup power supply. If it is determined to be normal, the control is restarted based on the data stored in the RAM 41c.

In such a configuration, when the power supply to the slot machine 1 is started, whether or not the stored contents of the RAM are normal based on the data stored in both the game RAM area and the non-game RAM area of the RAM 41c. When determining whether or not, the load when resuming control based on the data stored in the RAM 41c becomes excessive.

On the other hand, the main control unit 41 of the present embodiment starts the initial setting process when the power supply to the slot machine 1 starts, and the RAM of the game RAM area of the RAM 41c held by the backup power supply It is determined whether or not the stored contents of the RAM are normal based on the parity and the destruction diagnosis data stored in the game RAM area, and if it is determined to be normal, the data stored in the game RAM area and the non-game Control is restarted based on the data stored in the RAM area, and whether or not the non-game data stored in the non-game RAM area that does not hinder the progress of the game is normal or not. By omitting the determination, it is possible to reduce the load when resuming the control while ensuring that the game can proceed normally.

The game RAM area of the RAM 41c of the present embodiment includes an unused area 3 that is not used when performing control based on the game program or when performing control based on the non-game program, and is the main control. The unit 41 executes the initial setting process when the power supply to the slot machine 1 is started, calculates the RAM parity of the game RAM area including the unused area 3 in the initial setting process, and calculates the RAM. Since it is determined whether or not the stored contents of the game RAM area are normal based on the parity, it is possible to prevent illegal data from being stored in the unused area 3.

The main control unit 41 of the present embodiment executes the initial setting process when the power supply to the slot machine 1 is started, and determines whether or not the stored contents of the RAM 41c are destroyed in the initial setting process. , When it is determined that the stored contents of the RAM 41c are destroyed, the RAM error flag is set to control the error processing, and then the error state is maintained without automatically recovering, while the setting key switch 36 When the power supply to the slot machine 1 is started while is ON, the setting change process is controlled, the game area initialization process is executed to initialize the game RAM area, and the non-game area is initialized. Since the process is executed to initialize the non-game RAM area, that is, both the game RAM area and the non-game RAM area are initialized when the error state is cleared, either the game RAM area or the non-game RAM area It is possible to prevent the game from proceeding with an abnormality occurring in the crab.

The main control unit 41 of this embodiment sets a RAM abnormality flag when it is determined in the initial setting process that the stored contents of the RAM 41c are destroyed when the power supply to the slot machine 1 is started. After that, with the setting key switch 36 turned on, the power supply to the slot machine 1 is started, and the setting change process is executed, so that the game is played as the error state is cleared. Although both the RAM area and the non-gaming RAM area are initialized, the main control unit 41 destroys the stored contents of the RAM 41c in the initial setting process when the power supply to the slot machine 1 is started. When it is determined that the game RAM area and the non-game RAM area are both initialized, the error processing may be controlled. In such a configuration, both the game RAM area and the non-game RAM area are initialized when the error processing is controlled. Therefore, as in the present embodiment, either the game RAM area or the non-game RAM area is abnormal. It is possible to prevent the game from proceeding with the occurrence of. Further, both the game RAM area and the non-game RAM area may be initialized both when it is determined that the stored contents of the RAM 41c are destroyed and when the setting change process is subsequently executed. Even with the configuration, it is possible to prevent the game from proceeding with an abnormality occurring in either the game RAM area or the non-game RAM area.

The main control unit 41 of this embodiment executes the power cut processing when the power supply to the slot machine 1 is stopped and the power supply voltage drop is detected by the power cut detection circuit 48. In the power cut process, the RAM 41c By prohibiting access to, access to both the game RAM area and the non-game RAM area is prohibited, so the non-game RAM area that is not subject to judgment as to whether or not the data is destroyed at the next startup is used. It is possible to prevent invalid data from being stored.

Next, a timer counter for measuring the time interval used by the main control unit 41 for controlling the progress of the game and the like will be described with reference to FIGS. 20 to 22.

When the timekeeping start condition is satisfied, the main control unit 41 sets an initial value according to the timekeeping time as a timer value of the timer counter assigned to the game RAM area of the RAM 41c, and in the timer interrupt processing (main). The timer value is periodically subtracted, and when the timer value becomes 0, it is specified that the time has passed.

Specifically, when the timekeeping start condition is satisfied in the main process, the main control unit 41 sets the initial value of the timer value according to the timekeeping time in the area to which the timer counter corresponding to the condition is assigned. The set timer value is subtracted by 1 in the time counter update process of the timer interrupt process (main) until it becomes 0 about every 2.24 ms.

Then, in the main process, as shown in FIG. 20, the address of the corresponding timer counter is acquired (Si1), the acquired value is read (Si2), and it is determined whether or not the read value is not 0 (Si3). , When it is determined that the read value is 0, it is specified that the time counting time has elapsed.

As shown in FIG. 21, the timer counter used in this embodiment has an initial value of 1 byte or less, 1 byte timer A, 1 byte timer B, 1 byte timer C, and an initial value of more than 1 byte and 2 bytes or less. Includes 2-byte timer A, 2-byte timer B, 2-byte timer C, and 2-byte timer D.

The 1-byte timer is a timer for measuring a relatively short period that can be measured with a timer value of 1 byte or less. For example, an external output signal timer that measures the output period of an external output signal and an LED output update period. LED update timer to measure, stop invalid timer to measure the period from detection of stop operation to activation of stop operation again, payout waiting to measure the period from reel stop to start of medal payout The timer, the insertion detection timer that measures the period after the ON of the insertion medal sensor 31 is detected, the insertion port detection timer that measures the period after the ON of the insertion port sensor 26 is detected, and the ON of the payout sensor 34c are detected. There are a payout detection timer that measures the period after the LED is rotated, a start timer that measures the period from the start of reel rotation until the stop operation becomes effective, and the like. Of these, the stop invalid timer, the payout wait timer, and the start timer do not span the timing at which one game ends in the measurement period of these timers, but the external output signal timer, LED update timer, input detection timer, and input port The detection timer and the payout detection timer may have a measurement time by these timers that spans the timing at which one game ends.

The 2-byte timer is a timer for measuring a relatively long period that cannot be measured with a timer value of 1 byte or less. For example, a 1-game time timer that measures a specified time (about 4.1 seconds) required for 1 game. , A security signal timer that measures the minimum output period of the security signal among the external output signals, a standby time timer that measures the period from the end of the game, and a hopper empty that measures the period during which the payout sensor 34c is not detected after the hopper motor 34b is driven. There is a timer and so on. Of these, the standby time timer and the hopper empty timer do not straddle the timing at which the measurement period by these timers ends one game, but the one game time timer and the security signal timer measure the measurement time by these timers for one game. May straddle the end timing of.

In this way, the timer counter is a timing at which one game ends, that is, a timing at which a part of the RAM 41c is initialized according to the progress of the game (a part of the RAM 41c at the end of one game or at the end of a specific game state). A timer counter that measures the measurement period that straddles the timing at which is initialized) and a timer counter that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game. The counter is also assigned to a special work that is not initialized at the timing according to the progress of the game.

Of these timer counters, the 1-byte timers A to C are allocated 1 byte each to the continuous 3-byte area (804CH to 804EH) of the RAM 41c, and the 2-byte timers A to D are the continuous 8-byte areas of the RAM 41c. Two bytes are allocated to each region (804FH to 8055h). Further, the 1-byte timers A to C and the 2-byte timers A to D are also assigned to the continuous area of the RAM 41c. Hereinafter, the area to which the 1-byte timers A to C are allocated is referred to as a 1-byte timer group, and the area to which the 2-byte timers A to D are allocated is referred to as a 2-byte timer group. That is, both the 1-byte timer group and the 2-byte timer group are set in the area to which consecutive addresses are assigned according to a predetermined rule. The area to which consecutive addresses are assigned according to a predetermined rule is, for example, an area to which an address to be added by N (N is a natural number) from the start address and the start address is assigned.

FIG. 22 is a flowchart showing the control contents of the time counter update process.

In the time counter update process, first, the number of 1-byte timer counters to be updated (3 in this embodiment) is set as the number of 1-byte processes (Sj1), and the start address (804CH) of the 1-byte timer group is set. Set the pointer (Sj2).

Next, if the 1-byte value stored in the specified address (address indicated by the pointer) is not 0, the 1-byte value of the specified address is subtracted by 1 (Sj3), and the number of processes set in the step of Sj1 is subtracted by 1. (Sj4), it is determined whether or not the number of processes after subtraction is 0 (Sj5).

If the number of processes after subtraction is not 0 in the step of Sj5, that is, if the update of all 1-byte timers is not completed, the pointer is added by 1 (Sj6), and the process returns to the step of Sj3. As a result, the pointer moves to the address of the unprocessed 1-byte timer, and if the 1-byte value of the specified address is not 0, it is subtracted.

When the number of processes after subtraction is 0 in the step of Sj5, that is, when the update of all 1-byte timers is completed, the number of 2-byte timer counters to be updated is set as the number of 2-byte processes (this embodiment). Then, 4) is set (Sj7), and the pointer is added by 1 (Sj8). As a result, the pointer moves to the start address (804FH) of the 2-byte counter group.

Next, if the 2-byte value stored in the area consisting of the specified address (address indicated by the pointer) and the next address is not 0, the 2-byte value of the specified address and the next address is subtracted by 1 (Sj9), and Sj7. The number of processes set in step 1 is subtracted by 1 (Sj10), and it is determined whether or not the number of processes after the subtraction is 0 (Sj11).

If the number of processes after subtraction is not 0 in the step of Sj11, that is, if the update of all 2-byte timers is not completed, the pointer is added by 2 (Sj12), and the process returns to the step of Sj9. As a result, the pointer moves to the address of the unprocessed 2-byte timer, and if the 2-byte value of the specified address and the next address is not 0, the pointer is subtracted.

When the number of processes after subtraction is 0 in the step of Sj11, that is, when all the 2-byte timers have been updated, the processes are terminated.

As described above, in this embodiment, the value of the timer counter assigned to the RAM 41c is periodically updated, and the passage of time is specified by becoming a specific value (0). Conventionally, when measuring multiple types of time intervals, timer values are set and updated within multiple types of processing that require timekeeping, and each process is a program for updating multiple types of timer values. Since it is necessary to provide it inside, it has been a factor of increasing the program capacity. In addition, since multiple types of timer counters are assigned as data groups for each process used, it is necessary to read the values of their unrelated addresses in order to update them collectively in one process. there were.

On the other hand, in this embodiment, the area in which a plurality of types of timer counter values are stored is set in the area to which continuous addresses are assigned according to a predetermined rule of the RAM 41c, and the timer values stored in the designated addresses are set. Since the update process is repeatedly executed while changing the specified address for the area where multiple types of timer counter values are stored by adding a constant to the current specified address, multiple types of timer values are updated. , The program capacity can be reduced as compared with the case where a process of designating a plurality of types of addresses and updating the value of the address is performed in each process.

It should be noted that the process of updating the timer value stored in the specified address is repeatedly executed while changing the specified address for the area in which the timer counter values of multiple types are stored by performing a predetermined operation, thereby performing multiple types of timers. Any configuration may be used as long as the value is updated. For example, by adding a constant to the currently specified address, multiple types of timer counter values can be repeatedly executed while changing the specified address for the area where the value is stored. The timer value may be updated, or a value corresponding to the number of processes with respect to the reference address (for example, in the case of a 1-byte counter, +1 for the number of processes 1 and +2 for the number of processes 2 and the number of processes). In the case of 3, +3 ...) may be added or subtracted to update the plurality of types of timer values by repeatedly executing while changing the designated address for the area in which the plurality of types of timer counter values are stored.

Further, in this embodiment, the configuration includes seven types of timer counter values of 1-byte timers A to C and 2-byte timers A to D, but at least two or more types of timer counter values are set according to a predetermined rule of the RAM 41c. The process of updating the timer value stored in the specified address by setting the area where consecutive addresses are assigned in is changed by performing a predetermined operation to change the specified address for the area where multiple types of timer values are stored. However, if the configuration is such that two or more types of timer values are updated by repeatedly executing the timer values, the program capacity can be reduced as described above.

Further, for only one of the 1-byte timer and the 2-byte timer, the timer counter value is set in the area to which continuous addresses are assigned according to a predetermined rule of the RAM 41c, and the timer value stored in the specified address is updated. A configuration may be used in which a plurality of types of timer values are updated by repeatedly executing the operation while changing the designated address for the area in which the plurality of types of timer values are stored by performing a predetermined operation.

Further, only a part of the timer counters provided in the main control unit 41 is set to the area to which continuous addresses are assigned according to a predetermined rule of the RAM 41c, and the timer value stored in the designated address is updated. A configuration may be used in which a plurality of types of timer values are updated by repeatedly executing the operation while changing the designated address for the area in which the plurality of types of timer values are stored by performing a predetermined operation.

Further, in the present embodiment, a separate timer counter is provided for each type of measurement period, but for example, one timer counter may be shared for a plurality of types of periods in which the measurement periods do not overlap.

Further, in this embodiment, as the processes executed by the main control unit 41, a timer interrupt process (main) that periodically performs a predetermined process regardless of the progress status of the game, and a timer interrupt process (main) that periodically performs the process according to the progress status of the game. The main control unit 41 sets an initial value in the timer counter when a timing condition is satisfied in the main process, including a main process that performs different processes in stages, and a plurality of types in the timer interrupt process (main). Since the timer value is updated and it is not necessary to provide a process for updating multiple types of timer values in each process constituting the main process, the program capacity for updating multiple types of timer values is reduced. be able to.

In this embodiment, the timer interrupt process (main) is executed by interrupting the main process periodically, but it is determined in advance in the timer interrupt process that is periodically performed regardless of the progress of the game. A configuration may be configured in which both the periodic processing for performing the processing and the main processing for performing different processing stepwise according to the progress of the game are performed. Even in such a configuration, the main control unit 41 is the main. By setting the initial value in the timer counter when the timing condition is satisfied in the process and updating multiple types of timer values in the periodic process, multiple types of timer values can be set in each process that constitutes the main process. Since it is not necessary to provide a process for updating, it is possible to reduce the program capacity for updating a plurality of types of timer values.

Further, in this embodiment, in the time counter update process, the value of the specified address is updated on the condition that the value of the specified address is not 0, and the timer value is updated to an abnormal value. Can be prevented.

Further, in the present embodiment, in the time counter update process, the same number of processes as the number of timer counters to be updated is set, and the process of updating the timer value is repeatedly executed for the set number of processes. In addition to facilitating the management of the number of timer counters to be updated, for example, when a plurality of types of timer counters having different update intervals are provided, the type of timer value to be updated can be arbitrarily set according to the number of processes to be set. it can.

The number of processes, that is, the number of timer counters to be updated may be set in the program, or the value set in the table may be read and set.

In addition, the timer counter to be updated last is set in advance without setting the number of processes first, and the process of updating the timer value is repeatedly executed until the address of the timer counter is reached, or the process is updated at the end. A specific end value (for example, FFh) is stored in the next address of the timer counter to be used, and the process of updating the timer value is repeatedly executed until the value read from the specified address reaches the specific end value. good.

Further, in this embodiment, a 1-byte timer counter and a 2-byte timer counter are provided, and a process of updating the 1-byte timer value and a process of updating the 2-byte timer value are separately provided. Therefore, the capacity of the program and the capacity occupied by the timer value in the RAM 41c can be reduced as compared with the case where the process of updating the 1-byte timer value and the process of updating the 2-byte timer value are shared.

In this embodiment, a 2-byte timer counter is provided to measure a relatively long time corresponding to an initial value exceeding 1 byte. For example, a timer counter having a different update interval, for example, a timer Interruption processing (main) By providing a first timer counter that updates once every four times and a second timer counter that updates once every 14 times, it is relative without providing a 2-byte counter. It may be configured to measure a long time interval, and by doing so, it is not necessary to provide a process of updating the 1-byte timer value and a process of updating the 2-byte timer value, so that the timer value does not need to be provided. It is possible to reduce the program capacity related to the update of.

Further, in the present embodiment, a plurality of types of timer counters are assigned to a special work that is not initialized according to the progress of the game in the RAM 41c, and are not initialized according to the progress of the game. Regardless of the progress of the game, it is possible to measure the time of the period straddling the timing at which a part of the RAM 41c is initialized according to the progress of the game.

In particular, in this embodiment, not only the timer counter whose measurement period may straddle the end timing of one game, that is, the timing when a part of the RAM 41c is initialized according to the progress of the game, but also the measurement period is the game. Since the timer counter that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress is also stored in the area allocated to the special work together with the other timer counters, the timer counter can be easily managed. At the same time, a timer counter whose measurement period does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game is set, and the timing at which a part of the RAM 41c is initialized according to the progress of the game is set. The usage of the timer counter can be easily changed by a later design change such as changing to a timer counter that may straddle. Further, if one timer counter is shared for a plurality of types of periods in which the measurement periods do not overlap as described above, the timing at which a part of the RAM 41c is initialized may be straddled according to the progress of the game. It is possible to measure the measurement period and the measurement period that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game with one timer counter.

Although the embodiments of the present invention have been described above with reference to the drawings, the present invention is not limited to the present invention and is included in the present invention even if there are changes or additions within the scope of the gist of the present invention. Needless to say.

In the above embodiment, an example in which the present invention is applied to a slot machine in which a bet number is set by using medals and credits as a game value has been described, but a slot in which a game ball is used as a game value to set a bet number. It may be applied to machines or fully credited slot machines that set the number of bets using only credits as game value. When using a game ball as a game value, for example, one medal can correspond to five game balls, and when setting 3 as the number of bets in the above embodiment, 15 game balls are used. Corresponds to setting the number of medals using.

Further, the value is not limited to one using only one of a plurality of types of game values such as medals and game balls, and for example, a plurality of types of game values such as medals and game balls can be used together. It may be. That is, it is possible to set the number of bets and play a game by using any of a plurality of types of game values such as medals and game balls, and a plurality of types of games such as medals and game balls are generated when a prize is generated. You may apply a slot machine that can pay out any of the utility values.

In the above embodiment, the slot machine as a game machine is applied, but the game machine is not limited to the slot machine 1, and the game machine other than the slot machine, such as a pachinko game machine using a game ball, has the configuration of the present invention. In particular, the gaming program and the non-gaming program can be executed, and the configurations for initializing the RAM 41c, determining the RAM abnormality at startup, and calling the non-gaming program may be applied.

1 Slot machine 2L, 2C, 2R reel 6 MAXBET switch 7 Start switch 8L, 8C, 8R Stop switch 12 Game auxiliary display 41 Main control unit 41c RAM
91 Sub control unit 91c RAM

Claims (1)

In the game machine that plays the game
A first storage means having a first storage area capable of storing a program,
A control means that controls based on a program stored in the first storage means,
A second storage area including a variable data storage area capable of storing variable data used when the control means performs control based on the program and a stack area for temporarily storing data used by the program. Memories and
With
The first storage area is
The first program area where the first program is stored and
A second program area in which the second program called by the first program is stored, and
Including
The variable data storage area is
A first variable data storage area that is updated and referenced in the first program and not updated in the second program.
A second variable data storage area that is updated and referenced in the second program but not updated in the first program.
Including
The stack area is
A first stack area for temporarily saving data used by the first program, and
A second stack area for temporarily saving data used by the second program, and
Including
The first program includes a first initialization program that initializes at least a portion of the first variable data storage area.
The second program includes a second initialization program that initializes at least a portion of the second variable data storage area.
The control means
In addition to executing the basic program of the first program, a timer interrupt occurs at predetermined time intervals to interrupt the running program and execute the interrupt program of the first program.
When the second program is called from the first program, the data used by the first program is saved in the first stack area in the first program, and then the second program is called and based on the second program. After executing the process and completing the process based on the second program, the data used by the first program is returned from the first stack area in the first program.
The second program may be called from both the basic program and the interrupt program.
When the interrupt program is executed, the data used by the running program is temporarily saved in the stack area.
When the second program is called from the basic program or when the second program is called from the interrupt program, the other program by the timer interrupt is used for the period during which the second program is executed. Prohibit interruption ,
It is determined whether or not the first initialization condition is satisfied according to the progress of the game, and when it is determined that the first initialization condition is satisfied, the initial initialization by the first initialization program is performed. Of the initialization and initialization by the second initialization program, only the initialization by the first initialization program is performed.
When it is determined whether or not the second initialization condition is satisfied when the power supply to the game machine is started, and when it is determined that the second initialization condition is satisfied, the second initialization condition is satisfied. A gaming machine that individually performs initialization by one initialization program and initialization by the second initialization program .

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