JP2017029595A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine in which a program related to progress of a game, and a program which is not related to the progress of the game can be easily distinguished.SOLUTION: A main control part comprises: a ROM in which a game program region for storing game programs, and a non-game program region for storing non-game programs, are allocated independently. The main control part can call and execute the non-game program from main processing and from timer interruption processing (main). The main control part calls the non-game program after setting interruption of other processing to inhibition, in both of when the non-game program is called from the main processing and when the non-game program is called from the timer interruption processing (main).SELECTED DRAWING: Figure 23

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine or a slot machine.

  As this type of gaming machine, for example, a program related to the progress of a game for causing a lottery or operation of each part in accordance with the player's operation, and an abnormality detection that is not directly related to the progress of the game (for example, an abnormal prize winning) And the program related to (determination) etc. are mixedly stored in one storage area (for example, see Patent Document 1).

JP 2007-222418 A

  In the gaming machine described in Patent Document 1, if a program related to the progress of a game and a program not directly related to the progress of the game are mixed in one storage area, which program is related to the progress of the game It was difficult to determine whether or not.

  The present invention has been made paying attention to such problems, and an object thereof is to provide a gaming machine capable of easily distinguishing between a program related to the progress of a game and a program not related to the progress of the game. To do.

In order to solve the above problems, the gaming machine of means 1 of the present invention is:
In a gaming machine (slot machine 1) that performs a game,
Storage means (ROM 41b) having a storage area (game program area, non-game program area) capable of storing a program (game program, non-game program);
Control means (main control unit 41) for performing control based on a program stored in the storage means;
With
The storage area is
A game program area (game program area) in which a game program (game program) related to the progress of the game is stored;
A non-game program area (non-game program area) in which a non-game program (non-game program) which is a program called by the game program and is not involved in the progress of the game is stored;
Including
The control means includes
The basic process (main process) based on the game program is executed, the basic process is interrupted at predetermined time intervals, and the interrupt process based on the game program (timer interrupt process (main)) is executed.
The non-game program may be called from both the basic process (main process) and the interrupt process (timer interrupt process (main)).
Even when the non-game program (non-game program area) is called from the basic process (main process), the non-game program (non-game program area) is called from the interrupt process (timer interrupt process (main)). Sometimes it is characterized by prohibiting interrupts of other processes.
According to this feature, a game program area in which a game program related to the progress of the game is stored, a non-game program area that is a program called by the game program and stores a non-game program that is not related to the progress of the game, Since these are assigned separately, the game program and the non-game program can be easily specified according to the difference in the storage area. In addition, when calling a non-game program from the basic process or when calling a non-game program from the interrupt process, interrupts of other processes are prohibited, so interrupts are executed during the execution of the non-game program. Malfunction can be prevented.

The gaming machine of means 2 of the present invention is the gaming machine described in means 1,
When the control means calls the non-game program (non-game program area) from the basic process (main process), the control means cancels the prohibition of interruption with the end of the non-game program (non-game program area), When the non-game program (non-game program area) is called from the interrupt process (timer interrupt process (main)), the prohibition of interrupt should be maintained even after the non-game program (non-game program area) ends. It is characterized by.
According to this feature, it is possible to prevent the prohibition of the interrupt from being released due to the execution of the non-game program even during the execution of the interrupt process.

The gaming machine of means 3 of the present invention is the gaming machine according to means 1 or 2,
A stack area (game stack area) for saving data used by the game program (game program area), and a stack area (non-game stack area) for saving data used by the non-game program (non-game program area). It is characterized by being prepared separately.
According to this feature, the data used by the game program and the data used by the non-game program are saved in the stack areas separately provided, so that the management of the stack area becomes easy.

A gaming machine according to means 4 of the present invention is the gaming machine according to any one of means 1 to 3,
The control means, when executing the non-game program (non-game program area), after saving the register value used in the game program (game program area) to the stack area (game stack area), It is characterized by executing processing in a non-game program (non-game program area).
According to this feature, it is possible to prevent the value of the register used by the game program from being changed as the non-game program is executed.

The gaming machine of means 5 of the present invention is the gaming machine according to means 4,
When the non-game program (non-game program area) is executed, the control means saves a register value used in the game program (game program area) to a stack area (game stack area) ( It is characterized by calling common call processing 1 and common call processing 3).
According to this feature, since the program to be executed when executing the non-game program is shared, the program capacity can be reduced.

A gaming machine of means 6 of the present invention is the gaming machine according to any one of means 1 to 5,
Address storage means (vector table) capable of storing an address of an interrupt program (timer interrupt process (main)) for executing the interrupt process;
Determining means for determining at startup whether or not the address stored in the address storage means (vector table) is within a predetermined range (area in which a program or the like is actually stored in the program area);
Activation restriction means for restricting activation when it is determined that the address stored in the address storage means (vector table) is not within a predetermined range (the main control unit 41 has a vector table address within a program area such as a program Do not start if it is not the actual storage area),
It is characterized by having.
According to this feature, unintended interrupt processing can be prevented in advance.

A gaming machine according to means 7 of the present invention is the gaming machine according to any one of means 1 to 6, wherein
Comprising setting means for setting the control means (setting of various functions performed with reference to HW parameters);
The control means executes processing based on a program (game program or non-game program) after setting by the setting means, and prohibits interruption before starting processing based on the program (startup) Setting of prohibition of interrupt by hour setting)
It is characterized by that.
According to this feature, it is possible to prevent an unintended interrupt from occurring.

A gaming machine according to means 8 of the present invention is the gaming machine according to any one of means 1 to 7,
A plurality of timer value storage areas (for example, 1-byte timers A to C);
When any type of timing condition is satisfied among a plurality of types of timing conditions (for example, timing conditions for 1-byte timers A to C), a timer value storage area (for example, 1-byte timer A) corresponding to the timing condition To C), a timer value storage means (main process) for storing a timer value according to the timing condition;
Timer value updating means (time counter updating process) capable of updating timer values stored in a plurality of timer value storage areas (for example, 1-byte timers A to C) at predetermined intervals (about 2.24 ms);
With
A plurality of timer value storage areas (for example, 1-byte timers A to C) are assigned consecutive addresses (804CH to 804EH) according to a predetermined rule (+1),
The timer value updating means performs a predetermined operation (specified address + 1) for an update process for updating the timer value stored in the timer value storage area corresponding to the specified address (a process for subtracting 1 from the value indicated by the pointer). It is characterized in that multiple types of timer values can be updated by repeatedly executing while changing the designated address for the timer value storage area.
According to this feature, a plurality of timer value storage areas are assigned consecutive addresses according to a predetermined rule, and an update process for updating the timer value stored in the timer value storage area corresponding to the specified address is performed in a predetermined manner. When the processing for updating multiple types of timer values is performed for each type of timer value, it is possible to update multiple types of timer values by repeatedly executing while changing the specified address for the timer value storage area. As a result, the program capacity can be reduced.
Note that consecutive addresses are assigned according to a predetermined rule means that, for example, an address that is incremented by N (N is a natural number) from the start address and the start address is assigned.
In addition, changing the designated address for the timer value storage area by performing a predetermined calculation is, for example, changing the designated address by adding or subtracting a value according to the number of processes to the current designated address, This corresponds to changing the designated address by adding or subtracting a constant to or from the reference address. At this time, the value or constant according to the number of processes may vary depending on the storage capacity of the timer value. For example, if the timer value is stored byte by byte, the value according to the number of processes is the number of processes. Depending on the number of processing, the value is 2, 4, 6,..., Depending on the number of processing. The constant is 2.

  In addition, this invention may have only the invention specific matter described in the claim of this invention, and has a structure other than this invention specific matter with the invention specific matter described in the claim of this invention. It may be a thing.

It is a front view of the slot machine of the Example to which this invention was applied. It is a perspective view which shows the internal structure of a slot machine. It is a figure which shows the symbol arrangement | sequence of a reel. It is a block diagram which shows the structure of a slot machine. It is a block diagram which shows the structure of a main control part. It is a figure which shows the memory map of ROM and RAM which a main control part mounts. It is a figure which shows the detail of the memory map of ROM and RAM which a main control part mounts. It is a figure which shows the structure of a game program and a non-game program. It is a figure which shows the relationship between a game area | region and a non-game area | region. (A) is a flowchart showing a flow of processing when a non-game program is called from processing based on a game program during execution of the main processing, and (b) is based on a game program during execution of the timer interrupt processing. It is a flowchart which shows the flow of a process at the time of calling a non-game program from a process. It is a flowchart which shows the control content of the initial setting process which a main control part performs. It is a flowchart which shows the control content of the setting change process which a main control part performs. It is a flowchart which shows the control content of the game area initialization process which a main control part performs. It is a flowchart which shows the control content of the non-game area initialization process which a main control part performs. It is a flowchart which shows the control content of the main process which a main control part performs. It is a flowchart which shows the control content of the timer interruption process (main) which a main control part performs. It is a flowchart which shows the control content of the timer interruption process (main) which a main control part performs. It is a flowchart which shows the control content of the power interruption process (main) which a main control part performs. It is a figure which shows the area | region of RAM which a main control part initializes when the 1st condition and the 2nd condition are satisfied. It is a flowchart which shows the control content at the time of the main control part determining the value of a timer counter. It is a figure which shows the storage area of the timer counter in RAM. It is a flowchart which shows the control content of the time counter update process which a main control part performs. It is a flowchart which shows the modification of the flow of the process at the time of calling a non-game program from the process based on a game program during execution of a timer interruption process.

  A mode for carrying out a slot machine according to the present invention will be described below based on examples.

  An embodiment of a slot machine to which the present invention is applied will be described with reference to the drawings. As shown in FIG. 1, a slot machine 1 according to the present embodiment includes a housing 1a having an open front surface and a side of the housing 1a. And a front door 1b pivotally supported at the end.

  Inside the casing 1a of the slot machine 1 of the present embodiment, as shown in FIG. 2, reels 2L, 2C and 2R (hereinafter referred to as a left reel, a middle reel and a right reel) in which a plurality of types of symbols are arranged on the outer periphery. ) Are juxtaposed in the horizontal direction, and as shown in FIG. 1, three consecutive symbols out of the symbols arranged on the reels 2L, 2C, 2R can be seen from the see-through window 3 provided on the front door 1b. Are arranged as follows.

  As shown in FIG. 3, “red 7”, “blue 7”, “white 7”, “BAR”, “watermelon”, “cherry a”, “cherry” are respectively provided on the outer peripheral portions of the reels 2L, 2C, 2R. A plurality of identifiable symbols such as “b”, “bell”, “replay a”, “replay b”, and “plum” are drawn in a predetermined order. The symbols drawn on the outer peripheries of the reels 2L, 2C, and 2R are displayed in upper, middle, and lower three stages in the see-through window 3 provided at the approximate center of the front door 1b. In the following, “red 7”, “blue 7” and “white 7” may be collectively referred to as “7”, and “cherry a” and “cherry b” may be simply referred to as “cherry”. In some cases, “replay a” and “replay b” are collectively referred to as “replay”.

  The reels 2L, 2C, and 2R are rotated by reel motors 32L, 32C, and 32R (see FIG. 4) provided in correspondence with each other, so that the symbols of the reels 2L, 2C, and 2R are continuous with the see-through window 3. On the other hand, when the reels 2L, 2C, and 2R are stopped from rotating, three consecutive symbols are derived and displayed on the fluoroscopic window 3 as display results.

  Inside the reels 2L, 2C, and 2R are reel sensors 33L, 33C, and 33R that detect a reference position for each of the reels 2L, 2C, and 2R, and a reel LED 55 that irradiates the reels 2L, 2C, and 2R from the back side. , Is provided. The reel LED 55 includes 12 LEDs corresponding to three consecutive symbols on the reels 2L, 2C, and 2R, and each symbol can be irradiated independently.

  A display area 51a of a liquid crystal display 51 (see FIG. 1) is disposed at a position on the front side (player side) of each reel 2L, 2C, 2R of the front door 1b. The liquid crystal display 51 has a transmissive liquid crystal panel in a state where no voltage is applied to the liquid crystal element, and the transmissive area 51b corresponding to the transmissive window 3 of the display area 51a and the transmissive window 3 are interposed. Thus, the reels 2L, 2C, and 2R can be visually recognized from the player side.

  As shown in FIG. 1, on the front door 1b, there are a medal insertion portion 4 into which medals can be inserted, a medal payout exit 9 from which medals are paid out, and credits (the number of medals stored as a player's own game value). In the range, the maximum bet number among the specified number of bets determined according to the gaming state (in this embodiment, 3 is set as the specified number of RT0 to RT4 described later, and 2 is set as the specified number of RBs). The MAXBET switch 6 that is operated when setting the medals, and the medals stored as credits and the medals used for setting the bet amount are settled (the medals used for setting the credit and bet number are returned) Adjusting switch 10 that is operated when the game is started, start switch 7 that is operated when the game is started, and stop switches that are operated when the rotation of each of the reels 2L, 2C, and 2R is stopped. Pitch 8L, 8C, 8R, effect switch 56 to be used in effect are respectively provided so as to be operated by the player.

  In this embodiment, among the three reels 2L, 2C, and 2R that have started to rotate, the reel that stops first is referred to as a first stop reel, and the stop is referred to as a first stop. Similarly, the reel that stops second is called the second stop reel, the stop is called second stop, the reel that stops third is called the third stop reel, and the stop is the third stop. Alternatively, it is called final stop.

  Further, as shown in FIG. 1, the front door 1b shows a credit indicator 11 for displaying the number of medals stored as credits, the number of medals paid out due to the occurrence of a winning, and the contents when an error occurs. A game auxiliary display 12 for displaying an error code, information for identifying the stop order of reels by navigation notification described later, a 1BETLED 14 for informing that the betting number is set to 1, and 2 betting numbers are set. 2BETLED 15 to notify that the bet is set, 3BETLED 16 to notify that the bet number is set to 3, the insertion request LED 17 to notify that the medal can be inserted is lit, and the game by operating the start switch 7 A start valid LED 18 for notifying that the start operation is valid by lighting, wait (the previous game (Waiting for starting reel rotation since a certain period of time has not elapsed since the beginning) A waiting LED 19 that lights up to indicate that it is in progress, and a replaying LED 20 that lights up to indicate that a replay game is in progress The game display section 13 is provided.

  Inside the MAXBET switch 6, there is provided a BET switch valid LED 21 (see FIG. 4) for notifying that the setting operation of the bet amount by the operation of the MAXBET switch 6 is valid, and stop switches 8L, 8C, The left, middle, and right stop valid LEDs 22L, 22C, and 22R (see FIG. 4) are provided inside the 8R to notify that the reel stop operation by the corresponding stop switches 8L, 8C, and 8R is valid by lighting. An effect LED 56a (see FIG. 4) for notifying that the operation of the effect switch 56 is effective is provided inside the effect switch 56.

  Inside the front door 1b, as shown in FIG. 2, a reset switch 23 for detecting a reset operation for releasing an error state to be described later and a stop state to be described later by a predetermined key operation, and changing a set value to be described later A set value display 24 that displays the set value at that time during confirmation of the set value or during the confirmation of the set value, the game progresses until a reset operation is performed at a predetermined trigger (for example, at the end of BB described later) A stop switch 36a for selecting the validity / invalidity of the stop function controlled to a controlled state), automatic settlement processing (for example, at the end of the BB), a medal stored as a credit as a player Automatic settlement switch 36b for selecting whether the automatic settlement function is controlled to be settled (returned regardless of the operation) or the flow path of medals inserted from the medal insertion section 4 a flow path switching solenoid 30 for selectively switching to either a hopper tank 34a (see FIG. 2), which will be described later, or the medal payout exit 9 side, which is provided inside a, and is inserted from the medal insertion unit 4 and An insertion medal sensor 31 for detecting a medal flowing down to the tank 34a side, a medal selector 29 having an insertion port sensor 26 for detecting the insertion of a foreign object on the upstream side of the insertion medal sensor 31, and a door opening for detecting the open state of the front door 1b. A detection switch 25 (see FIG. 4) is provided.

  In the housing 1a, as shown in FIG. 2, the reel reference positions of the reels 2L, 2C, and 2R, the reel motors 32L, 32C, and 32R (see FIG. 4), and the reels 2L, 2C, and 2R are respectively shown. A reel unit 2 comprising detectable reel sensors 33L, 33C, 33R (see FIG. 4), an external output board 1000 (see FIG. 4) for outputting an external output signal, and a medal inserted from the medal insertion unit 4 are stored. Hopper tank 34a, a hopper motor 34b for paying out medals stored in the hopper tank 34a from the medal payout opening 9 (see FIG. 4), and a payout sensor 34c for detecting the medals paid out by driving the hopper motor 34b ( A hopper unit 34 and a power supply box 100 are provided.

  On the side of the hopper unit 34, an overflow tank 35 is provided for storing medals overflowing from the hopper tank 34a. Inside the overflow tank 35, a full tank sensor 35a (see FIG. 4) is provided for detecting that the stored medal has become full.

  As shown in FIG. 2, a function key switch 37 for switching to a setting change state or a setting confirmation state is provided on the front surface of the power supply box 100, and functions as a reset switch for canceling an error state or a stop state in normal times. In the setting change state, a reset / setting switch 38 that functions as a setting switch for changing a setting value of a winning probability (outtake rate) of internal lottery described later, and a power source that is operated when turning on / off the power source A switch 39 is provided.

  The power supply box 100 is provided inside the housing 1a, and the front door 1b can be opened by a predetermined key operation held by a store clerk or the like. The set key switch 37, the reset / setting switch 38, and the power switch 39 are operated only by a person such as a store clerk who has the key, and cannot be operated by the player. The same applies to the reset switch 23 detected by a predetermined key operation. In particular, since the setting key switch 37 requires further key operation after the front door 1b is opened by key operation, only the store clerk possessing the key for operating the setting key switch 37 among the game store clerk. Operation is possible.

  When a game is played in the slot machine 1 of the present embodiment, first, medals are inserted from the medal insertion unit 4 or a bet number is set using credits. To use the credit, the MAXBET switch 6 may be operated. When a predetermined number of bets determined according to the gaming state are set, the winning line LN (see FIG. 1) becomes valid, and the operation of the start switch 7 is valid, that is, the state where the game can be started. Become. In this embodiment, three bets are defined as a specified number of bets in RT0 to 4 described later, and two bets are determined as a specified number of bets in RB described later. When the bet number is set, the winning line LN becomes valid. In addition, when a medal is inserted exceeding the maximum number out of the prescribed number corresponding to the gaming state, the amount is added to the credit.

  The winning line is a line that is set to determine whether a combination of symbols displayed on the perspective windows 3 of the reels 2L, 2C, and 2R is a winning symbol combination. In this embodiment, as shown in FIG. 1, only the winning line LN set across the symbols arranged in the horizontal direction in the middle stage of the reel 2L, the middle stage of the reel 2C, the middle stage of the reel 2R, that is, the middle stage, is used as the winning line. It has been established. In this embodiment, only one winning line is applied, but a plurality of winning lines may be applied.

  Further, in the present embodiment, invalid lines LM1 to LM1 are set apart from the winning line LN in order to make it easy to recognize that the winning line LN has a combination of symbols constituting the winning line. The invalid lines LM1 to LM4 are not determined based on the combination of symbols arranged in the invalid lines LM1 to LM4. When the combination of symbols constituting a specific prize is arranged on the winning line LN, the invalid line is displayed. When a combination of symbols (for example, bell-bell-bell) that is awarded when the winning line LN is aligned with any of the LM1 to LM4 is arranged, the symbols constituting a specific winning in the winning line LN It is easy to recognize that the combination is complete.

  In this embodiment, as shown in FIG. 1, an invalid line LM1 and a lower stage of the reel 2L, which are set across the symbols arranged horizontally in the upper stage of the reel 2L, the upper stage of the reel 2C, the upper stage of the reel 2R, that is, the upper stage. , The lower stage of the reel 2C, the lower stage of the reel 2R, that is, the invalid line LM2 set across the symbols arranged horizontally in the lower stage, the upper stage of the reel 2L, the middle stage of the reel 2C, the lower stage of the reel 2R, that is, the lower side There are four types of invalid lines LM3 set across straddling symbols LM3, lower stage of reel 2L, middle stage of reel 2C, upper stage of reel 2R, that is, invalid line LM4 set straddling to the right. It is defined as.

  Further, in this embodiment, as a winning combination, a winning combination is obtained when a predetermined symbol combination (for example, “Bell-Watermelon-Cherry b”) determined as a winning combination in the winning line LN is prepared, and the predetermined symbol is also obtained. When the combinations are aligned, any of the invalid lines LM1 to LM4 has a combination of symbols (for example, “watermelon-watermelon-watermelon”) that serves as an index that is easier to recognize than the predetermined symbol combination. The combination which can be shown as having won a prize by the combination of the symbols arranged in any of the above is included. Hereinafter, a combination of symbols that is aligned with any of the invalid lines LM1 to LM4 when a predetermined symbol combination is aligned with the winning line LN is referred to as a symbol combination serving as an index, and constitutes a symbol combination serving as an index. The symbol is called an index symbol.

  When the start switch 7 is operated in a state where the game can be started, the reels 2L, 2C, and 2R rotate, and the symbols of the reels 2L, 2C, and 2R continuously vary. When any one of the stop switches 8L, 8C, 8R is operated in this state, the rotation of the corresponding reels 2L, 2C, 2R is stopped, and the display result is derived and displayed on the fluoroscopic window 3.

  Then, when all the reels 2L, 2C, 2R are stopped, one game is completed, and a predetermined symbol combination (hereinafter also referred to as a winning combination) is displayed on the reels 2L, 2C, 2R on the winning line LN. If the game stops as a result, a winning occurs, and a predetermined number of medals are given to the player and added to the credit. Further, when the credit reaches the upper limit number (50 in this embodiment), medals are paid out directly from the medal payout opening 9 (see FIG. 1). In addition, when the combination of symbols accompanying the transition of the gaming state on the winning line LN is stopped as a display result of each reel 2L, 2C, 2R, the gaming state according to the combination of symbols is shifted. .

  In this embodiment, the game starts when the operation of the start switch 7 is detected in a state where the operation of the start switch 7 is valid, and the game ends when all the reels are stopped. Further, one unit of control (game control) for executing a game starts when all the controls associated with the end of the previous game are completed, and when all the controls associated with the end of the game are completed. finish.

  In this embodiment, a configuration using three reels is illustrated, but a configuration using only one reel, a configuration using two reels, a configuration using four or more reels may be used. In the configuration using two or more reels, a winning determination may be made based on a combination of display results derived for all two or more reels. In this embodiment, the variable display device is configured by physical reels. However, the variable display device may be configured by an image display device such as a liquid crystal display.

  In the slot machine 1 according to the present embodiment, after the game is started and the reels 2L, 2C, and 2R are rotated and the symbols start to change, any one of the stop switches 8L, 8C, and 8R is operated. When this is done, the rotation of the reels corresponding to the stop switches 8L, 8C, 8R is stopped, and the symbols are stopped and displayed. The maximum stop delay time from the operation of the stop switches 8L, 8C, 8R to the stop of the rotation of the corresponding reels 2L, 2C, 2R is 190 ms (milliseconds).

  The reels 2L, 2C and 2R rotate 80 times per minute, and 80 × 21 (the number of symbols per reel) = 1680 frames, so the maximum of 4 symbols is drawn in 190 ms. Will be able to. In other words, the symbols that can be selected as the stop symbols are the symbols that are displayed when the stop switches 8L, 8C, and 8R are operated, and the symbols that are four frames ahead of them, for a total of five symbols.

  For this reason, for example, when any one of the stop switches 8L, 8C, 8R is operated and the symbol displayed on the lower stage of the reel corresponding to the stop switch is used as a reference, the symbol from the symbol to four frames ahead is used. Since the symbols can be displayed in the lower row, in each of the reels 2L, 2C, 2R, when any one of the stop switches 8L, 8R is operated, the symbol displayed in the middle row of the reel corresponding to the stop switch. The symbols arranged within 5 frames including can be displayed on the winning line.

  Hereinafter, the reels 2L, 2C, and 2R may be simply referred to as reels unless it is necessary to distinguish between them. Further, the reel 2L may be referred to as a left reel, the reel 2C as a middle reel, and the reel 2R as a right reel. Further, an operation for stopping the reels 2L, 2C, 2R by operating the stop switches 8L, 8C, 8R may be referred to as a stop operation.

  FIG. 4 is a block diagram showing a configuration of the slot machine 1. As shown in FIG. 4, the slot machine 1 is provided with a game control board 40, an effect control board 90, and a power supply board 101. The game state is controlled by the game control board 40, and the game state is controlled by the effect control board 90. The production according to the control is controlled, and the power supply board 101 generates the drive power for the electrical components constituting the slot machine 1 and supplies them to each part.

  The power supply board 101 is supplied with AC100V power from the outside, and from this AC100V power supply, a DC voltage necessary for driving electrical components constituting the slot machine 1 is generated, and the game control board 40 and the effect control board 90 are generated. To be supplied. Further, the above-described hopper motor 34b, payout sensor 34c, full sensor 35a, setting key switch 37, reset / setting switch 38, and power switch 39 are connected to the power supply board 101.

  On the game control board 40, the above-described MAXBET switch 6, start switch 7, stop switches 8L, 8C, 8R, settlement switch 10, reset switch 23, stop switch 36a, automatic settlement switch 36b, insertion medal sensor 31, door open The detection switch 25 and reel sensors 33L, 33C, and 33R are connected, and the above-described payout sensor 34c, full sensor 35a, setting key switch 37, and reset / setting switch 38 are connected via the power supply board 101. Detection signals from these connected switches are input. Further, the game control board 40 includes the credit indicator 11, the game auxiliary indicator 12, 1-3 BET LEDs 14-16, the insertion request LED 17, the start valid LED 18, the waiting LED 19, the replaying LED 20, the BET switch valid LED 21, the left The middle and right stop valid LEDs 22L, 22C and 22R, the set value display 24, the flow path switching solenoid 30, the reel motors 32L, 32C and 32R are connected, and the hopper motor 34b described above is connected via the power supply board 101. These electrical components are connected, and are driven based on control of a main control unit 41 (described later) mounted on the game control board 40.

  The game control board 40 performs processing related to the progress of the game, and at the same time, controls the respective parts of the control circuit mounted on the game control board 40 directly or indirectly, and becomes an oscillation signal of a predetermined frequency. A control clock generation circuit 42 for generating a control clock CCLK, a random number clock generation circuit 43 for generating a random number clock RCLK that is an oscillation signal having a predetermined frequency different from the oscillation frequency of the control clock CCLK, and a game control board 40, a switch detection circuit 44 that takes in detection signals input from switches connected directly or via the power supply board 101 and transmits them to the main control unit 41, and a motor drive signal (stepping) output from the main control unit 41. Motor drive circuit 45 for transmitting the motor phase signal) to the reel motors 32L, 32C, 32R. The solenoid drive circuit 46 that transmits the solenoid drive signal output from the main control unit 41 to the flow path switching solenoid 30; and the various displays connected to the game control board 40 with the LED drive signal output from the main control unit 41 When a voltage drop is detected by monitoring the voltage of the LED drive circuit 47 that transmits to the LED and the power supply supplied to the slot machine 1, a voltage drop signal indicating that is output to the main control unit 41 And a reset circuit 49 that provides a system reset signal to the main control unit 41 when the power supply is unstable such as when the power is turned on or when the power is turned off.

  FIG. 5 shows a configuration example of the main control unit 41 mounted on the game control board 40. The main control unit 41 is a one-chip microcomputer, and includes an external bus interface 501, a clock circuit 502, a verification block 503, a specific information storage circuit 504, an arithmetic circuit 505, a reset / interrupt controller 506, CPU (Central Processing Unit) 41a, ROM (Read Only Memory) 41b, RAM (Random Access Memory) 41c, free-run counter circuit 507, random number circuits 508a and 508b, timer circuit 509, and interrupt controller 510 A parallel input port 511, a serial communication circuit 512, a parallel output port 513, and an address decoding circuit 514.

  The reset / interrupt controller 506 is for controlling various resets and interrupt requests generated inside or outside the main control unit 41. The reset / interrupt controller 506 includes an out-of-designated area prohibition (IAT) circuit 506a and a watchdog timer (WDT) 506b. The IAT circuit 506a is a circuit that monitors whether the user program is correctly executed in the designated area, and has a function of outputting an IAT generation signal when it is detected that the user program is executed outside the designated area. The watchdog timer 506b has a function of generating a timeout signal for each set period.

  The external bus interface 501 is a bus interface having an interface function between an external bus and an internal bus of a chip constituting the main control unit 41, an address bus, a data bus, and a direction control function of each control signal. The clock circuit 502 is a circuit that generates the internal system clock SCLK by, for example, dividing the control clock CCLK by two. The verification block 503 is connected to an external verification machine and has a function of performing chip verification. The unique information storage circuit 504 is a circuit that stores a plurality of types of unique information that is internal information of the main control unit 41. The arithmetic circuit 505 is a circuit that performs multiplication and division.

  The CPU 41a is a control CPU that executes game control in the slot machine 1 by executing a user program (game control processing program for game control) based on the control code read from the ROM 41b. When such game control is executed, the CPU 41a reads fixed data from the ROM 41b, the variable data writing operation in which the CPU 41a writes various fluctuation data to the RAM 41c and temporarily stores them, and the CPU 41a is temporarily stored in the RAM 41c. A variable data reading operation for reading out various variable data being received, a receiving operation in which the CPU 41a receives input of various signals from the outside of the main control unit 41 via the external bus interface 501, the parallel input port 511, the serial communication circuit 512, etc. However, a transmission operation for outputting various signals to the outside of the main control unit 41 via the external bus interface 501, the serial communication circuit 512, the parallel output port 513, and the like is also performed.

  The ROM 41b stores a control code indicating a user program (game control processing program for game control), fixed data, and the like. The RAM 41c provides a work area for game control. Here, at least a part of the RAM 41c may be a backup RAM backed up by a backup power source. That is, even if the power supply to the slot machine 1 is stopped, at least a part of the contents of the RAM 41c is stored for a predetermined period.

  As the free-run counter circuit 507, an 8-bit free-run counter is mounted. The random number circuits 508a and 508b are circuits that generate numerical data that is a random value having a predetermined update range, such as an 8-bit random number or a 16-bit random number. In this embodiment, the hardware random number generated by the 16-bit random number circuit 508b among the random number circuits 508a and 508b is used as a random number for internal lottery described later. The timer circuit 509 is a 16-bit programmable timer, counts down the set timer value based on the input of the control clock CCLK, and outputs an interrupt request signal to the interrupt controller when reaching 0000H. In this embodiment, the timer circuit 509 can be used to perform periodic interrupt requests and time measurement.

  The interrupt controller 510 is a circuit that controls external interrupt requests from interrupt terminals and interrupt requests from built-in peripheral circuits (for example, serial communication circuit 512, random number circuits 508a and 508b, timer circuit 509). . The parallel input port 511 incorporates an 8-bit wide input-only port. Also, the parallel output port 513 provided in the main control unit 41 shown in FIG. 4 incorporates an output-only port having an 11-bit width. The serial communication circuit 512 is a circuit that performs asynchronous serial communication in input / output with respect to the outside.

  The address decoding circuit 514 is a circuit for decoding each functional block in the main control unit 41 and a chip select signal that is a decoding signal for an external device. In response to the chip select signal, the internal circuit of the main control unit 41 or the external device serving as a peripheral device is selectively operated effectively and can be accessed from the CPU 41a.

  For example, when the main control unit 41 accesses an area of the storage area of the ROM 41b where no program or the like is stored, the main control section 41 accesses an area of the storage area of the RAM 41c where access is prohibited. In other words, when an access to a memory area that is not accessed in normal operation is made, an illegal access reset is generated to disable the progress of the game. Even if an unauthorized program is stored in an area unrelated to the above, an unused area of the RAM 41c, etc., it is possible to prevent the unauthorized program from being executed.

  The main control unit 41 is activated when an internal or external reset occurs. At this time, the value assigned to the ROM 41b and set in the vector table in which the start address of the interrupt process is set. Is a value indicating unused or a value indicating the area where the program etc. is actually stored, and if it is not any value, it will not start, It is possible to prevent in advance the processing that was not originally intended due to the occurrence or the like.

  The main control unit 41 transmits various commands to the sub control unit 91 via the parallel output port 513. A command transmitted from the main control unit 41 to the sub control unit 91 is sent in only one direction, and no command is sent from the sub control unit 91 toward the main control unit 41. In this embodiment, the command is transmitted to the sub-control unit 91 via the parallel output port 513, that is, the command is transmitted as a parallel signal, but via the serial communication circuit 512. A configuration in which a command is transmitted to the sub-control unit 91, that is, a configuration in which the command is transmitted as a serial signal may be employed.

  The main control unit 41 also receives detection states of various switches connected to the game control board 40 from the parallel input port 511. The main control unit 41 executes main processing that shifts in stages according to the detection states of various switches input from the parallel input port 511. Also, the main control unit 41 can execute the interrupt process by interrupting the main process when an interrupt occurs. In the present embodiment, a timer interrupt process (main) is executed every time a time-out occurs in the timer circuit 509, that is, every fixed time interval (about 0.56 ms in the present embodiment). In addition, the main control unit 41 is set to automatically prohibit other interrupts during execution of the interrupt process, and when a plurality of interrupts occur at the same time, a predetermined order is set. The interrupt to be executed with priority is set by. If another interrupt factor occurs during the execution of the interrupt process and the interrupt factor continues even after the interrupt process ends, the interrupt will occur when the interrupt process ends. The prohibition is automatically released and a new interrupt is generated at that time. Note that other interrupts are set to be automatically disabled during the execution of interrupt processing, and interrupt processing is not automatically canceled when interrupt processing is completed. Other interrupts may be prohibited by the program at the start, and the interrupt prohibition may be canceled by the program at the end of the interrupt process.

  The main control unit 41 repeatedly loops the process according to the control state until the detection state of the various switches connected to the game control board 40 changes as the main process, and changes the detection state of the various switches. Execute a process that moves in stages. Further, the main control unit 41 executes a timer interrupt process (main) at regular time intervals (about 0.56 ms in this embodiment). Note that the execution interval of the timer interrupt process (main) is set to a time longer than the sum of the time taken to repeat the process repeated in accordance with the control state in the main process and the execution time of the timer interrupt process (main) Therefore, the process that is repeated according to the control state between the current and next timer interrupt processes (main) is completed at least once.

  An effect switch 56 is connected to the effect control board 90, and a detection signal of the effect switch 56 is input. In addition, presentation devices such as a liquid crystal display 51, presentation effect LEDs 52, speakers 53 and 54, and reel LEDs 55 are connected, and these presentation devices are controlled by a later-described sub-control unit 91 mounted on the presentation control board 90. It is driven based on this. In this embodiment, the sub-control unit 91 mounted on the effect control board 90 controls the output of the effect devices such as the liquid crystal display 51, effect effect LED 52, speakers 53 and 54, and reel LED 55. However, in addition to the sub-control unit 91, an output control unit that directly controls the output of the effect device is mounted on the effect control board 90 or another board, and the sub-control unit 91 is based on a command from the main control unit 41. The output control unit may determine the output pattern of the effect device, and the output control unit may control the output of the effect device based on the output pattern determined by the sub control unit 91. In such a configuration, the sub control unit 91 and the output control may be performed. The output control of the rendering device is performed by both of the units. Further, in the present embodiment, the liquid crystal display 51, the effect effect LED 52, the speakers 53 and 54, and the reel LED 55 are exemplified as the effect device, but the effect device is not limited to these, for example, a mechanically driven display. A device or a mechanically driven item may be applied as the effect device.

  The effect control board 90 is composed of a microcomputer having a sub CPU 91a, ROM 91b, RAM 91c, and I / O port 91d, and a sub control unit 91 for controlling the effect, and a liquid crystal display 51 connected to the effect control board 90. A display control circuit 92 for performing display control, an effect effect LED 52, an LED drive circuit 93 for controlling drive of the reel LED 55, a sound output circuit 94 for controlling sound output from the speakers 53, 54, A reset circuit 95 for providing a reset signal to the sub CPU 91a when an initialization command from the sub CPU 91a is not input for a certain period of time; a switch detection circuit 96 for detecting a detection signal input from switches connected to the effect control board 90; A clock device 97 for outputting time information including date information and time information; A power interruption detection circuit 98 that monitors the power supply voltage supplied to the lot machine 1 and outputs a voltage drop signal indicating that to the sub CPU 91a when a voltage drop is detected, and other circuits are mounted. Has been.

  Sub CPU91a receives the command transmitted from game control board 40, performs various control for performing an effect, and controls each part of the control circuit mounted in effect control board 90 directly or indirectly. .

  The reset circuit 95 has a lower voltage for releasing the reset signal than the reset circuit 49 that gives the system reset signal to the main control unit 41 in the game control board 40. When the power is turned on, the sub control unit 91 It starts at an earlier stage than the unit 41. On the other hand, the power interruption detection circuit 98 has a voltage that outputs a voltage drop signal lower than the power interruption detection circuit 48 that outputs a voltage drop signal to the main control unit 41 in the game control board 40. The sub control unit 91 detects a power failure at a later stage than the main control unit 41, and performs a power interruption process (sub) described later.

  Similar to the main control unit 41, the sub control unit 91 has an interrupt function, generates an interrupt when receiving a command from the main control unit 41, and acquires a command transmitted from the main control unit 41. Execute command reception interrupt processing to be stored in the buffer. Further, the sub control unit 91 executes an interrupt process (sub), which will be described later, by generating an interrupt every time the input number of system clocks reaches a certain number, that is, every certain time interval (about 2 ms). Also, unlike the main control unit 41, the sub control unit 91 interrupts the process even when the timer interrupt process (sub) is being executed when an interrupt is generated based on the reception of the command. The command reception interrupt process is executed at the same time, and the command reception interrupt process is executed with the highest priority even if interrupts that trigger the timer interrupt process (sub) occur at the same time. The sub-control unit 91 is also supplied with backup power at the time of a power failure, and the data stored in the RAM 91c is held while the backup power is supplied.

  In the slot machine 1 of the present embodiment, the medal payout rate changes according to the set value. Specifically, the medal payout rate is changed by using a winning probability corresponding to the set value in a lottery that affects the advantage to the player, such as an internal lottery, a navigation stock lottery, and an extra lottery to be described later. The set value is composed of 6 levels of 1 to 6, with 6 being the highest payout rate and the payout rate being lower as the value is decreased in the order of 5, 4, 3, 2, 1. That is, when 6 is set as the set value, the advantage is highest for the player, and as the value decreases in order of 5, 4, 3, 2, 1, the advantage decreases stepwise.

  In order to change the setting value, it is necessary to turn on the power of the slot machine 1 after the setting key switch 37 is turned on. When the setting key switch 37 is turned on and the power is turned on, the setting value read from the RAM 41c is displayed on the setting value display 24 as a display value, and the setting value can be changed by operating the reset / setting switch 38. Transition to the changed state. When the reset / setting switch 38 is operated in the setting change state, the display value displayed on the set value display 24 is updated one by one (when the set value 6 is further operated, the set value 1 is set. Return). When the start switch 7 is operated, the display value is determined as the set value. When the setting key switch 37 is turned off, the determined display value (setting value) is stored in the RAM 41c of the main control unit 41, and the state shifts to a state in which the game can proceed.

  Note that when the setting key switch 37 is turned on and the power is turned on, the door opening detection switch 25 detects that the front door 1b is opened, and the configuration shifts to the setting change state. Well, by adopting such a configuration, it is possible to prevent unauthorized setting changes in a state where the front door 1b is not opened. Further, in the configuration that shifts to the setting change state on the condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 supports the opening of the front door 1b after shifting to the setting change state. Even if the detection is not detected, it is preferable to maintain the setting change state. Thus, even if the front door 1b is temporarily closed during the setting change, an operation for shifting to the setting change state is performed again. This is not necessary, and the setting change operation is not complicated. Further, after the transition to the setting change state, when the setting value is determined by operating the start switch 7 and then the setting key switch 37 is turned off, the door opening detection switch 25 detects that the front door 1b is opened. On the condition that the setting change state is terminated, it may be configured to shift to a state in which the game can proceed. Even in such a configuration, the front door 1b is not opened in an unauthorized manner. It is possible to prevent the setting from being changed.

  In order to check the set value, after the game is over, the setting key switch 37 may be turned on in a state where the bet amount is not set. When the setting key switch 37 is turned on in such a situation, the setting value read out from the RAM 41c is displayed on the setting value display 24, thereby shifting to a setting confirmation state in which the setting value can be confirmed. In the setting confirmation state, the game cannot be progressed, and by setting the setting key switch 37 to the off state, the setting confirmation state is ended and the state in which the game can proceed is returned.

  It should be noted that, after the game is over, when the setting key switch 37 is turned on with no bet number set, the door opening detection switch 25 detects that the front door 1b has been opened. In addition, a configuration for shifting to the setting confirmation state may be adopted. By adopting such a configuration, it is possible to prevent the setting value from being illegally confirmed without the front door 1b being opened. In addition, in the configuration that shifts to the setting confirmation state on the condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 supports the opening of the front door 1b after the transition to the setting confirmation state. It is preferable to maintain the setting confirmation state even if the detection to be performed is not performed. Thus, even if the front door 1b is temporarily closed during the setting confirmation, an operation for shifting to the setting confirmation state again is performed. This is not necessary and the setting confirmation operation is not complicated. In addition, after shifting to the setting confirmation state, when the set key switch 37 is turned off after the start switch 7 is operated and the set value is confirmed, the door opening detection switch 25 detects that the front door 1b is opened. On the condition that the setting confirmation state is terminated, it may be configured to return to a state in which the game can proceed, and even in such a configuration, the front door 1b is not opened in an unauthorized manner. It is possible to prevent the setting value from being confirmed.

  In the slot machine 1 of the present embodiment, the main control unit 41 determines whether or not the voltage drop signal from the power interruption detection circuit 48 is detected every time the timer interruption process (main) is executed. When the determination process is performed and it is determined that the voltage drop signal is detected in the power failure determination process, a power interruption process (main) for setting data for determining whether or not the data in the RAM 41c is normal at the next return is performed. Run.

  Then, the main control unit 41 returns the processing state of the main control unit 41 to the state before the power interruption based on the data stored in the RAM 41c on the condition that the data in the RAM 41c is normal at the time of activation. However, if the RAM 41c data is not normal, it is determined that the RAM is abnormal, and the RAM abnormal error code is set in the register to control the RAM abnormal error state, thereby disabling the progress of the game.

  The error state shifts to a normal error state that is canceled by a reset operation (operation of the reset / setting switch 38 or the reset switch 23) and the setting change state described above, and is canceled until a new setting value is set. Special error status with no error, the RAM abnormal error status is a special error status, and once it is controlled to the RAM abnormal error status, it shifts to the setting change status and is released until a new set value is set. It will not be done.

  Further, the sub control unit 91 also determines whether or not the voltage drop signal from the power interruption detection circuit 98 is detected in the timer interruption process (sub), and when it is determined that the voltage drop signal is detected, A power interruption process (sub) for setting data for determining whether or not the data in the RAM 91c is normal at the next return is executed.

  Then, the sub-control unit 91 returns the processing state of the sub-control unit 91 to the state before the power interruption based on the data stored in the RAM 91c on the condition that the data of the RAM 91c is normal at the time of activation. However, if the data in the RAM 91c is not normal, it is determined that the RAM is abnormal, and the RAM 91c is initialized. In this case, unlike the main control unit 41, only the RAM 91c is initialized, and the performance is not disabled.

  In addition, even when it is determined that the data in the RAM 91c is normal at the time of activation, the sub control unit 91 activates when receiving a setting command (described later) indicating that the setting change state has been entered from the main control unit 41. Even when a later-described return command or setting command indicating that the control state of the main control unit 41 has returned is not received even after a certain period of time has elapsed, the RAM 91c is initialized. In this case, the execution of the performance is not disabled only by initializing the RAM 91c.

  Next, initialization of the RAM 41c of the main control unit 41 will be described. The usable area in the storage area of the RAM 41c of the main control unit 41 is divided into a game RAM area, an unused area 4, and a non-game RAM area. Further, the game RAM area is divided into a special work, an important work, a general work, an unused area 3 and a game stack area. The special work is a work that stores data that is not initialized even if the setting value is changed, and stores software random numbers, setting values, data indicating a gaming state, and the like. The important work is a work in which data which is inconvenient if it is initialized at the end of a specific gaming state (RB, BB) is stored. The display data of the LED, the input / output data of the input port, the output port, the game time A time counter and the like are stored. The general work is a work that stores data that can be initialized at the end of a specific gaming state, and stores stop symbols, the number of medals to be paid out, and the like. The unused area 3 is a work that is not used by any program. The game stack area is an area in which data saved from a register of the main control unit 41 during execution of a game program to be described later is stored.

  In this embodiment, the main control unit 41 has the data in the RAM 41c when the setting key switch 37 is ON and the data in the RAM 41c is destroyed when the setting key switch 37 is ON. Each of the initial conditions is established when the five initialization conditions are satisfied, that is, when the setting change state is terminated, when a specific game state (RB, BB) is terminated, or when one game is terminated. Five types of initialization are performed in different areas to be initialized according to the initialization conditions.

  Initialization 0 is initialization that is performed when data in the RAM 41c is destroyed when the setting key switch 37 is turned on. In initialization 0, all the usable areas are initialized. . Initialization 1 is initialization that is performed when data in the RAM 41c is not destroyed at the time of startup with the setting key switch 37 being ON. In the initialization 1, an area other than the special work in the game RAM area is not All areas of the game RAM area are initialized. Initialization 2 is initialization that is performed after the setting change state is completed by starting with the setting key switch 37 being ON. In initialization 2, special work and game stack areas (in use) in the game RAM area are used. Areas other than) are initialized. Initialization 3 is initialization performed at the end of a specific gaming state. In initialization 3, the general work, the unused area 3 and the game stack area (unused) in the game RAM area are initialized. Initialization 4 is initialization performed at the end of one game. In initialization 4, the unused area 3 and the game stack area (unused) of the game RAM area are initialized. The storage area for the data indicating the set value and the game state is allocated to the special work, and when the data in the RAM 41c is not destroyed at the time of startup with the setting key switch 37 being ON, that is, the data in the RAM 41c. When the game is normal and the setting is changed, data indicating the setting value and the gaming state is held. In addition, a storage area for a timer counter, which will be described later, is allocated to an important work and is retained without being initialized at the end of the game or at the end of a specific gaming state.

  Further, the main control unit 41 of the present embodiment, when performing the above-described initialization, designates a start address and an end address as the initialization target RAM address, so that one byte from the designated start address. After overwriting the data with 0, calculate the logical sum of the 1-byte data, and if the calculation result is 0, repeat the process of moving to the next address until the specified end address is reached. Initialize the RAM area in the specified address range.

  When the main control unit 41 in the present embodiment is activated due to the occurrence of a reset, the main control unit 41 performs setting at the time of activation. In the startup setting, a status flag included in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result and execution result of the instruction, and particularly includes an interrupt master permission flag for setting interrupt prohibition / permission. Since the initial value of the interrupt master permission flag is a value indicating prohibition of interrupt, the main control unit 41 is started in a state where interrupt is prohibited. Then, after setting various functions with reference to the HW parameters described later, when a reset occurs according to the program stored in the program / data area, it starts in an interrupt-disabled state and then executes first Start the initial setting process.

  In the initial setting process, the main control unit 41 first sets interrupts to be prohibited, and then determines whether or not the setting key switch 37 is in an ON state at startup, and the setting key switch 37 is ON in startup. When it is determined that the state is in the state, the process proceeds to the setting change process, and the RAM 41c is initialized at the start of the setting change process. At this time, if the data in the RAM 41c is normal, a part of the control state (setting value, gaming state, etc.) before the change is changed after the setting change by holding the special work and initializing other areas. On the other hand, if the data in the RAM 41c is not normal, the abnormality in the data in the RAM 41c can be surely solved by initializing all the usable areas including the special work. It has become.

  After initialization of the RAM 41c, the interrupt is set to be permitted, the set value is updated by 1 in the range of 1 to 6 every time the reset / setting switch 38 is operated, and after the start switch 7 is detected ON, The setting value when the setting key switch 37 is detected ON is stored in the RAM 41c, and the setting change process is terminated.

  As described above, the main control unit 41 starts with the interrupt master permission flag indicating that the interrupt is prohibited and is disabled, and in the initial setting process after the start, Since the initial setting process is executed after the interruption is set to be prohibited, it is possible to prevent an unintended interruption from occurring.

  Moreover, the main control part 41 performs the main process which processes in steps according to progress of a game for every game unit after completion | finish of a setting change process. In the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. After the setting change process, the main process starts from the stage before the process of initializing the RAM 41c in the main process. The initialization of the RAM 41c after the setting change process is completed and the game unit It is possible to perform initialization of the RAM 41c for each process by common processing.

  In the slot machine 1 of the present embodiment, a specified number of bets that can be set according to the gaming state (RT0 to RT4, RB) (in this embodiment, 3 for RT0-4 and 2 for RB) is determined. Thus, the game can be started on condition that a prescribed number of bets determined according to the gaming state are set. In the present embodiment, the winning line LN is activated when a specified number of bets according to the gaming state are set.

  In this embodiment, when all the reels 2L, 2C, 2R are stopped, the activated pay line is activated (in the present embodiment, all the pay lines are always activated. A winning combination is obtained when a combination of symbols called “combinations” is arranged on the winning line. The combination may be a combination of the same symbols or a combination including different symbols.

  The type of winning combination is determined according to the game state, but it can be roughly divided into a small role with payout of medals and a replay that can start the next game without the need to set the number of bets. There are a game combination and a special combination with a transition to a game state advantageous to the player. Below, a small role and a re-playing role are collectively called a general role. In order for winning of each combination determined according to the gaming state to occur, it is necessary to win an internal lottery to be described later and set a winning flag of the combination in the RAM 41c. Of these winning flags, the winning flags for the small role and the replaying role are valid only in the game in which the flag is set, and are invalid in the next game. It is valid until a combination of combinations permitted by the flag is completed, and is invalid in a game having a combination of combinations permitted. In other words, once the special combination winning flag is won, even if the combination of the combinations permitted by the flag cannot be made, the winning flag is not invalidated and is carried over to the next game. It becomes.

  Hereinafter, the internal lottery of the present embodiment will be described. In the internal lottery, whether or not the main control unit 41 allows the winning of each combination described above before the display results of all the reels 2L, 2C, and 2R are derived (specifically, the start switch 7 At the time of detection). In the internal lottery, first, a random value for internal lottery (an integer from 0 to 65535) is acquired when the start switch 7 is detected. Specifically, the value generated by the random number circuit 508b and stored in the random number value register of the random number circuit 508b is set as the lottery work assigned to the RAM 41c. And, for each combination determined according to the gaming state (RT0-4, RB), each combination determined according to the numerical data stored in the lottery work, the current gaming state, the number of bets and the set value Whether or not winning is permitted is determined according to the number of determination values.

  In the internal lottery, the number of judgment values determined in accordance with the internal lottery target, the current gaming state, and the set value are sequentially assigned to the random number for internal lottery (numerical data stored in the lottery work). When the result of addition overflows, it is determined that the winning combination is won. For this reason, a winning combination will be won with a probability (number of determination values / 65536) according to the number of determination values.

  If a winning combination of any combination is determined, a winning flag corresponding to the combination determined to be winning is set in the internal winning flag storing work assigned to the RAM 41c. The internal winning flag storage work consists of a 2-byte storage area, of which the upper byte is assigned as the special role storing work in which the winning flag for the special role is set, and the lower byte is the winning of the general role It is assigned as a general role storage work for which a flag is set. Specifically, when a special combination is won, a special combination winning flag indicating that the special combination is won is set in the special combination storing work, and the winning flag set in the general combination storing work is cleared. When a general combination is won, a winning flag for the general combination indicating that the general combination is won is set in the general combination storing work. If no winning combination is selected, only the general winning combination work is cleared.

  Next, stop control of the reels 2L, 2C, 2R will be described. The main control unit 41 refers to the table index and table creation data stored in the ROM 41b when the reel starts to rotate and when the reel stops and the reel that is still rotating still remains. A stop control table is created for each reel that is rotating. When any of the stop switches 8L, 8C, and 8R corresponding to the rotating reel is effectively detected, the stop control table of the corresponding reel is referred to and the slip of the referred stop control table is referred to. Based on the number of frames, control is performed to stop the rotation of the reels 2L, 2C, 2R corresponding to the operated stop switches 8L, 8C, 8R.

  In this embodiment, a value of 0 to 4 is determined as the number of sliding symbols, and it is possible to stop the reel by drawing in a maximum of 4 symbols after detecting a stop operation. In other words, the stop position of the symbol can be designated from a range of a maximum of 5 frames including the stop operation position where the stop operation is detected. In addition, since it is necessary to move one frame to move the reel for one symbol, it is possible to stop the reel by pulling in a maximum of four symbols after detecting the stop operation. The symbol stop position can be designated from a range of up to five symbols including the operation position.

  In this embodiment, if any of the winning combinations is won, when the stop operation is performed, the winning combination can be stopped on the winning line within a drawing range of up to four frames. If possible, control is performed to align and stop, and the winning combination that has not been won is controlled to be stopped without being aligned in the drawing range of a maximum of 4 frames. When a special role and a small role are elected at the same time, such as when a special role is elected while the special role has been carried over from before the previous game, the maximum on the winning line when the stop operation is performed If it is possible to align and stop the winning roles in the 4-frame pull-in range, control will be performed to align them and stop them, and the winning roles will be selected on the winning line within the maximum 4-frame pull-in range. If it is not possible to withdraw, if a special role that has been elected within the draw range of up to 4 frames can be aligned and stopped on the winning line, it will be controlled and stopped. Control to stop without aligning in the drawing range of 4 frames will be performed. That is, in such a case, priority is given to the control for aligning the small combination on the winning line over the special combination, and the special combination can be won only when the small combination cannot be drawn. In the case where a special combination and a small combination can be withdrawn at the same time, only the small combination is drawn, and the small combination is not aligned on the winning line at the same time as the special combination. Also, when a special role and a small role are elected at the same time, priority is given to the control of aligning the special role on the winning line over the small role, and only when the special role cannot be drawn, the small role is placed on the winning line. You may perform control to align.

  Also, in this embodiment, when the special role and the replaying role are won at the same time, such as when the replaying role is won while the special role has been carried over from before the previous game, the stop operation is performed. In this case, the control is performed so that the symbols of the re-gamer are aligned and stopped on the winning line within a drawing range of up to 4 frames. In this case, the symbols constituting the re-gamer or the symbols constituting the re-gamer to be simultaneously elected are arranged at intervals of 5 symbols or less, that is, within 4 frames, for any of the reels 2L, 2C, and 2R. Since it can always be stopped at any position within the 4-frame pull-in range, if the special combination and the re-playing combination are elected at the same time, the timing of the operation of the stop switches 8L, 8C, 8R by the player Without fail, the re-playing role will always be won. That is, in such a case, the control for aligning the re-games on the winning line has priority over the special game, and the re-games will always win. In the case where the special combination and the re-playing combination can be withdrawn at the same time, only the re-playing combination is drawn in and the special combination is not arranged on the winning line at the same time as the re-playing combination.

  In this embodiment, the reel stop control is performed by using a stop control table that can specify the number of sliding frames for each timing at which the stop operation is performed. A configuration that performs stop control by specifying the stop position from the table and stopping the reel at the specified stop position, and searching for a stop position that can be stopped when the stop operation is performed without using the stop control table or the stop position table. A configuration that performs stop control that identifies and stops the reel at the specified stop position, stop control using the stop control table, stop control using the stop position table, and can be stopped without using the stop control table or the stop position table A configuration that uses stop control by searching and specifying the stop position together, and a configuration that performs stop control by partially changing the stop control table and stop position table. It may be.

  In the present embodiment, the main control unit 41 measures the game time, which is the time elapsed from the start of the reel rotation every time the reel starts rotating after the game starts. After a game is over, when a specified number of bets are set by inserting medals, etc., and the game start operation is enabled, the reel start of the previous game is started. If the game time that has started counting from the time is more than the specified time (4.1 seconds in this embodiment), that is, if the specified time has elapsed since the reel rotation start time of the previous game, no wait is generated. At that time, the reel for the game in the game is started to rotate. On the other hand, after the end of one game, when a predetermined number of bets are set by inserting medals, etc., and when the game start operation is enabled, the reel rotation of the previous game is started. If the game time that started timing from the time is less than the specified time, that is, if the specified time has not elapsed since the start of reel rotation of the previous game, a wait is generated and the reel starts rotating at that time. First, it waits until the game time that has started timing from the reel rotation start time of the previous game reaches the specified time, and starts rotating the reel when it reaches the specified time.

  In the present embodiment, the main control unit 41 performs control to output an external output signal indicating a gaming state, an error occurrence state, and the like. These external output signals are output to a hall device such as a hall computer via the information output terminal board of the game shop (hall) where the external output board 1000 and the slot machine 1 are installed.

  The main control unit 41 has a medal IN signal indicating the number of medals used for setting the number of bets, a medal OUT signal indicating the number of medals awarded to the player due to the occurrence of winning, and the gaming state is RB (regular bonus). RB signal indicating the effect, BB signal indicating that the gaming state is BB (big bonus), an ART signal indicating the start of ART described later, a door opening signal indicating that the front door 1b is open, described later A setting change signal indicating the transition to the setting change mode, an insertion error signal indicating an abnormality of the medal selector, and a payout error signal indicating an abnormality of the hopper unit 34 are output.

  The external output board 1000 is provided with a relay circuit, a parallel / serial conversion circuit, a terminal for each output signal, and a connector to be electrically connected to the circuit of the information providing terminal board. Of the signals output from the game control board 40, the medal IN signal, the medal OUT signal, the RB signal, the BB signal, and the ART signal are directly output as pulse signals to the information providing terminal board via the relay circuit. . On the other hand, the door opening signal, setting change signal, input error signal, and payout error signal are converted into security signals, which are serial signals that can be individually identified by the parallel-serial conversion circuit, and information is provided. Output to the terminal board.

  Next, commands that the main control unit 41 transmits to the sub control unit 91 will be described.

  In the present embodiment, the main control unit 41 sends, to the sub-control unit 91, an inserted number command, a credit command, a gaming state command, an ART state command, an internal winning command, a freeze command, an ART lottery result command, and a reel acceleration information command. , Stop operation command, sliding frame command, stop command, game end command, winning number command, payout start command, payout end command, standby command, stop command, error command, return command, setting command, setting confirmation command, Multiple types of commands including door commands and operation detection commands are transmitted. These commands consist of 1-byte type data indicating the command type and 1-byte extension data indicating the command content, and the sub-control unit 91 can determine the command type from the type data.

  The inserted number command is a command that can specify the number of inserted medals, that is, the number of medals used for setting the number of bets, and is a state from the end of the game (after changing the setting) to the start of the game. Or, when a prescribed number of bets is not set, a medal is inserted, or when the bet number is set by operating the MAXBET switch 6. The inserted number command is transmitted when the betting number setting operation is performed, so that it is possible to specify that the betting number setting operation has been performed by receiving the inserted number command.

  The credit command is a command that can specify the number of medals stored as credits, and is a state from the end of the game (after setting change) to the start of the game, and in a state where a predetermined number of bets is set, Sent when a medal is inserted and credits are added.

  The game state command is a command that can specify the game state (RT0 to 4, RB) of the game, and is transmitted when the start switch 7 is operated to start the game.

  The ART state command is a command that can specify whether it is AT, whether it is ART, the number of remaining games until the specified number of games to be described later, the number of remaining games in the precursor period, and the number of remaining games of ART. When the game starts, it is transmitted after the game state command.

  The internal winning command is a command that can specify the internal lottery result, and is transmitted when the start switch 7 is operated and the game starts, and is transmitted after the ART state command. The internal winning command includes a first internal winning command and a second internal winning command, and a state in which navigation notification is performed when a notification target role that is a target of navigation notification in the internal lottery is won (AT 1), the first internal winning command that can specify the type of the winning notification target role and the stop order advantageous to the player is transmitted, and the navigation notification is performed. If the state is not performed (when no navigation notification is performed during non-AT), the type of the winning notification target role can be specified, but the stop order advantageous to the player cannot be specified. A command is sent.

  Since the game state command, the ART state command, and the internal winning command are transmitted when the start switch 7 is operated and the game starts, the game is started by operating the start switch 7 by receiving these commands. Can be specified.

  The freeze command is a command that can specify whether the game is controlled to a freeze state that delays the progress of the game for a predetermined period of time, or if it is controlled to the freeze state, and when the game starts And transmitted after the internal winning command is transmitted.

  The ART lottery result command is a command that can specify whether or not an ART lottery or an additional lottery to be described later is won, the number of games of the winning ART or the number of games to be added, and when the game starts, Sent after an internal winning command is transmitted in a game in which a lottery or an extra lottery is performed.

  The reel acceleration information command is a command that can specify that the rotation of the reel starts with the progress of the game, and is transmitted when the rotation of the reel starts with the progress of the game. It is also transmitted when the reel starts to rotate with the end of the freeze state. Therefore, after the start of the freeze state is specified by the freeze command, the reel acceleration information command is received and the game progresses. Not only the fact that the rotation of the reel starts but also the end of the freeze state can be specified.

  The stop operation command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, and the area number of the stop operation position of the corresponding reel. Sent every time the accompanying stop control is performed.

  The sliding frame number command is a command that can specify whether the reel to be stopped is a left reel, a middle reel, or a right reel, and the number of sliding frames to be moved from when the corresponding reel is stopped until it stops. Each time stop control associated with the stop operation of each reel is performed, the corresponding stop operation command is transmitted after being transmitted.

  The stop command is a command that can specify whether the reel to be stopped is a left reel, a middle reel, or a right reel, and the area number of the stop position of the corresponding reel. Stop control associated with the stop operation of each reel Is transmitted after the corresponding sliding frame number command is transmitted.

  With the stop operation command, the sliding frame number command, and the stop command, it is possible to specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, and accompanying the stop operation of each reel Since it is transmitted every time stop control is performed, by receiving these commands, it is possible to specify that one of the reels has been stopped and the reel to be stopped.

  The game end command is a command that can specify that the game has ended, and is transmitted when the player presses the stop switch to stop the third stop reel and releases the stop switch.

  The winning number command is a command that can specify a combination of symbols arranged on the winning line LN, whether or not a winning is received, a type of winning, and a payout number of medals at the time of winning. The player stops the third stop reel. This is when the stop switch is pressed and released, and is transmitted after the game end command is transmitted.

  Both the game end command and the winning number command are transmitted when the player depresses the stop switch to release the third stop reel and releases the stop switch. It is possible to specify that all operations necessary to advance one game have been completed.

  The payout start command is a command for notifying the start of payout of medals, and is transmitted when the payout of medals is started by paying out a prize or credit (including medals used for setting the number of bets). The payout end command is a command for notifying the end of payout of medals, and is transmitted when the payout of medals by winning and winning a credit is completed.

  The stand-by command is a command indicating a transition to the stand-by state. When one game is over and the bet amount is not set and the estimated end time (60 seconds in this embodiment) has passed, It is transmitted after the payout of medals by the settlement (including medals used for setting the number of bets) is completed and a payout end command is transmitted.

  The stop command is a command indicating the occurrence or release of the stop state, and after the end of the BB, the stop command indicating the occurrence of the stop state is transmitted when the ending effect waiting time has elapsed, and the reset operation is performed. When the stop state is released, a stop command indicating the release of the stop state is transmitted.

  An error command is a command that indicates the occurrence or cancellation of an error condition and the type of error condition. When an error is determined and controlled to an error condition, an error command indicating the occurrence and type of the error condition is sent and reset. When the error state is canceled after the operation is performed, an error command indicating the cancellation of the error state is transmitted.

  The return command is a command indicating that the main control unit 41 has returned to the control state before the power interruption, and is transmitted when the main control unit 41 returns to the control state before the power interruption.

  The setting command is a command indicating the start or end of the setting change state and the setting value after the setting change. At the time of transition to the setting change state, a setting command indicating the start of the setting change state is transmitted, and when the setting change state ends. A setting command indicating the end of the setting change state and the setting value after the setting change is transmitted. Further, since the control state of the main control unit 41 is initialized with the transition to the setting change state, it can be specified that the control state of the main control unit 41 has been initialized by the setting command indicating the start of setting. .

  The setting confirmation command is a command that indicates the start or end of the setting confirmation state. A setting confirmation command that indicates the start of setting confirmation is transmitted when entering the setting confirmation state, and the setting confirmation end is indicated when the setting confirmation state ends. A confirmation command is sent.

  The door command is a command indicating the detection state of the door opening detection switch 25, that is, on (open state) / off (closed state), when the power is turned on, at the end of one game (after the game is over, the bet number of the next game) Sent before the setting of ”can be started), and when the detection state of the door opening detection switch 25 changes (from on to off, from off to on).

  The operation detection command is a command indicating the detection state (on / off) of the operation switches (MAXBET switch 6, start switch 7, stop switches 8L, 8C, 8R), and is transmitted at regular intervals.

  Of these commands, commands other than the door command and the operation detection command are generated in the main process, temporarily stored in the command queue provided in the RAM 41c, and transmitted in the subsequent command transmission process of the timer interrupt process (main). The

  On the other hand, the door command is generated in the door monitoring process of the timer interrupt process (main), temporarily stored in the command queue provided in the RAM 41c, and transmitted in the command transmission process of the timer interrupt process (main) thereafter. The

  The operation detection command is generated based on the detection state of the switch every time the command transmission process of the timer interrupt process (main) is executed 10 times, and is temporarily stored in the command queue provided in the RAM 41c. Then, it is transmitted in the command transmission process of the subsequent timer interrupt process (main).

  Next, the control of the effect performed by the sub-control unit 91 based on the command transmitted from the main control unit 41 to the effect control board 90 will be described. When the sub control unit 91 receives a command from the main control unit 41, the sub control unit 91 executes a command reception interrupt process. In the command reception interrupt process, the command acquired from the command transmission line is stored in the reception buffer provided in the RAM 91c.

  In the timer interrupt process (sub), the sub-control unit 91 determines whether or not an unprocessed command is stored in the reception buffer. If an unprocessed command is stored, the sub-control unit 91 is the earliest. The control pattern table stored in the ROM 91b is referred to based on the command received in the stage, and the liquid crystal display 51, effect effect LED 52, speakers 53, 54, reel LED 55, etc. are controlled based on the control contents registered in the control pattern table. Performs output control of various rendering devices. In the control pattern table, the display pattern of the liquid crystal display 51 corresponding to the type of command, the lighting mode of the lighting effect LED 52, the output mode of the speakers 53 and 54, the lighting mode of the reel LED 55, etc. Control patterns of these effect devices are registered, and when the sub-control unit 91 receives a command, the sub-control unit 91 stores the control patterns registered corresponding to the effect patterns set in the RAM 91c in the game of the control pattern table. Among these, the control pattern corresponding to the type of the received command is referred to, and the output control of the rendering device is performed based on the control pattern. Thereby, the production according to the production pattern and the progress of the game is executed.

  If the sub-control unit 91 receives a new command during execution of an effect triggered by the reception of a certain command, the sub-control unit 91 stops the effect based on the control pattern being executed, and changes to the newly received command. An effect based on the corresponding control pattern is executed. In other words, even if the production is not finished to the end, when a new command is received, the production that was being executed is canceled and a new command is received unless the received new command is not a command that triggers a new production. An effect based on the command is executed.

  When the internal winning command is received, the effect pattern is selected at a selection rate corresponding to the result of the internal lottery indicated by the internal winning command, and is set in the RAM 91c. The selection rate of the effect pattern is registered in the effect table stored in the ROM 91b, and when the sub control unit 91 receives the internal winning command, the sub control unit 91 stores the effect pattern in the effect table according to the result of the internal lottery indicated by the internal winning command. With reference to the registered selection rate, one of the effect patterns is selected from a plurality of types of effect patterns according to the selection rate, and the selected effect pattern is set in the RAM 91c as the effect pattern of the game. Even if the same command is received, a different control pattern is selected depending on the effect pattern selected when the internal winning command is received. As a result, different effects may be performed depending on the effect pattern.

  In the slot machine 1 according to the present embodiment, the main control unit 41 can provide a notification period in which navigation notification can be executed to notify the stop order that is advantageous to the player according to the internal lottery result by the lighting mode of the game auxiliary display 12. Can be controlled at an assist time (hereinafter referred to as AT).

  When the main control unit 41 is controlled by the AT, the main control unit 41 performs navigation notification by winning the navigation target combination corresponding to the gaming state, and transmits a push order command to the sub control unit 91. Thus, a navigation effect using the liquid crystal display 51 or the like is executed. Further, in the present embodiment, the main control unit 41 can execute navigation notification and execute a navigation effect by satisfying certain conditions even in a normal state where the control is not performed by the AT.

  FIG. 6 is an address map of the memory area used by the main control unit 41. As shown in FIG. 6, the memory area used by the main controller 41 includes a memory area (0000H to 7FFFH) allocated to the ROM 41b and a memory area (F000H to FFFFH) allocated to the RAM 41c.

  The memory area of the ROM 41b includes a program / data area (0000H to 26FFH) in which programs and fixed data are stored, a ROM comment area (2700H to 277FH) in which arbitrary data such as a title and version of the program can be set, and a later description. Parameters for setting the hardware table of the vector table area (2780H to 27A7H) in which the upper address of the subroutine of the CALLV instruction to be executed and the start address of the timer interrupt process (main) are set, and the internal function of the main control unit 41 HW parameter area (27A8H to 27FFH) in which is set, and an unused area (2800H to 7FFFH) where access is prohibited.

  The parameters set in the HW parameter area in the ROM 41b include the final address (HPRGEND) of the ROM area used in the program / data area, the start address (HRAMSTAT) and the final address (HRAMEND) of the RAM area for which access is prohibited.

  The memory area of the RAM 41c includes a usable area (F000H to F400H) usable as a work and an internal function register area (F4B0H to F4B0H to store a group of registers for controlling each function mounted on the main control unit 41. F6FFH) and unused areas (F401H to F4AFH, F700H to FFFFH) where access is prohibited.

  FIG. 7 is an address map of the program / data area in the ROM 41b of the main control unit 41 and the usable area in the RAM 41c.

  As shown in FIG. 7A, the program / data area in the ROM 41b includes a game program area in which a game program related to the progress of the game is stored, a game data area in which game data used by the game program is stored, It includes a use area 1, a non-game program area in which a non-game program not related to the progress of the game is stored, a non-game data area in which non-game data used by the non-game program is stored, and an unused area 2. .

  The progress of the game is to advance a series of processes constituting the game. In the case of a slot machine, the stage where the game can be started by setting the number of bets is started and the reel is rotated. A step of stopping the reel, a step of deriving a display result, and a step of assigning a value such as a medal according to the display result.

  A game program area related to the progress of the game and a non-game program not related to the progress of the game are allocated separately, and are allocated backward in the storage area of the ROM 41b among the game program area and the non-program area. Since the unused area 1 of at least 16 bytes or more is allocated to the area before the non-program area, a storage area for the game program area related to the progress of the game and the non-game program not related to the progress of the game It can be easily specified according to the difference.

  The game program area and the game data area, the non-game program area and the non-game data area are allocated to continuous areas, respectively, while the game program area and the game data area related to the progress of the game are not related to the progress of the game. Since the game program and the non-game data area are allocated to areas that are not continuous across the unused area 1 of at least 16 bytes or more, the game program area and game data area related to the progress of the game, and the progress of the game Non-game programs and non-game data areas that are not involved can be easily specified according to the difference in storage areas.

  In the above description, before and after the storage area is a magnitude relationship between the address values assigned to the storage area. The smaller address is the front and the larger address is the rear. For this reason, the storage area allocated behind the one storage area corresponds to the storage area having an address value larger than that of the one storage area, and the storage area allocated ahead of the one storage area. This corresponds to a storage area having an address value smaller than that of one storage area.

  Also, a configuration may be adopted in which a game program is allocated behind the non-game program area, and an unused area is allocated before the game program allocated behind the non-game program area. A game program area related to the progress of the game and a non-game program not related to the progress of the game can be easily specified according to the difference in the storage area.

  Further, the game program area and the non-game program area may be assigned to areas adjacent to each other with the unused area 1 in between, and even in such a structure, the game program area related to the progress of the game Therefore, it is possible to easily identify a non-game program that is not related to the progress of the game according to the difference in storage area.

  In addition, in the unused areas 1 and 2 of the program / data area of the ROM 41b, since 0 values are stored in all areas, a game program area and game data area, a non-game program area and non-game data, The unused areas 1 and 2 can be easily distinguished from each other, and even when invalid data is stored in the unused areas 1 and 2, they can be easily found.

  It should be noted that 1 may be stored in all of the unused areas 1 and 2 of the program / data area of the ROM 41b. Even in such a configuration, the game program area, the game data area, and the non-game The program area and non-game data can be easily distinguished from the unused areas 1 and 2 and can be easily detected even when invalid data is stored in the unused areas 1 and 2. .

  Further, as long as the game program area and the non-game program area are assigned to separate areas, the game program area and the non-game program area may be assigned to adjacent areas. Even with such a configuration, it is possible to easily identify a game program area related to the progress of the game and a non-game program not related to the progress of the game according to the difference in the storage areas.

  The game program area and the non-game program area both start from an address (0H) having the same lower 4 digits when the address is expressed in binary, and the program / data area of the ROM 41b. Among them, the game program area related to the progress of the game and the non-game program area not related to the progress of the game can be easily distinguished from other areas.

  In addition, both the game program area and the non-game program area not only start from an address having the same low-order 4 digit value when the address is expressed in binary, but also the low-order 1 digit value when expressed in hexadecimal. Starts from the same 0 address (0H), so that not only when the address is expressed in binary, but also when it is expressed in hexadecimal, the game program area and the non-game program area are easily distinguished from other areas. can do.

  It should be noted that both the game program area and the non-game program area start from an address having the same value in the lower N (N is a natural number of 1 or more) regardless of whether the address is expressed in binary or hexadecimal. With this configuration, the game program area and the non-game program area can be easily distinguished from other areas. For example, the value of the lower N (N is a natural number of 1 or more) digits is the same 1 The same effect can be obtained with a configuration starting from the address.

  As shown in FIG. 7B, the usable area of the RAM 41c includes a game RAM area used as a work by the game program, a non-game RAM area used as a work by the non-game program, and an unused area 4. The game RAM area includes a special work, an important work, a general work, an unused area 3, and a game stack area in which the game program saves data, and the non-game RAM area includes a game An area where the program can be referred to, an area where the game program cannot be referred to, and a non-game stack area where the non-game program saves data are included. In the present embodiment, the game stack area and the non-game stack area are individually provided in different areas. However, the game stack area and the non-game program may be provided with a single stack area.

  The unused area 3 is an area in which neither a game program nor a non-game program is used, and is an area that is redundant with respect to a game RAM area having a predetermined capacity.

  The unused area 4 is an area of 16 bytes or more in which neither a game program nor a non-game program is used. Since the game RAM area and the non-game RAM area are allocated to areas that are not continuous across the unused area 4, the game RAM area used by the game program related to the progress of the game and the non-related not related to the progress of the game The non-game RAM area used by the game program can be easily specified according to the difference in the storage areas.

  Hereinafter, the game program area, the game data area, and the game RAM area may be collectively referred to as a game area, and the non-game program area, the non-game data area, and the non-game RAM area may be collectively referred to as a non-game area. . Further, the unused area 1 and the unused area 2, the unused area 3 and the unused area 4 may be collectively referred to as an unused area.

  Based on the parameters set in the HW parameter area, the main control unit 41 permits access in the usable area of the RAM 41c when an access is prohibited in the program / data area of the ROM 41b. When there is an access to an area that is not set to, when there is an access to an area other than the program / data area in the ROM 41b, and when there is an access to an area other than the usable area in the RAM 41c, In other words, when an access is made to a memory area that is not accessed in normal operation, an illegal access reset is generated to disable the progress of the game. Therefore, an unused area of the ROM 41b or an area unrelated to the operation If an illegal program is stored in an unused area of the RAM 41c, etc. Even, it is possible to prevent illegal program from being executed.

  In particular, in the present embodiment, a game program area and a non-game program area are allocated to the program / data area of the ROM 41b that is permitted to be accessed by the program, and before the non-game program area behind the game program area. An unused area 1 is assigned to the area, and a group including an area from the start address of the game program area to the final address of the non-game program in the program / data area based on the parameters set in the HW parameter area. While the access to the area (the area from the game program area to the non-game data area) is collectively set to be permitted, the other areas, that is, the program / data area of the game program, game data, non-game program, Non-game data is not stored Because it is forbidden access to the area later than trick data, it is possible to prevent conducted unintended control by malware or illegal data.

  In addition, a game area is allocated behind the non-game program area in the program / data area permitted to be accessed by the program in the ROM 41b, and an unused area in the area before the game program area behind the non-game program area Are allocated to a group of areas including the area from the start address of the non-game program area to the final address of the game program based on the parameters set in the HW parameter area. Thus, while the permission is set, even if access to other areas is prohibited, it is possible to prevent unintended control by an unauthorized program or unauthorized data.

  A game program area and a non-game program area are allocated to the program / data area, an unused area 1 is allocated to an area before the non-game program area behind the game program area, and a program / data Out of the areas, a group of areas including the game program area (area from the game program area to the game data area), a group of areas including the non-game program (area from the non-game program area to the non-game data area) A configuration may be adopted in which access is set to permit and access to other areas is prohibited. Even in such a configuration, a game program or a non-game program is not stored in the program / data area. Access is prohibited, so the intent of unauthorized programs and unauthorized data Can be prevented without control will take place. In addition, a game area is allocated behind the non-game program area in the program / data area permitted to be accessed by the program in the ROM 41b, and an unused area in the area before the game program area behind the non-game program area Of the program / data area including the game program area (the area from the game program area to the game data area), and the area including the non-game program (from the non-game program area to the non-game area). (Access to the data area) may be set to permit, and access to other areas may be prohibited. Even in such a configuration, a game program or non-game in the program / data area Access to an area where no program is stored Because There is inhibited, it is possible to prevent conducted unintended control by malware or illegal data.

  In the above description, the area where access is permitted is set in the program / data area. However, by setting the area where access is prohibited in the program / data area, the area where access is indirectly permitted is set. It is good also as a structure to be performed.

  Based on the parameters set in the HW parameter area, the main control unit 41 executes the user program when the user program is executed in an area other than the designated area where the program travel is permitted, that is, in a normal operation. When the user program is executed in an unoccupied area, the IAT circuit 506a outputs an IAT generation signal to disable the progress of the game. Even if an unauthorized program is stored in the use area or the like, it is possible to prevent the unauthorized program from being executed.

  In particular, in the present embodiment, a game program area and a non-game program area are allocated to the program / data area of the ROM 41b that is permitted to be accessed by the program, and before the non-game program area behind the game program area. The unused area 1 is assigned to the area, and the IAT circuit 506a permits the program running for each of the game program area and the non-game program area in the program / data area based on the parameters set in the HW parameter area. While it is set as a designated area, program running in other areas, that is, areas that do not store gaming programs or non-gaming programs in the program / data area is prohibited. Control line It can be prevented been.

  In addition, a game area is allocated behind the non-game program area in the program / data area permitted to be accessed by the program in the ROM 41b, and an unused area in the area before the game program area behind the non-game program area And the IAT circuit 506a sets each of the game program area and the non-game program area of the program / data area as a designated area that permits program running based on the parameters set in the HW parameter area. Thus, even if the program running in other areas is prohibited, it is possible to prevent unintended control due to unauthorized programs and unauthorized data.

  A game program area and a non-game program area are allocated to the program / data area, an unused area 1 is allocated to an area before the non-game program area behind the game program area, and an HW parameter area. Based on the parameters set in the above, a group of areas including the area from the start address of the game program area to the final address of the non-game program in the program / data area (area from the game program area to the non-game data area) For example, the IAT circuit 506a may be set as a designated area for permitting program running at once and the program running in other areas may be prohibited. Even in such a configuration, the program / data area Of which game programs and non-game programs are stored Since the program running in the absence area is prohibited, it is possible to prevent conducted unintended control by malware or illegal data. In addition, a game area is allocated behind the non-game program area in the program / data area permitted to be accessed by the program in the ROM 41b, and an unused area in the area before the game program area behind the non-game program area Is assigned, and based on the parameters set in the HW parameter area, a group of areas (from the game program area) including the area from the start address of the non-game program area to the final address of the game program in the program / data area. Even if the IAT circuit 506a is collectively set as a designated area for permitting program running and the program running in other areas is prohibited, the area up to the non-game data area) Unintended control It can be prevented been.

  In the above description, the program / data area is configured to set the area that permits the program travel. However, the program / data area allows the program travel to be indirectly permitted by setting the area that prohibits the program travel. A configuration may be adopted in which an area is set.

  The program executed by the main control unit 41 includes a main routine that manages the progress of the entire program, and a subroutine that is called during execution of another program.

  Also, a CALL instruction is included as an instruction for causing the main control unit 41 to execute a program stored in the program / data area.

  The CALL instruction is an instruction for calling and executing a subroutine stored at an address designated in the main routine or the subroutine. When calling the subroutine by the CALL instruction, the main control unit 41 stores the call source address in the stack area, and calls and executes the subroutine stored at the designated address. After the subroutine is finished, the caller address stored in the stack area, that is, the caller main routine or subroutine program that executed the CALL instruction is returned.

  The CALL instruction includes a normal CALL instruction and a CALLV instruction which is a special CALL instruction. The normal CALL instruction is an instruction that specifies a high-order address and a low-order address to specify both the high-order address and the low-order address and calls a subroutine while the CALLV instruction specifies only the low-order address. As a result, the subroutine is called by specifying the address by the upper address preset in the vector table area of the ROM 41b and the designated lower address, and the subroutine is called with a smaller amount of data than the normal CALL instruction. It becomes possible.

  The RST instruction is an instruction to call and execute a subroutine stored at a specific address corresponding to a specified value by specifying a value corresponding to a plurality of predetermined specific addresses. Subroutines can be called with a smaller amount of data than instructions and CALLV instructions. When calling the subroutine by the RST instruction, the main control unit 41 stores the caller's address in the stack area, and calls and executes the subroutine stored at the specific address corresponding to the designated value. After the subroutine is finished, the caller address stored in the stack area, that is, the caller main routine or subroutine that executed the RST instruction is returned to.

  The jump instruction is an instruction to move to a program stored at an address specified in the main routine or subroutine. The main control unit 41 moves to the program stored at the address specified by the jump instruction and executes the destination program. In this case, unlike the CALL instruction or the RST instruction, even if the program after the movement ends, the program does not return to the movement source program.

  The main control unit 41 includes an LD command as a command for reading data stored in the program / data area. The LD instruction is an instruction for reading data stored at a specified address in a main routine or subroutine into a specified register. The main control unit 41 reads the data stored at the address specified by the LD instruction, and stores the read data in the register specified by the LD instruction.

  Among the game programs stored in the ROM 41b, subroutines that are particularly frequently used are stored in an area of the game program area of the ROM 41b where the start address is a specific value (for example, 00H). On the other hand, a specific value is set in the vector table area of the ROM 41b as an upper address of a subroutine called by the CALLV instruction. The main control unit 41 specifies only the lower address using the CALLV instruction when calling a subroutine in which the upper address of the head address has a specific value, thereby specifying the specific value set in the vector table area as the upper address. The lower address specified as the lower address is specified, and the subroutine stored in the address including the upper and lower addresses is called and executed. For this reason, an upper address that constitutes a part of an address used when calling a subroutine that is used frequently in the game program is set in the vector table in advance as a specific value, and is based on the specific value set in the vector table. Since the address is specified, it is possible to call a subroutine with a smaller amount of data compared to a normal CALL instruction that calls a program by specifying both an upper address and a lower address, and when calling these subroutines It is possible to reduce the waste of a program for specifying an address.

  Of the non-game programs stored in the ROM 41b, subroutines that are used frequently are stored in the non-game program area of the ROM 41b in the area where the start address is a specific value, and the CALLV instruction When a specific value is set as an upper address of a subroutine to be called at the time, and the main control unit 41 calls a subroutine in which the upper address of the top address is a specific value, only the lower address is specified by using the CALLV instruction. Even if it is configured to call and execute, subroutines can be called with a smaller amount of data compared to a normal CALL instruction that calls a program by specifying both upper and lower addresses. When calling It is possible to reduce the waste of program for specifying the address.

  In addition, the upper address used when calling with the CALLV instruction may be set in a specific register of the main control unit 41 instead of the vector table area.

  In addition to the CALLV instruction, a part of the address is specified by using a value stored in the vector table area, a value set in a specific register, etc. If a special CALL instruction that enables the storage address to be specified is used, it is possible to reduce the waste of a program for designating an address when calling a subroutine. In addition, identification values having a data amount smaller than the addresses are assigned to the plurality of areas constituting the vector table area, the storage addresses of the subroutines are set in the plurality of areas, and the identification values are designated, thereby identifying the areas. Even in a configuration that uses a special CALL instruction that makes it possible to specify a storage address of a subroutine stored in an area corresponding to a value, it is possible to reduce the waste of a program for designating an address when the subroutine is called. .

  In addition, among the game data stored in the ROM 41b, game data that is frequently used is stored in the game data area of the ROM 41b in an area where the head address is a specific value, and a special LD is stored in the vector table area of the ROM 41b. By setting a specific value as the upper address of the data to be read by the instruction, and when the main control unit 41 calls game data in which the upper address of the top address becomes the specific value, only the lower address is specified by using a special LD instruction. Even when it is configured to read out these game data, it becomes possible to call game data with a smaller amount of data compared to a normal LD command that reads out data by specifying both the upper address and the lower address. When wasting game data, the program for specifying the address is wasted It can be reduced.

  In addition, among the non-game data stored in the ROM 41b, non-game data that is frequently used is stored in the non-game data area of the ROM 41b in the area where the head address is a specific value, and in the vector table area of the ROM 41b, When a specific value is set as an upper address of data read by a special LD instruction and the main control unit 41 calls non-game data whose upper address of the head address is a specific value, only the lower address is used by using a special LD instruction. Even if it is configured to read these non-game data by designating, the non-game data is called with a smaller amount of data compared to a normal LD instruction that designates both the upper address and the lower address and reads data. It is possible to specify the address when reading these non-game data. It is possible to reduce the waste of lamb.

  Even in these cases, the upper address used when calling with a special LD instruction may be set in a specific register of the main control unit 41 instead of the vector table area.

  Also, a part of the address is specified using the value stored in the vector table area, the value set in a specific register, etc., and the data storage address can be specified by specifying the remaining part of the address If the configuration uses a special LD instruction, the waste of a program for designating an address when reading data can be reduced. In addition, identification values with a data amount smaller than the addresses are assigned to the plurality of areas constituting the vector table area, the data storage addresses are set in the plurality of areas, and the identification values are designated to identify the areas. Even in a configuration using a special LD instruction that can specify the storage address of data stored in an area corresponding to a value, it is possible to reduce the waste of a program for specifying an address when reading data .

  The main control unit 41 is activated when a system reset by inputting a system reset signal, a WDT reset by the WDT 506b, or the aforementioned illegal access reset occurs. At this time, the value set in the vector table area, that is, The upper address of the subroutine of the CALLV instruction and the start address of the timer interrupt processing (main) are values indicating the area where the program or the like is actually stored in the program area, or FFFFH (in the unused vector table area) If the value set in the vector table area is neither a value outside the area where the program is set nor FFFFH, it will not start. That unintended processing is executed due to an interrupt. It can be prevented before.

  The game program is a program related to the progress of the game, and is a program for executing a process that hinders the progress of the game unless the process based on the program is executed. On the other hand, a non-game program is a program that is not related to the progress of the game, and even when the game program is called to return to the game program without executing processing based on the program, the game can be advanced. It is a program for executing processing.

  As shown in FIG. 8, the game program includes a game dedicated program included only in the game program, and a common determination program and a common general-purpose program included in both the game program and the non-game program.

  The game dedicated program includes, for example, a game start waiting process, an internal lottery process, a reel control process, a game end setting process, an external output 1 process, an initial setting process, a power interruption process, and an error process. In the game start waiting process, after the control of one game is completed, the bet number is set by inserting medals, etc., and after the prescribed number of bets is set, the start switch 7 is operated to start the game. The internal lottery process is a process of performing an internal lottery and setting a winning flag, etc., and the reel control process starts the rotation of the reels, and the stop switches 8L, 8C, and 8R are operated. In the game end setting process, it is determined whether or not a winning has occurred according to the stop position of the stopped reel, and medals are paid out, re-game is set, and the game state is set. The external output 1 process is a process for performing output control of the medal IN signal, the medal OUT signal, the RB signal, the BB signal, and the RT signal among the external output signals. First The setting process is a process for making the game possible when the power is turned on (confirm backup error, register initialization, etc.), and the power interruption process can return to the state before the power interruption after the power interruption occurs. The error processing includes various abnormalities (medal insertion abnormality, foreign object detection in the medal selector 29, reel rotation abnormality, medal payout abnormality, foreign object detection near the payout outlet, RAM abnormality, setting, etc. This is a process for disabling the game when a value abnormality, empty hopper tank 34a, full tank overflow tank 35, etc. are detected. In addition, although not particularly illustrated, the game program includes processing related to the above-described AT (a lottery related to AT, control related to navigation notification, and the like).

  The common determination program in the game program includes, for example, an input determination process and a payout determination process. The insertion determination process is a process for determining whether or not the medal is normally passed by the inserted medal sensor 31, and is a process executed in a state where a medal can be inserted for setting a bet amount. The payout determination process is a process for determining whether or not the medal is normally passed by the payout sensor 34c, and is a process executed in a state where the payout of the medal is permitted at the time of winning a small role or at the time of credit settlement. It is.

  The common general-purpose program in the game program is a process that is called and executed from a plurality of types of processes constituting the game program. For example, a counter update process, a port input process, a data conversion process, an LED display process, a data setting process, Includes command setting processing. The counter update process is a process for updating the designated counter value, the port input process is a process for acquiring the input state of the designated port, and the data conversion process is input using game data. Is a process for converting and outputting the data, the LED display process is a process for setting the specified value to be displayed on the LED, and the data setting process is a process for setting the specified data, The command setting process is a process for setting a specified command in the command queue.

  In particular, the game program, when an abnormality is detected as described above, the release condition corresponding to the type of abnormality (in the case of random number abnormality, RAM abnormality, backup abnormality, setting value abnormality, resetting of the setting value, In the case of an abnormality other than the above, error processing is included that disables the progress of the game until a reset operation is established.

  As shown in FIG. 8, the non-game program includes a non-game dedicated program included only in the non-game program, and a common determination program and a common general-purpose program that are the same as the game program.

  Non-game dedicated programs include, for example, test signal output processing, foreign object detection processing, door monitoring processing, external output 2 processing, inserted medal error determination processing, payout medal error determination processing, power failure determination processing, normal time command transmission processing, power interruption Includes time command transmission processing. The test signal output process is a process for outputting a test signal generated in relation to the game result, and the foreign object detection process is a process for detecting a foreign object in the medal path by the insertion port sensor 26. The door monitoring process is a process for detecting the opening of the front door 1b, and the external output 2 process is a security signal (door open signal, setting change signal, input error signal, payout error signal) among external output signals. The inserted medal error determination process is a process for performing output control. Based on the detection status of the inserted medal sensor 31, the inserted medal backflow detection, the medal clogging detection in the medal selector 29, and the foreign object detection in the medal selector 29 are performed. The payout medal error determination process is based on the detection status of the payout sensor 34c, and the medal detection near the payout exit The power failure determination process is a process for determining whether or not a voltage drop signal from the power interruption detection circuit 48 is detected, and is a normal time command. The transmission process is a process for transmitting one command set first in the command queue to the sub-control unit 91 among the commands set in the command queue by the command setting process of the game dedicated program and the non-game dedicated program. The power interruption command transmission process is a process for transmitting all commands set in the command queue to the sub-control unit 91.

  The common general-purpose program in the non-game program is a process that is called and executed from a plurality of types of processes constituting the non-game program.For example, the counter update process, the port input process, Includes data conversion processing, LED display processing, data setting processing, and command setting processing.

  The non-game program includes processing for determining whether or not a predetermined detection status is based on the detection status of detection means (the slot sensor 26, the full sensor 35a, and the door opening detection switch 25) that are not involved in the progress of the game.

  In addition, the non-game program functions as a detection means related to the progress of a game in a specific control state among a plurality of control states (game start waiting process, internal lottery process, reel control process, game end time setting process). In other control states, the detection means (for example, the inserted medal sensor 31 and the payout sensor 34c) functioning as detection means not related to the progress of the game is based on the detection state in the control state not related to the progress of the game. A process for determining whether or not a predetermined detection status is present (for example, a inserted medal detection process or a payout medal detection process for detecting an abnormality caused by detecting the insertion of a medal during reel rotation or the payout of a medal) Including. Such a determination process corresponds to the common determination program because it is the same process as the process for determining whether or not the game program is in a predetermined detection status based on the detection status in the control state related to the progress of the game. .

  Of the processes included in the game program, the external output 1 process, the process of counting the number of medals inserted in the game start waiting process, the process of switching the flow path switching solenoid 30, and the number of medals paid out in the game end setting process Processing that does not directly relate to the progress of the game, such as counting, processing for detecting that the hopper tank 34a is empty, processing for updating software random numbers, processing related to AT, transmission processing for internal winning commands, etc. If so, a configuration in which all or part of these processes are included in the non-game program may be employed. On the other hand, as long as the processes included in the non-game program are indirectly related to the progress of the game, all or a part of these processes may be included in the game program.

  In the present embodiment, as shown in FIG. 9, the CPU 41a of the main control unit 41 calls a non-game program in the process based on the game program, executes the process based on the non-game program, and ends the process based on the non-game program. Return to the processing based on the game program.

  As shown in FIG. 9, the CPU 41a, in principle, executes the process based on the game program with reference to the game data in the game data area and uses the game RAM area as a work when executing the process based on the game program. The contents of the game RAM area can be referred to and updated. Further, the CPU 41a, in principle, executes processing based on the non-game program by referring to the game data in the non-game data area, and uses the non-game RAM area as a work. It is possible to refer to and update the contents of the non-game RAM area.

  Further, the CPU 41a does not refer to the non-game data area and does not update the non-game RAM area when executing processing based on the game program, but can refer to the non-game RAM area. In executing the processing based on the non-game program, the game data area is not referred to and the game RAM area is not updated, but the game RAM area can be referred to.

  In addition, the process based on the game program can be referred to only a specific area necessary for the game program in the non-game RAM area (for example, an error flag setting area indicating abnormality detection). In the processing based on the game RAM area, only specific areas required for the non-game program (for example, an internal winning flag setting area, a gaming state setting area, an RT setting area, etc.) can be referred to. In addition, a specific area in the non-game RAM area where the process based on the game program can be referred to, and a specific area in the game RAM area where the process based on the non-game program can be referred to may be assigned to a continuous address area. However, a configuration in which part or all of the address areas are allocated to non-contiguous address areas may be used.

  As described above, in this embodiment, a game program area in which a game program related to the progress of a game is stored, a game data area in which game data referred to by the game program is readable and stored, and work data referred to by the game program Is a game RAM area that is stored so as to be readable and writable, a program that is called by the game program, a non-game program area that stores a non-game program that is not related to the progress of the game, and a non-game that is referenced by the non-game program Since a non-game data area in which data is stored in a readable manner and a non-game RAM area in which work data referred to by the non-game program are stored in a readable and writable manner are separately allocated, a game program, Game data and work program work data; Game program, the workpiece data of the non game data and non-game program, can be easily identified according to a difference in the storage area.

  In addition, by dividing the game program area and the game data area from the non-game program area and the non-game data area, the area occupied by the ROM 41b can be managed in a compact manner according to each function. It becomes easier to specify the corresponding data.

  Further, in this embodiment, when executing the game program, it is possible to refer to the non-game RAM area, and when executing the non-game program, it is possible to refer to the game RAM area. In executing the game program, the data used by the non-game program can be easily used, and in executing the non-game program, the data used by the game program can be used easily. On the other hand, it is impossible to update the non-game RAM area when executing the game program, and it is impossible to update the game RAM area when executing the non-game program. Does not affect the processing of the non-game program, and the non-game program does not affect the processing of the game program.

  Further, in this embodiment, the processing based on the game program can be referred to only a specific area required for the game program in the non-game RAM area (for example, an error flag setting area indicating abnormality detection). The processing based on the non-gaming program can be referred to only specific areas (for example, an internal winning flag setting area, a gaming state setting area, an RT setting area, etc.) necessary for the non-gaming program in the gaming RAM area. Therefore, since the data that can be referred to by the game program in the non-game RAM area and the data that can be referred to by the non-game program are limited to a specific area, the reference destination of the game program or the non-game program can be easily specified. be able to.

  As shown in FIG. 10A, the main control unit 41 of the present embodiment can call a non-game program from the process based on the game program during the execution of the main process. As shown, it is possible to call a non-game program from a process based on the game program during the execution of the timer interrupt process.

  As shown in FIG. 10 (a), when calling a non-game program from a main process based on a game program, the game program sets the start address of the non-game program to be called in a specific area, and performs a common call process. 1 is executed. The common call process 1 is a process included in the game program. In the common call process 1, the register of the game program is saved in the game stack area and the stack pointer (SP, an address indicating the current position of the game stack area) is stored. Is saved in the SP save area of the game RAM area, and the timer master permission flag is set to a value indicating that the interrupt is prohibited by setting the value of the interrupt master permission flag, and then set to a specific area. Call the non-game program at the address.

  On the other hand, based on the called non-game program, the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program is set and the process of the non-game program is executed. Thereafter, the game program of the caller, that is, the common call process 1 is restored.

  After returning to the common call process 1, the common call process 1 releases the prohibition of the timer interrupt by setting the value of the interrupt master permission flag to a value indicating the permission of the interrupt, and saves the game stack area and the SP. Based on the data saved in the area, the register and the stack pointer of the game program are returned to the state before calling the non-game program, and the process ends.

  As described above, in this embodiment, when the game program calls the non-game program, the interrupt is prohibited by the common call processing 1 and when returning from the non-game program to the game program, Since the prohibition is released, it is possible to set the interrupt to be prohibited over a period during which the non-game program is being executed.

  In addition, when a non-game program is called from the main process based on the game program, the non-game program first disables interrupts and then executes various processes. The configuration may be such that the prohibition of the interrupt is canceled, and by adopting such a configuration, the interrupt can be set to be prohibited during the period during which the non-game program is executed, as in the present embodiment. In addition, since the prohibition and cancellation of interrupts are set by a non-game program, it is not necessary to set and cancel the prohibition of interrupts in the common call processing 1 of the game program, and the capacity of the game program can be reduced. .

  As shown in FIG. 10B, when a non-game program is called from a timer interrupt process based on a game program, the game program sets the start address of the non-game program to be called in a specific area, Call process 2 is executed. In the common call process 2, the register of the game program is saved in the game stack area, and the stack pointer (SP, the address indicating the current position of the game stack area) is saved in the SP save area of the game RAM area, and then specified. Call the non-game program at the address set in the area.

  On the other hand, the called non-game program sets the stack pointer of the non-game program, executes the process of the non-game program, and then returns to the common call process 2 of the caller.

  After returning to the common call process 2, the common call process 2 returns the register and the stack pointer of the game program to the state before calling the non-game program based on the data saved in the game stack area and the SP save area. Return and exit.

  As described above, in the common call process 2, unlike the call common process 1, the timer interrupt is not set to be prohibited or released. However, as described above, the main control unit 41 performs other interrupts during the execution of the timer interrupt process. Since the execution of the interruption process is prohibited, the interruption can be prohibited over the period during which the non-game program is executed.

  In the present embodiment, the game program executes the common call process 1 and the common call process 2 to call the non-game program and execute the non-game program. Regardless of whether or not there is, processing to save and protect all areas of the register is performed, so when returning to the game program, it is possible to reliably return from the state when the non-game program was called .

  In addition, without executing the common call process 1 and the common call process 2, the value of the register used by the game program immediately before calling the non-game program from the process based on the game program in the game program is protected. After all the processing based on the above is completed, the protected register value may be restored at the initial stage of returning to the game program. With such a configuration, the register is called before the non-game program is called. Since the protection process is performed and the register restoration process is performed after the return from the non-game program, the data stored in the register by the non-game program does not affect the game program.

  In addition, when a non-game program is called, the non-game program first saves the stack pointer and register of the game program, and returns the stack pointer and register of the game program to the end of the non-game program. With this configuration, as in this embodiment, when returning to the game program, it is possible to reliably return from the state when the non-game program is called, Capacity can be reduced.

  Next, various control contents executed by the main control unit 41 in the present embodiment will be described below with reference to FIGS.

  First, an initial setting process that is executed by the main control unit 41 at startup will be described. When the main control unit 41 is activated due to the occurrence of a reset, the main control unit 41 performs setting at the time of activation. In the startup setting, a status flag included in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result and execution result of the instruction, and particularly includes an interrupt master permission flag for setting interrupt prohibition / permission. Since the initial value of the interrupt master permission flag is a value indicating prohibition of interrupt, the main control unit 41 is started in a state where interrupt is prohibited. After that, the main control unit 41 sets various functions with reference to the HW parameter, and then performs an initial setting process according to the program stored in the program / data area. In this embodiment, the initial setting process is included in the game program.

  As shown in FIG. 11, in the initial setting process, interrupts are first prohibited by setting the value of the interrupt master permission flag to a value indicating that interrupts are prohibited (Sa1). As described above, the main control unit 41 is started in an interrupt-inhibited state, but in Sa1, the interrupt is again prohibited. Next, initialization data is set (Sa2), and each output port including the parallel output port 513 is initialized (Sa3). Next, the built-in register is set (Sa4).

  Next, it is determined whether or not the power supply voltage is normal (Sa5). If the power supply voltage is not normal, the determination is repeated until normal. If the power supply voltage is normal, the upper address of the interrupt vector is set (Sa6). Then, access to the RAM 41c is permitted (Sa7), and the stack pointer is initialized (Sa8).

  Next, the RAM parity of the game RAM area (game stack area, F000H to F1FFH including the unused area 3) in the usable area of the RAM 41c is calculated (Sa9). Then, it is determined whether or not the calculated RAM parity is 0 (Sa10). As will be described later, if the power-off process (main) is normally performed at the time of the previous power-off, the RAM parity should be 0. If the RAM parity is not 0 in the step of Sd10, the game of the RAM 41c The data stored in the RAM area is not normal. In this case, the process proceeds to step Sa13 to clear the destruction diagnosis data (Sa13). On the other hand, when the RAM parity becomes 0, the data for destructive diagnosis stored in the game RAM area is further acquired (Sa11), and it is determined whether the acquired data for destructive diagnosis is correct (Sa12), Destructive diagnosis data is cleared (Sa13).

  Next, it is determined whether or not the setting key switch 37 is in an ON state (Sa14). When the setting key switch 37 is in the ON state, a timer interrupt is set (Sa19). Specifically, the register of the timer circuit 509 built in the main control unit 41 is set so that a timer interrupt is periodically executed every predetermined time. In this embodiment, a value corresponding to about 0.56 ms is set in a predetermined register (time constant register), so that a timer interrupt is periodically generated every about 0.56 ms. In the timer circuit 509, the register is set, so that the timer is initialized and starts counting from the initial value. When the timer interrupt setting in step Sa19 is completed, the process proceeds to a setting change process.

  On the other hand, when the setting key switch 37 is in the OFF state, it is determined whether or not the stored contents of the RAM 41c are destroyed (Sa15). In step Sa15, it is determined whether a RAM abnormality flag, which will be described later, is set, and whether the storage content of the RAM 41c is destroyed based on the determinations in Sa10 and Sa12. If the stored contents of the RAM 41c are not destroyed, a return command is transmitted to the sub-control unit 91 (Sa16). In the case where the stored contents of the RAM 41c are not destroyed, it is determined that the RAM abnormality flag is not set and the RAM parity is 0 in the step Sa10, and further, the destruction diagnosis data is obtained in the step Sa12. This is the case when it is determined to be correct.

  After the step of Sa16, all the registers are restored based on the data stored in the game RAM area of the RAM 41c (Sa17), and the timer interrupt setting similar to the step of Sa19 is performed (Sa18). Then, the process proceeds to Sd24 in a timer interrupt process (main) described later. As a result, the state of the game RAM area and the non-game RAM area of the RAM 41c before the power interruption and the processing executed before the power interruption are restored.

  If the stored content of the RAM 41c is destroyed in step Sa15, a RAM abnormality flag indicating that the stored content of the RAM 41c is not normal is set in the RAM 41c (Sa20), and the process proceeds to error processing. In error processing, the progress of the game is disabled. Further, the error state that has been shifted after the RAM abnormality flag is set can be canceled by shifting to the setting change process by setting the setting key switch 37 to ON and turning on the power switch 39. On the other hand, when the power switch 39 is turned on without turning the setting key switch 37 on, the RAM abnormality flag remains set, and it is determined that the RAM is destroyed in step Sa15. An error condition occurs again.

  Next, the setting change process which the main control part 41 performs is demonstrated. In the present embodiment, the setting change process is included in the game program.

  As shown in FIG. 12, the main control unit 41 first sets the start address of the RAM 41c, that is, the start address (F000H) of the usable area in the register (Sb1). Next, it is determined whether or not the stored contents of the RAM 41c are destroyed in the same manner as the step Sa15 shown in FIG. 11 (Sb2). If the contents of the RAM 41c are not destroyed, that is, if the contents of the RAM are not abnormal, the initial address of the initialization target RAM at the start of the setting change (the last address of the area where important work is stored among the usable areas) Next address) is set in the register (Sb3). That is, the address set in Sb1 is changed. If the contents of the RAM 41c are destroyed, that is, if the contents of the RAM are abnormal, the process proceeds to step Sb4.

  Next, the final address (F1FFH) of the game stack area (in use) is designated as the final address of the initialization target RAM (Sb4), the game area initialization process is executed, and the address specified in the Sb1 or Sb3 step is used. The area up to the final address of the initialization target RAM is initialized (Sb5). Since the start address (F000H) of the usable area is set in the step Sb1, if the RAM contents are abnormal, all the game RAM areas in the RAM 41c are initialized in the step Sb5. It becomes. On the other hand, in the step of Sb3, the next address after the last address of the area in which the special work is stored among the usable areas is set as the initial address of the initialization target RAM at the start of setting change. If not abnormal, an area other than the special work in the game RAM area of the RAM 41c is initialized in step Sb5.

  Thereafter, a non-game area initialization process, which will be described later, is executed to initialize the areas from the top address of the unused area 4 to the last address of the non-game stack area (in use), that is, the unused area 4 and the non-game RAM area. (Sb6).

  Next, a setting command (start) indicating the start of the setting change state is transmitted to the sub-control unit 91 (Sb7), and interrupts are permitted (Sb8).

  Next, it is determined whether or not the reset / setting switch 38 has changed from OFF to ON (Sb9). When the reset / setting switch 38 changes from OFF to ON, the set value of the register is updated (1 is added in the case of 1 to 5, and 1 is updated in the case of 6) (Sb10). If the reset / setting switch 38 has not changed, it is determined whether or not the start switch 7 has changed from OFF to ON (Sb11). If the start switch 7 has not changed, the process returns to step Sb7. On the other hand, when the start switch 7 changes from OFF to ON, it is determined whether or not the setting key switch 37 is OFF (Sb12). If the setting key switch 37 is not in the OFF state, it waits until the setting key switch 37 is in the OFF state. When the setting key switch 37 is in the OFF state, the setting value data set in the register is stored in the special work of the RAM 41c (Sb13).

  Next, a setting command (end) indicating the end of the setting change state is transmitted to the sub-control unit 91 (Sb14). Then, the initial address of the initialization target RAM at the end of the setting change (the address next to the last address of the usable area in which the special work is stored) is set in the register (Sb14), and the process proceeds to the main process. .

  Next, a game area initialization process executed by the main control unit 41 will be described. In the present embodiment, the game area initialization process is included in the game program.

  As shown in FIG. 13, the main control unit 41 obtains the start address and end address of the initialization target RAM set in the register (Sf1). Then, the initial address value is subtracted from the end address value of the initialization target RAM to calculate the capacity of the initialization target RAM (Sf2), and the calculated capacity of the initialization target RAM is set in the register (Sf3). Also, the initial address value of the initialization target RAM is set as a designated address (Sf4), and 1-byte data stored in the designated address is overwritten with 0 and cleared (Sf5). Thereafter, the logical sum of the 1-byte data is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to the step of Sf5 and again the 1-byte data. Overwrite with 0 to clear. If it is determined in step Sf6 that the calculation result is 0, the designated address is updated to the address next to the currently set address as the designated address (Sf7), and the register is decremented by 1. (Sf8), it is determined whether or not the register is 0 (Sf9).

  If it is determined in step Sf9 that the register is not 0, the process returns to step Sf5, and the processes in steps Sf5 to Sf9 are repeated until the register becomes 0. If it is determined in step Sf9 that the register is 0, the game area initialization process is terminated and the process returns to the calling program.

  As described above, in the game area initialization process according to the present embodiment, the capacity of the initialization target RAM is calculated by designating the start address and the end address of the initialization target RAM, and the start address of the initialization target RAM is calculated. From the game RAM area, the designated initialization target RAM area is initialized by sequentially clearing the area for the capacity of the initialization target RAM.

  In the game area initialization process of the present embodiment, by specifying the start address and end address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address and end address, and the start The process of updating the specified address to the next address after clearing the data at the specified address, with the address as the initial value of the specified address, is repeatedly executed for the capacity of the RAM to be initialized. The area from the address to the end address is initialized. By specifying the start address and end address of the initialization target RAM, the start address becomes the initial value of the specified address, and the data of the specified address is changed. The process of updating the specified address to the next address after clearing the By repeatedly executed until the may be configured to area from the start address to be initialized RAM to the end address is initialized.

  Next, the non-game area initialization process executed by the main control unit 41 will be described. In the present embodiment, the non-game area initialization process is included in the non-game program.

  As shown in FIG. 14, the main control unit 41 sets the start address of the unused area 4 as the start address of the initialization target RAM (Sg1). Then, the capacity of the initialization target RAM is calculated by subtracting the start address value of the initialization target RAM (the start address value of the unused area 4) from the final address value of the usable area of the RAM 41c (Sg2). The capacity of the initialization target RAM is set in the register (Sg3). Also, the initial address value of the initialization target RAM (the initial address value of the unused area 4) is set as the designated address (Sg4), and the 1-byte data stored in the designated address is overwritten with 0 and cleared. (Sg5). Thereafter, the logical sum of the 1-byte data is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to the step of Sg5 and again the 1-byte data. Overwrite with 0 to clear. If it is determined in step Sg6 that the calculation result is 0, the designated address is updated to the address next to the currently set address as the designated address (Sg7), and the register is decremented by 1. (Sg8), it is determined whether or not the register is 0 (Sg9).

  If it is determined in step Sg9 that the register is not 0, the process returns to step Sg5, and the processing in steps Sg5 to Sg9 is repeated until the register becomes 0. If it is determined in step Sg9 that the register is 0, the non-game area initialization process is terminated and the process returns to the calling program.

  Thus, in the non-game area initialization process of the present embodiment, by sequentially clearing the RAM area for the capacity of the initialization target RAM from the start address of the initialization target RAM (the start address of the unused area 4), The areas from the start address to the end address of the initialization target RAM, that is, the unused area 4 and the non-game RAM area are initialized.

  In the non-game area initialization process of this embodiment, by specifying the start address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address, and the start address is set to the specified address. The process of updating the specified address to the next address after clearing the data at the specified address as the initial value is repeatedly executed as many times as the capacity of the RAM to be initialized. The area is initialized, but by specifying the start address and end address of the initialization target RAM, the start address becomes the initial value of the specified address, and the specified address is cleared after clearing the data of the specified address. Is repeatedly executed until the specified address reaches the end address. Area from the start address to be initialized RAM to the end address may be configured to be initialized.

  Further, in the non-game area initialization process of the present embodiment, by setting the start address of the unused area 4 as the start address of the initialization target RAM, all of the unused area 4 and the non-game RAM area are initialized. However, the non-game area initialization process only needs to initialize at least a part of the non-game RAM area, and initializes a part of the non-game RAM area. However, a part of the non-game RAM area and the unused area 4 may be initialized.

  In this embodiment, in the game area initialization process and the non-game area initialization process, the 1-byte data stored in the specified address is overwritten with 0 and cleared, and then the logic of the 1-byte data is changed. The sum is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the processing is performed by overwriting the 1-byte data with 0 again and clearing it. The data at the address to be cleared is cleared, but the configuration in which 1-byte data stored at the specified address is overwritten with 0 and cleared is also possible.

  Next, main processing executed by the main control unit 41 will be described. The main process is repeatedly executed for each unit of game. One period of the main process corresponds to one unit of the game. In this embodiment, the main process is included in the game program.

  As shown in FIG. 15, the main control unit 41 first prohibits an interrupt (Sc1). Next, the final address of the initialization target RAM (the final address of the game stack area (unused)) is set (Sc2).

  Next, a game area initialization process is executed to clear the area of the RAM 41c indicated by the designated address (Sc3). At this time, if the main process is started after the setting change process, the special work among the usable areas is stored as the start address of the initialization target RAM when the setting change process is ended. Since the final address of the game stack area (unused) is set as the final address of the initialization target RAM in Sc2 of the main process, the final address of the game RAM area is set. In addition, areas other than the game stack area (in use) (important work, general work, unused area 3, and stack area (unused)) are initialized. At the end of a game that is not in a specific gaming state, the start address of the initialization target RAM at the end of the game (the start address of the unused area 3) is set in the step of Sc10 described later, and the initialization is performed in the step of Sc2. Since the final address of the target RAM (the final address of the game stack area (unused)) is set, the unused area 3 and the game stack area (unused) among the available areas are initialized. Also, at the end of the specific gaming state and at the end of the game, the initial address of the initialization target RAM at the end of the specific gaming state (a special work in the gaming RAM area is stored at the step of Sc11 described later). In the step of Sc2, the final address of the initialization target RAM at the end of the specific gaming state (final address of the gaming stack area (unused)) is set. Therefore, in the game RAM area, the general work, the unused area 3, and the game stack area (unused) are initialized.

  After initialization of RAM in the step of Sc3, interruption is permitted (Sc4), and a game start waiting process is executed (Sc5). In the game start waiting process, the process waits in a state where a bet number can be set, and a process for starting a game is executed when a specified number of bets are set according to the game state and the start switch 7 is operated.

  Next, an internal lottery process is executed (Sc6). In the internal lottery process, whether or not to win the above-mentioned winning combination based on the internal lottery random value latched simultaneously with the start of the game by the detection of the start switch 7 in the step of Sc5 (that is, the display result is derived). The process of determining whether or not to allow) is performed.

  Next, a reel control process is executed (Sc7). In the reel control process, the process of rotating each reel 2L, 2C, 2R in response to the operation of the start switch 7, the result of the internal lottery in the step of Sd2, and the operation of the stop switch 8L, 8C, 8R by the player are detected. In response to this, processing for stopping the rotation of the corresponding reels 2L, 2C, 2R is executed.

  Next, a game end time setting process is executed (Sc8). In the game end setting process, when it is determined that the rotation of all the reels 2L, 2C, and 2R is stopped in the process of Sc7, a winning occurs according to the display result derived for each reel 2L, 2C, and 2R. The process which determines whether or not is executed. When it is determined that a winning has occurred, processing such as credit addition and medal payout is performed based on the number of payouts according to the winning. When a winning occurs, a process for setting a gaming state for the next game is executed after the medal payout is completed. Further, when no winning occurs, after the reels are stopped, processing for setting a gaming state for the next game is executed.

  When the setting process at the end of the game is completed, it is determined whether or not it is the end of the specific gaming state (Sc9). If it is not the end of the specific gaming state, the initial address of the initialization target RAM at the end of the game is determined. Set (Sc10) and return to the step of Sc1. If it is at the end of the specific gaming state, the start address of the initialization target RAM at the end of the specific gaming state is set (Sc11), and the process returns to the step of Sc1.

  Also, in the main process, a command storing process for generating a command according to the progress of the game and setting the command in the command queue is executed, and the set command is executed in the normal timer execution process (main) thereafter. It is transmitted to the sub-control unit 91 by command transmission processing.

  FIGS. 16 and 17 are flowcharts showing the control contents of the timer interrupt process (main) executed by the main control unit 41 by interrupting and executing the main process (mainly the main process) at regular intervals (approximately 0.56 ms). is there. The timer interrupt process (main) is a process executed by an interrupt generated according to the count of the timer circuit 509. The address at which the program of the timer interrupt process (main) is stored is a vector table. It is set as a value corresponding to the timer interrupt. When a timer interrupt occurs, processing from that address is executed. Further, other interrupts are automatically prohibited during the execution period of the timer interrupt process (main). In this embodiment, the timer interrupt process (main) is included in the game program.

  As shown in FIG. 16, in the timer interrupt process (main), first, the register in use is saved in the game stack area (Sd1).

  Next, a power failure determination process is performed (Sd2). In the power failure determination process, it is determined whether or not a voltage drop signal is input from the power failure detection circuit 48. If a voltage drop signal is input, whether or not the voltage drop signal is input in the previous power failure determination process as well. If a voltage drop signal has been input in the previous power failure determination process, it is determined that a power failure has occurred, and a power interruption flag indicating that is set.

  After the power failure determination process in step Sd2, it is determined whether or not the power interruption flag is set (Sd3). If the power interruption flag is not set, the process proceeds to Sd4, and detection data of various switches from the input port. The port input process to input is performed. On the other hand, if the power interruption flag is set in the step of Sd3, the command transmission process at the time of power interruption is executed, so that all the untransmitted commands set in the command queue are transferred to the sub-control unit 91. After the transmission (Sd25), the process proceeds to a power interruption process (main).

  Next, the branch counter for identifying the timer interrupt to be executed in the timer interrupt process (main) is advanced by 1 from the four types of timer interrupts 1 to 4 (Sd5). In step Sd5, 1 is added when the branch counter value is 0 to 2, and is updated to 0 when the counter value is 3. That is, the branch counter value loops in the order of 0 → 1 → 2 → 3 → 0... Each time the timer interrupt process (main) is executed.

  Next, the branch counter value is referenced to determine whether it is 2 or 3, that is, timer interrupt 3 or timer interrupt 4 (Sd6). If it is not timer interrupt 3 or timer interrupt 4, that is, timer interrupt In the case of 1 or timer interrupt 2, motor phase signal output processing for outputting the phase signal data of the reel motors 32C, 32C, 32R is executed (Sd7).

  Next, referring to the counter value for branching, it is determined whether or not it is 1, that is, timer interrupt 2 (Sd8). If it is not timer interrupt 2, that is, timer interrupt 1, the reel motor Reel start processing (Sd9) for controlling the step time interval when starting 32L, 32C, 32R, motor step processing (Sd10) for changing phase signal data of the reel motors 32L, 32C, 32R, reel motors 32L, 32C After the stop of 32R, motor phase signal standby processing (Sd11) for changing the phase signal to one-phase excitation after a lapse of a certain time is sequentially executed, and the process proceeds to step Sd24.

  If it is determined in step Sd8 that the timer interrupt is 2, normal command transmission processing (Sd12) for transmitting various commands set in the command queue to the sub-control unit 91, the door opening detection switch 25 Door monitoring processing (Sd13) for performing detection status monitoring, door command transmission request, etc., external output signal updating processing (Sd14) for updating external output signals, LED dynamic display processing (Sd15) for dynamically lighting various displays, After sequentially executing control signal output processing (Sd16) for outputting data such as lighting signals of various LEDs to the output port and time counter update processing (Sd17) for updating various time counters, the process proceeds to step Sd24.

  If it is determined in step Sd6 that timer interrupt 3 or timer interrupt 4 is detected, it is further determined whether or not the branch counter value is 3, that is, timer interrupt 4 (Sd18). If it is not the timer interrupt 4, that is, the timer interrupt 3, the origin passing process (Sd19) for checking the origin passing (passing of the reel reference position) of the rotating reels 2L, 2C, 2R, After sequentially executing the switch input determination process (Sd20) for determining whether or not the detection state has changed, the process proceeds to step Sd24.

  If it is determined in step Sd18 that the timer interrupt is 4, stop switch processing (Sd21) for determining a stop position in accordance with detection of the stop switches 8L, 8C, and 8R, two phases when it is time to stop. A stop process (Sd22) for starting braking by excitation and a final stop process (Sd23) for three-phase excitation after a certain time from the start of braking in the stop process are sequentially executed, and then the process proceeds to step Sd24.

  In step Sd24, the register saved in the game stack area in Sd1 is restored, and the process before the interruption is returned.

  In this embodiment, the timer interruption process (main) is included in the game program, while the power failure determination process, the power interruption command transmission process, the normal time command transmission process, and the door opening monitoring process are included in the non-game program. As described above, the main control unit 41 sets interrupt prohibition in the timer interrupt process (main), saves the stack pointer and registers of the game program, and then calls these non-game programs. It is like that. Also, when returning from these non-game programs to timer interrupt processing (main), the stack pointer and registers of the game program are returned to the state before the call of the non-game program, and the subsequent processing is performed. It is supposed to run. Since the main control unit 41 is set to prohibit other interrupts during execution of the interrupt process, the subsequent process is executed in the interrupt disabled state even after returning from the non-game program. To do.

  In addition, the power failure determination process, the power interruption command transmission process, the normal time command transmission process, and the door opening monitoring process, which are non-game programs executed in the timer interrupt process (main), must be executed before these non-game programs. Processing that excludes certain processes (for example, port input processing and motor phase signal output processing that need to be executed before the branch of the timer interrupt), that is, control effects that are performed before or after the non-game program It is designed to be executed before processing without any error.

  Next, the power interruption process executed by the main control unit 41 will be described.

  FIG. 18 illustrates the power interruption process (main) executed after the power interruption command transmission process when the main control unit 41 determines that the power interruption flag is set in the timer interrupt process (main) described above. It is a flowchart which shows the control content. In the present embodiment, the power interruption process is included in the game program.

  In the power interruption process (main), the main control unit 41 first saves all the registers that may be used in the stack area (Se1).

  Next, all output ports including the parallel output port 513 that outputs a command are initialized (Se2). As a result, the output state of the output port corresponding to the last command output by the power interruption command transmission process is initialized. Then, the destruction diagnosis data is set in the game RAM area (Se2). Destructive diagnosis data is 5A (H), that is, a value including 1 in any bit. Next, the RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of all areas of the game RAM area (including the unused area 3) becomes 0, and all the game stack areas The RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of the areas (unused area 3, game stack area (unused) and game stack area (in use)) becomes 0 ( Se4), prohibiting access to the RAM 41c (Se5). Thereafter, the voltage decreases, and the CPU 41a of the main control unit 41 stops and shifts to a standby state. Then, as the voltage decreases while in this standby state, the main control unit 41 is internally in an operation stop state and reliably stops operation in the event of a power interruption.

  In this embodiment, the adjustment data is set in the target area so that the calculation result of the target area in the power interruption process becomes a specific value (0 in this embodiment), and the target data is set in the start process. Whether or not the data in the RAM 41c is normal is determined based on whether or not the calculation result of the area to be a specific value. The calculation result of the area to be processed in the power interruption process and the area to be processed in the start-up process It may be configured to determine whether or not the data in the RAM 41c is normal depending on whether or not the result of the calculation matches. The calculation method is not limited to exclusive OR, and other calculation methods (for example, summation) may be used.

  In this embodiment, the RAM parity adjustment data 1 is calculated using the data stored in all areas of the game RAM area including the unused area 3 in the power interruption process, and the unused area 3 is determined in the startup process. Whether or not the RAM 41c is normal is determined based on the RAM parity calculated using the data stored in all of the game RAM areas including it, and an invalid program is stored in the unused area 3. If it is determined that the RAM is abnormal, it is possible to prevent an unauthorized program from being stored in the unused area 3.

  In this embodiment, RAM parity adjustment data is calculated using data stored in all areas of the game RAM area including the unused area 3 in the power interruption process, and the unused area 3 is included in the activation process. The RAM parity adjustment of the game RAM area including the unused area 3 is configured to determine whether or not the RAM 41c is normal based on the RAM parity calculated using the data stored in all areas of the game RAM area. Data is calculated and set in the game RAM area, and RAM parity adjustment data in the non-game RAM area is calculated and set in the non-game RAM area, and stored in the game RAM area including the unused area 3 in the startup process. RAM parity calculated using the calculated data and RAM parity calculated using the data stored in the non-game RAM area RAM41c may be determined configure whether normal or not based. In such a configuration, if an illegal program is stored in the game RAM area or the non-game RAM area, it is determined that the RAM is abnormal. Therefore, the illegal program is in either the game RAM area or the non-game RAM area. Can be prevented from being stored.

  As described above, in the present embodiment, the main control unit 41 starts in an interrupt-disabled state when a reset occurs, and then interrupts the program at the start of the initial setting process to be executed first. Prohibition is performed, and it is possible to prevent an unintended interrupt from occurring even when the main control unit 41 is activated in a state where the interrupt is not prohibited for some reason.

  In addition, the main control unit 41 is configured to permit the interrupt after setting the timer interrupt in the timer circuit 509 after the activation, and the interrupt is generated in a state where the timer interrupt does not operate normally. Can be prevented. In the timer circuit 509, the timer is initialized by setting the timer interrupt, and the timer starts counting from the initial value. After starting, the time until the first interrupt occurs Timer interrupts can be generated at regular time intervals without any deviation from the time until the second and subsequent interrupts are generated. In addition, the main control unit 41 is configured to update the setting of the timer circuit 509 to the initial value by a program in the initial setting process, and when the setting of the timer circuit 509 is rewritten for some reason at the time of activation. Even if it exists, it can prevent that the unintended interruption generate | occur | produces.

  Further, the main control unit 41 proceeds to the setting change process if the setting key switch 37 is in an ON state at the time of activation, and initializes the RAM 41c at the start of the setting change process. At this time, if the data in the RAM 41c is normal, the special work is held and other usable areas, that is, the game RAM area excluding the special work, the unused area 3, and the non-game RAM area are initialized. Even after the setting is changed, a part of the control state (setting value, gaming state, etc.) before the change can be held, but if the data in the RAM 41c is not normal, all the usable areas are initialized. As a result, the abnormality in the data of the RAM 41c can be surely solved.

  The main control unit 41 sets a RAM abnormality flag when a RAM abnormality is determined. Therefore, the RAM parity is 0 when the power is turned off after the RAM abnormality error occurs and the power is turned on again. Yes, even if it is determined that the destruction diagnosis data is normal, it is possible to determine whether the data in the RAM 41c is destroyed based on the RAM abnormality flag.

  Moreover, the main control part 41 performs the main process which processes in steps according to progress of a game for every game unit after completion | finish of a setting change process. In the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. After the setting change process, the main process starts from the stage before the process of initializing the RAM 41c in the main process. The initialization of the RAM 41c after the setting change process is completed and the game unit It is possible to perform initialization of the RAM 41c for each process by common processing.

  Further, when the RAM 41c is initialized, the main control unit 41 prohibits interrupts until the initialization is completed, and the timer interrupt process (main) is performed during the initialization of the RAM 41c. Occurrence can prevent the initialized contents from being changed and the processing performed in the timer interrupt processing (main) from being performed normally.

  Further, the main control unit 41 updates the output state of the external output signal in the main process, and changes the output state of the external output signal in the subsequent timer interrupt process (main) based on the updated output state. In addition, when updating the output state of the external output signal, interrupts are prohibited until the update is completed, and timer interrupt processing (main) occurs before the output state of the external output signal is completed By doing so, it is possible to prevent an external output signal indicating unintended data from being output.

  The main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program that is called by the game program and is not related to the progress of the game. It is possible to execute a main process based on a program and interrupt a main process at a predetermined time interval to execute a timer interrupt process (main) based on a game program. It is also possible to call and execute a non-game program from (main).

  In such a configuration, the main control unit 41 may malfunction due to the execution of the timer interrupt process (main) while the non-game program is being executed.

  On the other hand, the main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program that is called by the game program and is not related to the progress of the game. It is possible to execute the main process based on the game program, interrupt the main process at every predetermined time interval, and execute the timer interrupt process (main) based on the game program. In a configuration in which a non-game program can be called and executed from the timer interrupt process (main), when calling a non-game program from the main process, When calling a non-game program from a timer interrupt process (main) while calling a non-game program, In other words, when a non-game program is called in a situation where there is a low possibility that an interrupt will occur, the non-game program is called without setting the interruption of other processes to be prohibited. It is possible to reduce the program capacity related to the prohibition of interruption while preventing malfunction due to execution of interruption.

  The timer interrupt process (main) executed by the main control unit 41 of the present embodiment is a process by a game program, for example, an LED dynamic display process, a control signal output process, etc., and a process by a non-game program, for example, normal time It consists of a plurality of processes including a command transmission process, a command transmission process at power interruption, etc., and a process by a predetermined game program among a plurality of processes constituting the timer interrupt process (main) In particular, since a non-game program is called before a process that can be executed before or after these non-game programs, that is, a plurality of processes constituting a timer interrupt process (main) Because the non-game program is called as early as possible, the timer interrupt processing (main) is not terminated for some reason. Even if the Ma interrupt interrupt had occurred doubly generated, it is possible to prevent the other interrupts during execution of a non-game program from being executed.

  The main control unit 41 of the present embodiment is capable of executing a game program and a non-game program, a game stack area for saving data used by the game program, and a non-game stack area for saving data used by the non-game program Are provided separately, and the main control unit 41 saves the data used by the game program and the data used by the non-game program in the stack area provided separately. Management becomes easier. In particular, data used by a game program saved due to the occurrence of a timer interrupt and data used by a non-game program executed during execution of timer interrupt processing (main) are mixed and stored in one stack area. As a result, stack management is not complicated.

  When executing the non-game program, the main control unit 41 according to the present embodiment saves the register values used in the game program in the game stack area, and then calls the non-game program to perform processing in the non-game program. When the processing in the non-game program is completed, the saved register value is restored, so that the register value used by the game program is not changed as the non-game program is executed. it can.

  When calling a non-game program from a process based on the game program, the call common process 1 or the call common process 2 for saving the register value used in the game program to the game stack area is called. By sharing a program for executing a non-game program in processing, the program capacity can be reduced.

  In this embodiment, when the non-game program is called from the process based on the game program in the main process, the call common process 1 is executed, while the non-game program is called from the process based on the game program in the timer interrupt process. In this case, the call common process 2 different from the call common process 1 is executed to save the register value used in the game program to the game stack area. In the main process, the process based on the game program is performed. The non-game program may be called from the process based on the game program in the timer interruption process, and the common call common process may be executed.

  The main control unit 41 of the present embodiment is configured to be able to call and execute a non-game program from the main process and from the timer interrupt process (main). When calling, set the interrupt of other processes to be prohibited and call the non-game program, while when calling the non-game program from the timer interrupt process (main), disable the interrupt of other processes The main control unit 41 is configured to call a non-game program from the main process, or to call a non-game program from the timer interrupt process (main). It is good also as a structure which prohibits the interruption of this process.

  Specifically, when calling the non-game program from the process based on the game program during the execution of the main process, the main control unit 41 executes the call common process 1 as in the present embodiment, while the timer interrupt When calling a non-game program from a process based on a game program during the execution of the process, as shown in FIG. 23, in the game program, the start address of the non-game program to be called is set in a register, and the call common process 3 is executed. Similar to the call common process 1, the call common process 3 is a process included in the game program. In the call common process 3, the register of the game program is saved in the game RAM area and the stack pointer (SP, game stack area) is saved. Is saved in the SP save area of the game RAM area, and then the timer interrupt is disabled by setting the value of the interrupt master enable flag to a value indicating interrupt prohibition, Thereafter, the non-game program at the address set in the register is called.

  On the other hand, the called non-game program sets the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program and executes the processing of the non-game program. Returning to the calling game program, that is, the call common processing 3. After returning to the call common process 3, the call common process 3, like the call common process 2, is based on the data saved in the game RAM area, and registers the stack pointer of the register and the game program, and the non-game program. Return to the state before calling and exit. That is, in the call common process 3, the interrupt prohibition is maintained even after the non-game program ends without setting the value of the interrupt master permission flag after the non-game program process ends.

  In such a configuration, the main control unit 41 prohibits interruption of other processes not only when calling a non-game program from the main process but also when calling a non-game program from the timer interrupt process (main). Therefore, similarly to the present embodiment, it is possible to prevent malfunction due to interruption being executed during execution of the non-game program.

  In particular, when the timer interrupt process (main) is executed, the interrupt prohibition is set, and when the timer interrupt process (main) ends, the interrupt prohibition is canceled, so that the timer interrupt process (main) Interruption of other processes will be prohibited during execution, but even in this case, when calling a non-game program from the timer interrupt process (main), interrupts of other processes are prohibited again. Even when the interrupt prohibition setting is canceled due to the cause, it is possible to prevent malfunction due to the interrupt being executed during the execution of the non-game program.

  In addition, when executing timer interrupt processing (main) as described above, interrupt prohibition is set, and when the timer interrupt processing (main) ends, timer prohibition is canceled, so timer interrupt processing In the configuration where interrupts of other processes are prohibited during execution of (main), but when interrupts of other processes are prohibited again when a non-game program is called from the timer interrupt process (main) By maintaining the setting of prohibition of interrupts of other processes set at the time of calling the non-game program even after the non-game program ends, the non-game It is possible to prevent the prohibition of interrupts from being canceled by executing the program.

  Next, initialization of the RAM 41c of the main control unit 41 will be described with reference to FIG.

  The main control unit 41 of this embodiment initializes the game RAM area, the unused area 4, and the non-game RAM area when it is determined that the stored contents of the RAM 41c are destroyed at the start of the setting change process. That is, initialization 0 for initializing all areas of the usable area is performed.

  In addition, when it is determined that the stored contents of the RAM 41c are not destroyed at the start of the setting change process, the game RAM area except the special work area, the unused area 4, and the non-game RAM area are initialized. That is, initialization 1 for initializing an area other than the special work in the usable area is performed.

  At the end of the setting change process, the important work, the general work, the unused area 3 and the game stack area (unused) in the game RAM area are initialized, that is, the special work and the game stack area in the game RAM area. Initialization 2 is performed to initialize areas other than (in use).

  Also, at the end of a specific game state and at the end of one game, initialization 3 is performed to initialize the general work, the unused area 3 and the game stack area (unused) in the game RAM area.

  Also, at the end of one game, not at the end of a specific game state, initialization 4 is performed to initialize the unused area 3 and the game stack area (unused) in the game RAM area.

  As described above, the main control unit 41 according to the present embodiment performs initialization 0 to 4 when a predetermined condition is satisfied, and among the usable areas of the RAM 41c when the first condition is satisfied as the predetermined condition. When at least a part of the game RAM area in which data used by the game program is stored is initialized and the second condition is established as a predetermined condition, at least a part of the game RAM area and the usable area of the RAM 41c At least a part of the non-game RAM area used by the non-game program is initialized.

  Specifically, as shown in FIG. 19, as a first condition, at the end of one game, an unused area 3 and a game stack area (unused) that are part of the game RAM area among the available areas. Is initialized, but the non-game RAM area of the usable area is not initialized. In addition, as a first condition, at the end of a specific gaming state, a general work, an unused area 3 and a game stack area (unused) that are part of the gaming RAM area among the available areas are initialized. Of the possible areas, the non-game RAM area is not initialized. Also, as the first condition, after the setting change state is finished, the important work, the general work, the unused area 3, and the game stack area (unused) that are a part of the game RAM area among the available areas are initialized. However, the non-game RAM area in the usable area is not initialized.

  On the other hand, as a second condition, when there is no abnormality in the RAM when the setting change state is started, an important work, a general work, an unused area 3 that is a part of the game RAM area among the usable areas, The game stack area (unused) and the game stack area (used) are initialized, and all the non-game RAM areas are initialized. If the RAM is abnormal when the setting change state is started, all the game RAM areas in the usable area are initialized and all the game RAM areas are initialized.

  The main control unit 41 of this embodiment is capable of executing a game program related to the progress of the game and a non-game program that is called by the game program and is not related to the progress of the game. A ROM 41d for storing programs is provided.

  In such a configuration, when a game program and a non-game program are mixed in one ROM 41d, it is difficult to determine which program is a program related to the progress of the game.

  On the other hand, in the present embodiment, the ROM 41d includes a game program area in which a game program is stored and a non-game program area in which a non-game program is stored. Since the areas are assigned separately, the game program and the non-game program can be easily specified according to the difference in the storage area.

  In addition, the main control unit 41 of the present embodiment is used as a game program work, and stores a game RAM area for storing data used by the game program, and a non-game program work and stores data used by the non-game program. The RAM 41c includes a non-game RAM area, and since the game RAM area and the non-game RAM area are separately allocated in the RAM 41c, the data used by the game program and the non-game program are used. The main control unit 41 initializes at least a part of the game RAM area when the first initialization condition is satisfied, and can specify the data. When the initialization condition 2 is satisfied, at least a part of the game RAM area is initialized and To initialize at least a portion of the non-gaming RAM area, it is possible to initialize the appropriate data in accordance with the status of the data used by data and non-game programs used by the game program stored in the RAM 41c.

  The main control unit 41 of the present embodiment initializes the unused area 3 and the game stack area (unused), which are part of the game RAM area, when the first game is completed as a first initialization condition. As a first initialization condition, when a special game state (BB) is finished and when one game is finished, a general work that is a part of the game RAM area, an unused area 3 and a game stack When the area (unused) is initialized and the setting change is completed and the main process is started as the first initialization condition, the important work and general work areas that are part of the game RAM area are not used. Since the use area 3 and the game stack area (unused) are initialized, appropriate data can be initialized according to the situation.

  In addition, as a second initialization condition, the main control unit 41 of the present embodiment, when there is no abnormality in the RAM at the start of setting change, important work, general work, unused area that are part of the game RAM area 3. A game stack area (unused) and a game stack area (in use) are initialized, and among the non-game RAM areas, an area that is referenced from a game program, an area that is not referenced from a game program, and a non-game stack area ( Unused) and non-game stack areas (in use), that is, all areas of the non-game RAM area are initialized, and when there is an abnormality in the RAM at the start of setting change as a second initialization condition, Among them, special work, important work, general work, unused area 3, game stack area (unused) and game stack area (in use), that is, game R In addition to initializing all areas of the M area, of the non-game RAM area, an area that is referenced from the game program, an area that is not referenced from the game program, a non-game stack area (unused), and a non-game stack area (in use) ) In other words, in order to initialize all areas of the non-game RAM area, data appropriate for the situation is initialized among data used by the game program stored in the RAM 41c and data used by the non-game program. can do.

  The main control unit 41 according to the present embodiment is configured to initialize a part of the game RAM area when the first initialization condition is satisfied. What is necessary is just to initialize at least a part of the game RAM area when the initialization condition is satisfied, and it is also possible to initialize all areas of the game RAM area.

  In addition, the main control unit 41 of the present embodiment is configured to initialize a part of the game RAM area and initialize all areas of the non-game RAM area when the second initialization condition is satisfied. However, the main control unit 41 initializes at least a part of the game RAM area when the second initialization condition is satisfied, and initializes at least a part of the non-game RAM area. It is sufficient that all areas of the game RAM area are initialized, all areas of the non-game RAM area may be initialized, or at least a part of the non-game RAM area is initialized. It is also possible to initialize all areas of the game RAM area and the non-game RAM area.

  The main control unit 41 of this embodiment is configured as a program that initializes the game RAM area and a program that initializes the non-game RAM area as separate programs, so that the game program is stored in the non-game RAM area. Since it is not necessary to initialize, the capacity of the game program can be reduced. Further, the program for initializing the game RAM area can be shared both when the first initialization condition is satisfied and when the second initialization condition is satisfied. Furthermore, since a program for initializing the game RAM area is provided as a game program, and a program for initializing the non-game RAM area is provided as a non-game program, the game program initializes the non-game RAM area, It is possible to prevent the game program from affecting the non-game program and the non-game program from affecting the game program without initializing the area.

  The main control unit 41 of the present embodiment sets the game end time process setting in the main process as the first initialization condition, and determines that it is not the end of the specific game state, that is, one game is ended. When the game ends, the start address of the initialization target RAM is set, and a predetermined area of the game RAM area is initialized by executing the game area initialization process, so that the game progresses for each game unit. A part of the unnecessary game RAM area can be initialized.

  The main control unit 41 of the present embodiment is activated when the setting key switch 37 is ON and starts the setting change process, that is, the second initialization condition is established based on the setting change operation being performed. The game area initialization process is executed to initialize a predetermined area of the game RAM area, and the non-game area initialization process is executed to initialize the predetermined area of the non-game RAM area. Thus, both the game RAM area and the non-game RAM area can be initialized based on a game store clerk setting change operation (initialization operation).

  The game RAM area of the RAM 41c of this embodiment includes an unused area 3 that is not used when performing control based on a game program or when performing control based on a non-game program, and the first initialization condition Since the unused area 3 is initialized both when and when the second initialization condition is satisfied, it is possible to prevent illegal data from being stored in the unused area 3.

  In this embodiment, the unused area 3 is initialized both when the first initialization condition is satisfied and when the second initialization condition is satisfied, but at least when the first initialization condition is satisfied. If the configuration is such that the unused area 3 is initialized when either one of the conditions when the second initialization condition is satisfied, illegal data can be prevented from being stored in the unused area 3. If the first initialization condition includes a plurality of conditions, invalid data is stored in the unused area 3 if the unused area 3 is initialized when at least one of the conditions is satisfied. Can be prevented. The same applies even if the second initialization condition includes a plurality of conditions.

  The main control unit 41 according to the present embodiment is used as a game program work, a game RAM area that stores data used by the game program, and a non-game program work that is used as a non-game program work. A RAM 41c including a game RAM area, and the RAM 41c is configured to retain data stored in the RAM 41c for a predetermined period even when power supply to the slot machine 1 is stopped by a backup power source. When the power supply to the slot machine 1 starts, the control unit 41 starts an initial setting process, and whether or not the storage content of the RAM is normal based on the data stored in the RAM 41c held by the backup power source. The data stored in the RAM 41c is determined to be normal. Based resume control.

  In such a configuration, when the power supply to the slot machine 1 is started, whether the storage contents of the RAM are normal based on the data stored in both the game RAM area and the non-game RAM area of the RAM 41c. When this is determined, the load when the control is resumed based on the data stored in the RAM 41c becomes excessive.

  On the other hand, the main control unit 41 of this embodiment starts the initial setting process when the power supply to the slot machine 1 is started, and the RAM in the game RAM area of the RAM 41c held by the backup power source. It is determined whether or not the stored contents of the RAM are normal based on the parity and the destructive diagnosis data stored in the game RAM area, and if it is determined to be normal, the data stored in the game RAM area and the non-game Control is restarted based on the data stored in the RAM area, and whether or not the non-game data stored in the non-game RAM area and that does not interfere with the game progress is normal. By omitting the determination, it is possible to reduce the load at the time of resuming the control while ensuring that the game can proceed normally.

  The game RAM area of the RAM 41c of this embodiment includes an unused area 3 that is not used when performing control based on a game program or when performing control based on a non-game program. The unit 41 executes an initial setting process when power supply to the slot machine 1 is started, calculates a RAM parity of the game RAM area including the unused area 3 in the initial setting process, and calculates the calculated RAM Since it is determined whether or not the stored contents of the game RAM area are normal based on the parity, it is possible to prevent illegal data from being stored in the unused area 3.

  The main control unit 41 according to the present embodiment executes an initial setting process when power supply to the slot machine 1 is started, and determines whether or not the storage content of the RAM 41c is destroyed in the initial setting process. When it is determined that the stored contents of the RAM 41c are destroyed, the RAM abnormality flag is set to control the error processing, and thereafter the error state is maintained without being automatically restored, while the setting key switch 36 When the power supply to the slot machine 1 is started in the state of ON, control is made to the setting change process, the game area initialization process is executed to initialize the game RAM area, and the non-game area initialization The process is executed to initialize the non-game RAM area, that is, both the game RAM area and the non-game RAM area are initialized when the error state is canceled. While game any abnormality has occurred in the RAM area and the non gaming RAM area can be prevented from proceeding.

  When the main control unit 41 of this embodiment determines that the stored contents of the RAM 41c are destroyed in the initial setting process when power supply to the slot machine 1 is started, the main control unit 41 sets a RAM abnormality flag. Then, when the setting key switch 36 is ON, the power supply to the slot machine 1 is started and the setting change process is executed. The main control unit 41 is configured to initialize both the RAM area and the non-game RAM area, but when the power supply to the slot machine 1 is started, the stored contents of the RAM 41c are destroyed in the initial setting process. When it is determined that the game RAM area is determined, both the game RAM area and the non-game RAM area may be initialized and controlled to error processing. In such a configuration, when controlling to error processing, both the game RAM area and the non-game RAM area are initialized, so that either the game RAM area or the non-game RAM area is abnormal as in this embodiment. It is possible to prevent the game from proceeding with the occurrence of In addition, when it is determined that the storage contents of the RAM 41c are destroyed, both the game RAM area and the non-game RAM area may be initialized both when the setting change process is executed thereafter. Even with the configuration, it is possible to prevent the game from proceeding with an abnormality occurring in either the game RAM area or the non-game RAM area.

  The main control unit 41 of the present embodiment executes the power interruption process when the power supply to the slot machine 1 is stopped and the power interruption detection circuit 48 detects a decrease in the power supply voltage. In the power interruption process, the RAM 41c Access to both the game RAM area and the non-game RAM area is prohibited by prohibiting access to the non-game RAM area that is not subject to determination as to whether or not the data is destroyed at the next startup. Thus, it is possible to prevent illegal data from being stored.

  Next, a timer counter for measuring a time interval used by the main control unit 41 for game progress control and the like will be described with reference to FIGS.

  When the timing start condition is satisfied, the main control unit 41 sets an initial value corresponding to the timing time as the timer value of the timer counter assigned to the game RAM area of the RAM 41c, and in the timer interrupt process (main) The timer value is periodically subtracted, and when the timer value becomes 0, it is specified that the time has elapsed.

  Specifically, when a timing start condition is established in the main process, the main control unit 41 sets an initial value of a timer value corresponding to the timing time in an area to which a timer counter corresponding to the condition is assigned. The set timer value is decremented by 1 until it becomes 0 every 2.24 ms in the time counter update process of the timer interrupt process (main).

  Then, in the main process, as shown in FIG. 20, the address of the corresponding timer counter is acquired (Si1), the acquired value is read (Si2), and it is determined whether the read value is not 0 (Si3). If it is determined that the read value is 0, it is determined that the time has elapsed.

  As shown in FIG. 21, the timer counter used in this embodiment has an initial value of 1 byte timer A, 1 byte timer B, 1 byte timer C, an initial value exceeding 1 byte, and an initial value exceeding 2 bytes. 2 byte timer A, 2 byte timer B, 2 byte timer C, 2 byte timer D are included.

  The 1-byte timer is a timer for measuring a relatively short period that can be measured with a timer value within 1 byte. For example, an external output signal timer that measures an output period of an external output signal, an LED output update period LED update timer that measures the time, stop invalid timer that measures the period until the stop operation is validated after detection of the stop operation, wait for payout that measures the period until the medal payout starts after the reel stops Timer, insertion detection timer for measuring the period after the insertion medal sensor 31 is detected ON, insertion slot detection timer for measuring the period after the detection of the insertion slot sensor 26 is detected, and ON of the dispensing sensor 34c are detected There are a payout detection timer for measuring a period after being started, a start-up timer for measuring a period from the start of reel rotation until the stop operation becomes effective. Among these, the stop invalid timer, the payout waiting timer, and the start timer do not cross the timing at which one game ends, but the external output signal timer, the LED update timer, the input detection timer, the input port The detection timer and the payout detection timer may straddle the timing at which one game ends with the time measured by these timers.

  The 2-byte timer is a timer for measuring a relatively long period that cannot be measured with a timer value within 1 byte. For example, a 1-game time timer that measures a specified time (about 4.1 seconds) required for 1 game. , A security signal timer for measuring the minimum output period of the security signal among the external output signals, a standby time timer for measuring a period from the end of the game, and a hopper empty for measuring a period in which the payout sensor 34c is not detected after the hopper motor 34b is driven. There is a timer. Of these, the waiting time timer and the hopper empty timer do not straddle the timing when one game ends, but the one gaming time timer and the security signal timer have one measuring time measured by these timers. There are times when the timing of the end of.

  As described above, the timer counter is a timing at which one game ends, that is, a timing at which a part of the RAM 41c is initialized as the game progresses (a part of the RAM 41c at the end of one game or at the end of a specific gaming state). Including a timer counter that measures a measurement period spanning the timing at which a part of the RAM 41c is initialized in accordance with the progress of the game. The counter is also assigned to a special work that is not initialized at the timing according to the progress of the game.

  Among these timer counters, the 1-byte timers A to C are allocated to the consecutive 3 byte areas (804CH to 804EH) of the RAM 41c one byte at a time, and the 2-byte timers A to D are the continuous 8-byte RAM 41c. Two bytes are allocated to the area (804FH to 8055h). Further, the 1-byte timers A to C and the 2-byte timers A to D are also assigned to continuous areas of the RAM 41c. Hereinafter, an area to which the 1-byte timers A to C are allocated is referred to as a 1-byte timer group, and an area to which the 2-byte timers A to D are allocated is referred to as a 2-byte timer group. That is, both the 1-byte timer group and the 2-byte timer group are set in an area to which consecutive addresses are assigned according to a predetermined rule. The area to which consecutive addresses are assigned according to a predetermined rule is, for example, an area to which an address added by N (N is a natural number) from the start address and the start address is assigned.

  FIG. 22 is a flowchart showing the control contents of the time counter update process.

  In the time counter update process, first, the number of 1-byte timer counters to be updated (3 in this embodiment) is set as the number of processes for 1 byte (Sj1), and the start address (804CH) of the 1-byte timer group is set. A pointer is set (Sj2).

  Next, if the value of 1 byte stored at the specified address (address indicated by the pointer) is not 0, 1 is subtracted from the value of 1 byte of the specified address (Sj3), and 1 is subtracted from the number of times set in the step of Sj1. (Sj4), it is determined whether the number of processes after subtraction is 0 (Sj5).

  If the number of processes after subtraction is not 0 in step Sj5, that is, if all 1-byte timers have not been updated, 1 is added to the pointer (Sj6), and the process returns to step Sj3. As a result, the pointer moves to the address of the unprocessed 1-byte timer, and if the 1-byte value of the designated address is not 0, the pointer is subtracted.

  When the number of processes after subtraction in step Sj5 is 0, that is, when all the 1-byte timers have been updated, the number of 2-byte timer counters to be updated as the number of 2-byte processes (this embodiment) Then, 4) is set (Sj7), and the pointer is incremented by 1 (Sj8). As a result, the pointer moves to the start address (804FH) of the 2-byte counter group.

  Next, if the 2-byte value stored in the area consisting of the designated address (address indicated by the pointer) and the next address is not 0, the 2-byte value of the designated address and the next address is decremented by 1 (Sj9), and Sj7 1 is subtracted from the number of processes set in step (Sj10), and it is determined whether or not the number of processes after subtraction is 0 (Sj11).

  If the number of processes after the subtraction is not 0 in step Sj11, that is, if all the 2-byte timers have not been updated, the pointer is incremented by 2 (Sj12), and the process returns to step Sj9. As a result, the pointer moves to the address of the unprocessed 2-byte timer, and if the 2-byte value of the designated address and the next address is not 0, the pointer is subtracted.

  If the number of processes after subtraction in step Sj11 is 0, that is, if all the 2-byte timers have been updated, the process ends.

  As described above, in this embodiment, the value of the timer counter assigned to the RAM 41c is periodically updated to become a specific value (0), thereby specifying the passage of time. Conventionally, when measuring multiple types of time intervals, timer values are set and updated within multiple types of processing that require timekeeping, and each type of program for updating multiple types of timer values is processed. Since it is necessary to provide it inside, it was a factor which increased program capacity. In addition, since multiple types of timer counters are assigned as data groups for each process used, it is necessary to read out the values of unrelated addresses in order to update all of them in one process. there were.

  On the other hand, in this embodiment, an area in which a plurality of types of timer counter values are stored is set to an area to which consecutive addresses are assigned according to a predetermined rule in the RAM 41c, and the timer value stored in the designated address is Since multiple types of timer values are updated by repeatedly executing the update process while changing the specified address for the area where multiple types of timer counter values are stored by adding a constant to the current specified address Thus, the program capacity can be reduced as compared with the case where each of the processes for designating a plurality of types of addresses and updating the values of the addresses is performed in the individual processes.

  Multiple types of timers can be obtained by repeatedly executing the process of updating the timer value stored at the specified address while changing the specified address for the area where the multiple types of timer counter values are stored by performing a predetermined calculation. Any configuration may be used as long as the value is updated. For example, by adding a constant to the current designated address, multiple types can be obtained by repeatedly executing while changing the designated address for an area in which multiple types of timer counter values are stored. The timer value may be updated, or a value corresponding to the number of processes with respect to the reference address (for example, for a 1-byte counter, +1 for the number of processes 1, +1 for the number of processes 2, and the number of processes While changing the designated address for the area where multiple types of timer counter values are stored by adding or subtracting +3 ...) for 3 Ri may be configured to update a plurality of types of the timer value by return run.

  In the present embodiment, the configuration includes seven types of timer counter values of 1-byte timers A to C and 2-byte timers A to D. However, at least two types of timer counter values are determined according to a predetermined rule of the RAM 41c. In the process of updating the timer value stored in the specified address, the specified address for the area in which multiple types of timer values are stored is changed by performing a predetermined operation. However, if the configuration is such that two or more types of timer values are updated by repeated execution, the program capacity can be reduced as described above.

  In addition, only one of the 1-byte timer and 2-byte timer is set to set the timer counter value in an area to which consecutive addresses are assigned according to a predetermined rule in the RAM 41c, and update the timer value stored in the designated address. A configuration in which a plurality of types of timer values are updated by repeatedly executing a predetermined calculation while changing a designated address for an area in which a plurality of types of timer values are stored may be employed.

  Further, only for some of the timer counters provided in the main control unit 41, a process of setting a timer value in an area to which consecutive addresses are assigned according to a predetermined rule in the RAM 41c and updating the timer value stored in the designated address, A configuration in which a plurality of types of timer values are updated by repeatedly executing a predetermined calculation while changing a designated address for an area in which a plurality of types of timer values are stored may be employed.

  In this embodiment, a separate timer counter is provided for each type of period to be measured. For example, a single timer counter may be shared for a plurality of types of periods in which the measurement periods do not overlap.

  In the present embodiment, the main control unit 41 executes the process according to the timer interruption process (main) for periodically performing a predetermined process regardless of the progress of the game and the progress of the game. A main process that performs different processes in stages, and the main control unit 41 sets an initial value to the timer counter when a timing condition is satisfied in the main process, and a plurality of types of timer interrupt processes (main) The timer value is updated, and it is not necessary to provide a process for updating multiple types of timer values in each process constituting the main process, so the program capacity for updating multiple types of timer values is reduced. be able to.

  In this embodiment, the timer interrupt process (main) is executed by periodically interrupting the main process. However, in the timer interrupt process periodically performed, it is determined in advance regardless of the progress of the game. The main control unit 41 may be configured to perform both a periodic process for performing the processed process and a main process for performing a process that varies stepwise depending on the progress of the game. By setting an initial value to the timer counter when the timing condition is satisfied in the process and updating multiple types of timer values in the periodic process, multiple types of timer values are set in each process constituting the main process. Since it is not necessary to provide a process for updating, it is possible to reduce the program capacity related to updating of a plurality of types of timer values.

  Further, in this embodiment, in the time counter update process, the value of the address is updated on condition that the value of the designated address is not 0, and the timer value is updated to an abnormal value. Can be prevented.

  Further, in this embodiment, in the time counter update process, the number of processes equal to the number of timer counters to be updated is set, and the process of updating the timer value is repeatedly executed for the set number of processes. The number of timer counters to be updated can be easily set. For example, when a plurality of types of timer counters having different update intervals are provided, the type of timer value to be updated can be arbitrarily set according to the number of processes to be set. it can.

  Note that the number of processes, that is, the number of timer counters to be updated may be set in a program, or values set in a table may be read and set.

  In addition, the timer counter to be updated last is set in advance without setting the number of processes at the beginning, and the timer value is updated repeatedly until the address of the timer counter is reached. It is also possible to store a specific end value (for example, FFh) at the next address of the timer counter, and to repeatedly execute the process of updating the timer value until the value read from the specified address becomes the specific end value. good.

  In this embodiment, a 1-byte timer counter and a 2-byte timer counter are provided, and a process for updating a 1-byte timer value and a process for updating a 2-byte timer value are separately provided. Therefore, the capacity of the program and the capacity occupied by the timer value in the RAM 41c can be reduced as compared with the case where the process of updating the 1-byte timer value and the process of updating the 2-byte timer value are made common.

  In this embodiment, a relatively long time corresponding to an initial value exceeding 1 byte is measured by providing a 2-byte timer counter. For example, a timer counter having a different update interval, for example, a timer, is used. Interrupt processing (main) By providing a first timer counter that is updated once every four times and a second timer counter that is updated once every fourteen times, a relative value can be obtained without providing a 2-byte counter. It is also possible to employ a configuration for measuring a long time interval. By doing so, it is not necessary to provide a process for updating a 1-byte timer value and a process for updating a 2-byte timer value. It is possible to reduce the program capacity related to the update.

  In the present embodiment, a plurality of types of timer counters are assigned to special works that are not initialized in accordance with the progress of the game in the RAM 41c, and are not initialized in accordance with the progress of the game. Regardless of the progress of the game, it is possible to measure the time spanning the timing when a part of the RAM 41c is initialized in accordance with the progress of the game.

  In particular, in this embodiment, not only the timer counter that may cross the timing when the measurement period ends in one game, that is, the timing at which a part of the RAM 41c is initialized as the game progresses, Since the timer counter that does not cross over the timing at which a part of the RAM 41c is initialized according to the progress is stored in the area assigned to the special work together with other timer counters, the timer counter can be easily managed. In addition, a timer counter that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game is set, and a timing at which a part of the RAM 41c is initialized at the measurement period according to the progress of the game. The usage of the timer counter can be easily changed by a later design change, such as changing to a timer counter that may straddle. It can be. In addition, as described above, if a single timer counter is shared for a plurality of types of periods in which measurement periods do not overlap, the timing at which a part of the RAM 41c is initialized may be crossed as the game progresses. It is possible to measure the measurement period and the measurement period that does not cross the timing at which a part of the RAM 41c is initialized in accordance with the progress of the game with one timer counter.

  Although the embodiments of the present invention have been described with reference to the drawings, the present invention is not limited to these embodiments, and modifications and additions within the scope of the present invention are included in the present invention. Needless to say.

  In the above-described embodiment, the example in which the present invention is applied to a slot machine in which bets are set using medals and credits as game values has been described. However, slots for setting bets using game balls as game values. The present invention may be applied to a machine or a fully credit type slot machine that sets a bet amount using only credit as a gaming value. When using a game ball as a game value, for example, one medal can correspond to five game balls, and when 3 is set as the number of bets in the above embodiment, 15 game balls are used. This is equivalent to setting the number of bets using.

  Further, the present invention is not limited to the use of only one of a plurality of types of game values such as medals and game balls, for example, a combination of a plurality of types of game values such as medals and game balls. It may be. That is, it is possible to play a game by setting the number of bets using any of a plurality of types of gaming values such as medals and game balls, and a plurality of types of games such as medals and game balls when a winning occurs. You may apply the slot machine which can pay out all of utility values.

  In the above embodiment, a slot machine as a gaming machine is applied. However, the gaming machine is not limited to the slot machine 1, and is not limited to the slot machine 1. In particular, a game program and a non-game program can be executed, and the above-described configuration for initializing the RAM 41c, determining a RAM abnormality at the time of activation, and calling a non-game program may be applied.

1 slot machine 2L, 2C, 2R reel 6 MAXBET switch 7 start switch 8L, 8C, 8R stop switch 12 game auxiliary display 41 main control unit 41c RAM
91 Sub control unit 91c RAM

Claims (1)

In gaming machines that perform games,
Storage means having a storage area capable of storing a program;
Control means for performing control based on a program stored in the storage means;
With
The storage area is
A game program area in which a game program related to the progress of the game is stored;
A non-game program area for storing a non-game program that is called by the game program and is not related to the progress of the game;
Including
The control means includes
While performing the basic process based on the game program, interrupt the basic process at predetermined time intervals to execute the interrupt process based on the game program,
The non-game program may be called from both the basic process and the interrupt process.
A gaming machine that prohibits interruption of other processes both when calling the non-game program from the basic process and when calling the non-game program from the interrupt process.

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