JP6677985B2 - Gaming machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine and a slot machine.

  Examples of this type of gaming machine include, for example, a program related to the progress of a game for performing a lottery or an operation of each part in response to an operation of a player, and an abnormality detection that is not directly related to the progress of the game (for example, an abnormal prize). And a program relating to (determination) and the like are mixedly stored in one storage area (for example, see Patent Document 1).

JP 2007-222418 A

  In the gaming machine described in Patent Literature 1, if a program related to the progress of a game and a program not directly related to the progress of a game are mixed in one storage area, which program is related to the progress of the game Is difficult to determine.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a gaming machine that can easily determine a program related to the progress of a game and a program not related to the progress of the game. I do.

The gaming machine of the present invention
In gaming machines that play games,
First storage means having a first storage area capable of storing a program,
Control means for performing control based on a program stored in the first storage means;
A second storage unit having a second storage area capable of storing variation data used when the control unit performs control based on the program;
Holding means for holding data stored in the second storage area for a predetermined period even when power supply to the gaming machine is stopped;
With
The first storage area includes:
A first program area in which a first program is stored;
A second program area in which a second program called by the first program is stored;
Including
The second storage area,
A first variation data area capable of storing first variation data used when the control means performs control based on the first program;
A second variation data area capable of storing second variation data used when the control unit performs control based on the second program;
Including
The first program includes a first initialization program for initializing at least a part of the first variation data,
The second program includes a second initialization program for initializing at least a part of the second variation data,
The control means includes:
When performing control based on the first program, refer to and update the first variation data, refer to the second variation data but do not update,
When performing control based on the second program, refer to and update the second variation data, refer to the first variation data but do not update,
When the power supply to the gaming machine is started, the storage contents are stored based on the first variation data stored in the first variation data area among the data stored in the second storage area by the storage means. Is determined to be normal, and when it is determined to be normal, based on the first variation data stored in the first variation data area and the second variation data stored in the second variation data area. Start control,
In accordance with the progress of the game, it is determined whether or not the initialization condition is satisfied. When it is determined that the initialization condition is satisfied, the initialization by the first initialization program and the second initialization Only initialization by the first initialization program among the initializations by the initialization program,
When the power supply to the gaming machine is started, if it is determined that the storage content is not normal based on the first variation data stored in the first variation data area, the first initialization program the initialization by the initialization and the second initialization program is characterized by individually performed.
The gaming machine of the means 1 of the present invention comprises:
In a gaming machine (slot machine 1) that performs a game,
First storage means (ROM 41b) having a first storage area (game program area, non-game program area) capable of storing a program (game program, non-game program);
Control means (main control unit 41) for performing control based on a program stored in the first storage means;
A second storage unit (RAM 41c) having a second storage area (game RAM area, non-game RAM area) capable of storing variation data used when the control unit performs control based on the program;
Holding means (backup power supply) for holding data stored in the second storage area stage (RAM 41c) for a predetermined period even when power supply to the gaming machine is stopped;
With
The first storage area stage (ROM 41b)
A game program area (game program area) in which a game program (game program) related to the progress of the game is stored;
A non-game program area (non-game program area) which is a program called by the game program and stores a non-game program (non-game program) not related to the progress of the game;
Including
The second storage area (RAM 41c)
A game variation data area (game RAM area) capable of storing game variation data used when the control means performs control based on the game program;
A non-game fluctuation data area (non-game RAM area) capable of storing non-game fluctuation data used when the control means performs control based on the non-game program;
Including
When the power supply to the gaming machine is started, the control means controls the gaming variation data area (game) of the data held in the second storage area (RAM 41c) by the holding means (backup power supply). It is determined whether the storage content is normal based on the gaming variation data stored in the RAM area (determination as to whether or not the RAM is destroyed), and when it is determined that the content is normal, the gaming variation is determined. Control is started based on game variation data stored in a data area (game RAM area) and non-game variation data stored in the non-game variation data area (non-game RAM area). And
According to this feature, a game program area in which a game program related to the progress of the game is stored, a non-game program area in which a program called by the game program and a non-game program not related to the progress of the game is stored, Are separately assigned, so that the game program and the non-game program can be easily specified according to the difference in the storage area. In addition, a game variation data area that can store the game variation data used when performing control based on the game program, and a non-game variation data that can store non-game variation data used when performing control based on the non-game program. Since the variable data area and the variable data area are separately assigned, the variable data for the game and the variable data for the non-game can be easily specified according to the difference in the storage area, and the control means When the power supply to the machine is started, it is determined whether or not the storage content is normal based on the game variation data stored in the game variation data area among the data held in the second storage area by the holding means. And if it is determined to be normal, based on the gaming variation data stored in the gaming variation data and the gaming variation data stored in the non-gaming variation data. Control is started, and by omitting the determination of whether or not non-gaming data that does not hinder the progress of the game is normal, control is resumed while ensuring that the game progresses normally. It is possible to reduce the load when performing.

The gaming machine according to the second aspect of the present invention is the gaming machine according to the first aspect,
The fluctuation data area for game (game RAM area) is not used when performing control based on the game program (game program) or when performing control based on the non-game program (non-game program). Including unused area (unused area 3),
When the power supply to the gaming machine is started, the control means determines whether the storage contents including the unused area (unused area 3) in the gaming variation data area (game RAM area) are normal. Is determined.
According to this feature, unauthorized data can be prevented from being stored in the unused area.

The gaming machine according to the third aspect of the present invention is the gaming machine according to the first or second aspect,
The control means, when it is determined that the stored contents are not normal, controls to an error state (error processing), and in response to the release of the error state, the game variation data area (game RAM area) and the non- It is characterized in that both the game variation data area (non-game RAM area) is initialized.
According to this feature, when it is determined that the stored content is not normal, the automatic recovery is not performed, the state is controlled to the error state, and the variation data for the game and the non-game Since both of the fluctuation data are initialized, it is possible to prevent the progress of the game with an abnormality occurring in either the fluctuation data for the game or the non-game data.

The gaming machine according to the fourth aspect of the present invention is the gaming machine according to the first or second aspect,
The control means, when it is determined that the storage content is not normal (when it is determined that the RAM is destroyed), the gaming variation data area (game RAM area) and the non-game variation data area ( It is characterized in that both non-game RAM areas are initialized.
According to this feature, when it is determined that the storage content is not normal, both the gaming variation data and the non-gaming variation data are initialized, so that either the gaming variation data or the non-gaming data is abnormal. The game can be prevented from proceeding with the occurrence.

The gaming machine of the means 5 of the present invention is the gaming machine according to any one of the means 1 to 4,
The control means prohibits access to both the gaming variation data area (gaming RAM area) and the non-gaming variation data area (non-gaming RAM area) when power supply to the gaming machine is stopped ( Setting of prohibition of access to RAM 41c in power interruption processing)
It is characterized by:
According to this feature, the access to the non-game variable data area as well as the non-game variable data area used to determine whether the storage content is normal is prohibited, so the non-game variable data area is used. In this way, it is possible to prevent illegal data from being stored.

The gaming machine of the means 6 of the present invention is the gaming machine according to any one of the means 1 to 5,
Interruption is prohibited during execution of the non-game program (interruption is set to be prohibited before calling the non-game program)
It is characterized by:
According to this feature, it is possible to prevent the processing from being complicated due to the execution of an unintended processing during the execution of the non-game program.

The gaming machine of the means 7 of the present invention is the gaming machine according to any one of the means 1 to 6,
The second storage area includes a stack area (game stack area) for saving data used by the game program (game program) and a stack area (non-game stack) for saving data used by the non-game program (non-game program). Area) are provided separately.
According to this feature, since the data used by the game program and the data used by the non-game program are respectively saved in the separately provided stack areas, the management of the stack areas becomes easy.

The gaming machine of the means 8 of the present invention is the gaming machine according to any one of the means 1 to 7,
Address storage means (vector table) capable of storing an address of an interrupt program (timer interrupt processing (main)) for executing the interrupt processing;
Determining means for determining at start-up whether or not the address stored in the address storage means (vector table) is within a predetermined range (area of the program area where programs and the like are actually stored);
Activation limiting means for restricting activation when it is determined that the address stored in the address storage means (vector table) is not within a predetermined range. Do not start if it is not the area actually stored)
It is characterized by having.
According to this feature, execution of unintended interrupt processing can be prevented in advance.

The gaming machine of the means 9 of the present invention is the gaming machine according to any one of the means 1 to 8,
Setting means for setting the control means (setting of various functions performed with reference to HW parameters);
The control means executes processing based on a program (game program or non-game program) after the setting by the setting means is performed, and prohibits an interrupt before processing based on the program is started (startup). Setting interrupt prohibition by time setting)
It is characterized by:
According to this feature, occurrence of an unintended interrupt can be prevented.

The gaming machine of the means 10 of the present invention is the gaming machine according to any one of the means 1 to 9,
A plurality of timer value storage areas (for example, 1-byte timers A to C);
When any one of a plurality of types of timing conditions (for example, the timing conditions of the one-byte timers A to C) is satisfied, a timer value storage area (for example, the one-byte timer A) corresponding to the timing condition is satisfied. To C) a timer value storage means (main processing) for storing a timer value according to the timing condition;
Timer value updating means (time counter updating processing) capable of updating timer values stored in a plurality of timer value storage areas (for example, one-byte timers A to C) at predetermined intervals (about 2.24 ms);
With
To a plurality of timer value storage areas (for example, 1-byte timers A to C), continuous addresses (804CH to 804EH) are assigned according to a predetermined rule (+1),
The timer value updating means performs a predetermined operation (designated address + 1) on an update process (a process of subtracting 1 from the value indicated by the pointer) for updating the timer value stored in the timer value storage area corresponding to the designated address. Thus, a plurality of types of timer values can be updated by repeatedly executing while changing the designated address for the timer value storage area.
According to this feature, continuous addresses are assigned to the plurality of timer value storage areas according to a predetermined rule, and an update process for updating the timer value stored in the timer value storage area corresponding to the specified address is performed by a predetermined process. When multiple types of timer values are updated by repeatedly executing while changing the designated address for the timer value storage area by performing the above operation, the process of updating multiple types of timer values is performed for each type of timer value Program capacity can be reduced.
It should be noted that continuous addresses are assigned according to a predetermined rule, for example, when a start address and an address added by N (N is a natural number) from the start address are assigned.
Further, changing the designated address for the timer value storage area by performing a predetermined operation means, for example, changing the designated address by adding or subtracting a value corresponding to the number of processes to the current designated address; Changing a specified address by adding or subtracting a constant from or to a reference address corresponds to this. At this time, the value or the constant according to the number of processes may be different depending on the storage capacity of the timer value. For example, if the timer value is stored byte by byte, the value according to the number of processes is equal to the number of processes. .. And the constant is 1. However, if the timer value is stored in units of 2 bytes, the value corresponding to the number of processes becomes 2, 4, 6,. , And the constant is 2.

  It should be noted that the present invention may have only the matters specifying the invention described in the claims of the present invention, or may have configurations other than the matters specifying the invention together with the matters specifying the invention described in the claims of the present invention. It may be something.

It is a front view of the slot machine of the example to which the present invention is applied. FIG. 3 is a perspective view showing the internal structure of the slot machine. It is a figure which shows the symbol arrangement | sequence of a reel. FIG. 3 is a block diagram showing a configuration of the slot machine. FIG. 3 is a block diagram illustrating a configuration of a main control unit. FIG. 3 is a diagram illustrating a memory map of a ROM and a RAM mounted on a main control unit. FIG. 4 is a diagram showing details of a memory map of a ROM and a RAM mounted on the main control unit. It is a figure showing the composition of a game program and a non-game program. It is a figure showing the relation between a game field and a non-game field. (A) is a flowchart showing a flow of processing when a non-game program is called from processing based on a game program during execution of the main processing, and (b) is based on the game program during execution of the timer interrupt processing. It is a flow chart which shows the flow of processing at the time of calling a non-game program from processing. 6 is a flowchart illustrating control contents of an initial setting process executed by a main control unit. 6 is a flowchart illustrating control contents of a setting change process executed by a main control unit. It is a flowchart which shows the control content of the game area initialization process which a main control part performs. It is a flowchart which shows the control content of the non-game area initialization process which a main control part performs. 6 is a flowchart illustrating control contents of a main process executed by a main control unit. 9 is a flowchart illustrating the control content of a timer interrupt process (main) executed by a main control unit. 9 is a flowchart illustrating the control content of a timer interrupt process (main) executed by a main control unit. 6 is a flowchart illustrating control contents of a power interruption process (main) executed by a main control unit. FIG. 4 is a diagram illustrating an area of a RAM initialized by a main control unit when a first condition and a second condition are satisfied. 6 is a flowchart illustrating control contents when a main control unit determines a value of a timer counter. FIG. 4 is a diagram illustrating a storage area of a timer counter in a RAM. 9 is a flowchart illustrating the control content of a time counter update process executed by a main control unit. It is a flowchart which shows the modification of the flow of a process at the time of calling a non-game program from the process based on a game program during execution of a timer interruption process.

  Embodiments for implementing a slot machine according to the present invention will be described below based on embodiments.

  An embodiment of a slot machine to which the present invention is applied will be described with reference to the drawings. As shown in FIG. 1, a slot machine 1 according to the present embodiment includes a housing 1a having an open front surface and a side of the housing 1a. And a front door 1b pivotally supported at one end.

  As shown in FIG. 2, inside the housing 1a of the slot machine 1 of this embodiment, reels 2L, 2C, and 2R (hereinafter, left reel, middle reel, right reel) on which a plurality of types of symbols are arranged on the outer periphery. ) Are arranged side by side in the horizontal direction, and as shown in FIG. 1, three continuous symbols among the symbols arranged on the reels 2L, 2C, and 2R can be seen from the see-through window 3 provided on the front door 1b. Are arranged as follows.

  As shown in FIG. 3, "red 7", "blue 7", "white 7", "BAR", "watermelon", "cherry a", and "cherry" are provided on the outer peripheral portions of the reels 2L, 2C, and 2R, respectively. A plurality of mutually identifiable patterns such as "b", "bell", "replay a", "replay b", and "plum" are drawn in a predetermined order, each of which is 21 pieces. The symbols drawn on the outer peripheral portions of the reels 2L, 2C, 2R are displayed in upper, middle, lower, and upper tiers, respectively, in the see-through window 3 provided substantially at the center of the front door 1b. In the following, “red 7”, “blue 7”, and “white 7” may be simply referred to as “7”, and “cherry a” and “cherry b” may be simply referred to as “cherry”. Yes, "replay a" and "replay b" may be collectively referred to simply as "replay".

  Each of the reels 2L, 2C, 2R is rotated by a correspondingly provided reel motor 32L, 32C, 32R (see FIG. 4), so that the design of each of the reels 2L, 2C, 2R is continuous with the see-through window 3. While the reels 2L, 2C, and 2R are stopped rotating, three consecutive symbols are derived and displayed on the see-through window 3 as a display result.

  Inside the reels 2L, 2C, 2R, a reel sensor 33L, 33C, 33R for detecting a reference position and a reel LED 55 for irradiating the reels 2L, 2C, 2R from the back are provided for the reels 2L, 2C, 2R, respectively. , Are provided. The reel LED 55 includes twelve LEDs corresponding to three consecutive symbols on the reels 2L, 2C, and 2R, and can irradiate each symbol independently.

  A display area 51a of a liquid crystal display 51 (see FIG. 1) is arranged at a position on the front side (player side) of each of the reels 2L, 2C, 2R of the front door 1b. The liquid crystal display 51 has a liquid crystal panel having transparency when no voltage is applied to the liquid crystal element. The liquid crystal display 51 is provided with a transparent region 51 b corresponding to the transparent window 3 of the display region 51 a and a transparent window 3. Each reel 2L, 2C, 2R can be visually recognized from the player side.

  In the front door 1b, as shown in FIG. 1, a medal insertion section 4 into which medals can be inserted, a medal payout exit 9 from which medals are paid out, and a credit (the number of medals stored as a game value owned by the player). In this range, the maximum bet amount of the specified number of bets determined according to the game state within the range (3 is set as the specified number of RT0 to 4 described later and 2 is set as the specified number of RB in the present embodiment). MAXBET switch 6 which is operated when setting the medals, the medals stored as credits and the medals used for setting the bet amount are settled (the medals used for setting the credits and the bet amount are returned) ), A start switch 7 that is operated when starting a game, and a stop switch that is operated when each of the reels 2L, 2C, and 2R stops rotating. Pitch 8L, 8C, 8R, effect switch 56 to be used in effect are respectively provided so as to be operated by the player.

  In this embodiment, of the three reels 2L, 2C, and 2R that have started rotating, the reel that stops first is referred to as a first stop reel, and the stop is referred to as a first stop. Similarly, the reel that stops second is referred to as a second stop reel, the stop is referred to as a second stop, the reel that stops third is referred to as a third stop reel, and the stop is referred to as a third stop. Alternatively, it is referred to as a final stop.

  As shown in FIG. 1, the front door 1b displays a credit indicator 11 displaying the number of medals stored as credits, and shows the number of medals paid out due to the occurrence of a prize and the contents of the error when an error occurs. The game auxiliary display 12 displays an error code, information which can identify the reel stop order based on the navigation notification described later, etc., the 1 BET LED 14 for notifying that the bet number is set to 1, and the bet number is set to 2. 2 BET LED 15 for notifying that the game is on, 3 BET LED 16 for notifying that the bet amount has been set to 3 by light, insertion request LED 17 for notifying that a medal can be inserted, and a start switch 7 to operate the game. A start valid LED 18 for notifying that the start operation is valid by lighting, and a weight (previous game (A state in which the rotation of the reels is awaited because a certain period has not elapsed since the start.) A waiting LED 19 for notifying by light that the vehicle is being replayed and a replay LED 20 for notifying that a replay game is being performed is provided. Game display unit 13 is provided.

  Inside the MAXBET switch 6, there is provided a BET switch valid LED 21 (see FIG. 4) for notifying by lighting that the setting operation of the bet amount by operating the MAXBET switch 6 is valid, and the stop switches 8L, 8C, Inside the 8R, left, middle, and right stop valid LEDs 22L, 22C, and 22R (see FIG. 4) are provided to notify by light that the reel stop operation by the corresponding stop switches 8L, 8C, and 8R is valid. An effect LED 56a (see FIG. 4) is provided inside the effect switch 56 to notify by lighting that the operation of the effect switch 56 is effective.

  As shown in FIG. 2, inside the front door 1b, as shown in FIG. 2, a reset switch 23 for detecting a reset operation for releasing an error state described later and a hit state described later by a predetermined key operation, and a change of a set value described later The set value display 24 displays the set value at that time during or during the check of the set value, and the game progresses until a reset operation is performed at a predetermined timing (for example, at the end of BB described later). A stop switch 36a for selecting the valid / invalid of a stop function for controlling to a regulated state, and a predetermined trigger (for example, at the end of BB), an automatic settlement process (a medal stored as a credit is stored in the player). The automatic payment switch 36b for selecting the validity / invalidity of the automatic payment function for controlling the payment (returning process) regardless of the operation of the button, and the flow path of the medals inserted from the medal insertion unit 4 a, a flow path switching solenoid 30 for selectively switching to one of a hopper tank 34a (see FIG. 2) described later and a medal payout port 9 side, which is provided in the inside of a An inserted medal sensor 31 for detecting medals flowing down to the tank 34a side, a medal selector 29 having an insertion port sensor 26 for detecting insertion of a foreign substance on the upstream side of the inserted medal sensor 31, and a door opening for detecting an open state of the front door 1b. A detection switch 25 (see FIG. 4) is provided.

  As shown in FIG. 2, the reels 2L, 2C, and 2R, the reel motors 32L, 32C, and 32R (see FIG. 4) and the reel reference positions of the reels 2L, 2C, and 2R are respectively provided inside the housing 1a. A reel unit 2 including detectable reel sensors 33L, 33C, 33R (see FIG. 4), an external output board 1000 for outputting an external output signal (see FIG. 4), and storing medals inserted from the medal insertion unit 4. Hopper tank 34a, a hopper motor 34b for paying out medals stored in the hopper tank 34a from the medal payout port 9 (see FIG. 4), and a payout sensor 34c for detecting medals paid out by driving the hopper motor 34b ( (See FIG. 4) and a power supply box 100 are provided.

  On the side of the hopper unit 34, an overflow tank 35 for storing medals overflowing from the hopper tank 34a is provided. Inside the overflow tank 35, there is provided a full sensor 35a (see FIG. 4) for detecting that the stored medals are full.

  As shown in FIG. 2, the front of the power supply box 100 functions as a setting key switch 37 for switching to a setting change state or a setting confirmation state, and normally functions as a reset switch for canceling an error state or a stopped state. In a setting change state, a reset / setting switch 38 functioning as a setting switch for changing a setting value of a winning probability (a payout rate) of an internal lottery described later, and a power supply operated when turning on / off the power supply A switch 39 is provided.

  The power supply box 100 is provided inside the housing 1a, and the front door 1b is provided on the front of the power supply box 100 because the front door 1b can be opened by a predetermined key operation held by a clerk or the like. The set key switch 37, the reset / setting switch 38, and the power switch 39 can be operated only by a person such as a clerk having the key, and cannot be operated by the player. The same applies to the reset switch 23 detected by a predetermined key operation. In particular, since the setting key switch 37 requires further key operation after opening the front door 1b by key operation, only the clerk who has the key for operating the setting key switch 37 among the clerks at the game arcade. Operation is allowed.

  When playing a game in the slot machine 1 of this embodiment, first, medals are inserted from the medal insertion unit 4 or the number of bets is set using credits. To use the credit, the MAXBET switch 6 may be operated. When a predetermined number of bets set according to the game state is set, the pay line LN (see FIG. 1) becomes valid, and the operation of the start switch 7 is valid, that is, the game can be started. Become. In this embodiment, three bets are defined as a prescribed number of bets in RT0 to RT4 described later, and two are determined as a prescribed number of bets in RB described later. When the bet amount is set, the pay line LN is activated. When medals are inserted in more than the maximum number among the prescribed numbers corresponding to the gaming state, the medals are added to the credit.

  The winning line is a line that is set to determine whether the combination of the symbols displayed in the perspective windows 3 of the reels 2L, 2C, and 2R is a combination of the winning symbols. In the present embodiment, as shown in FIG. 1, only the winning line LN set across the middle row of the reel 2L, the middle section of the reel 2C, and the middle section of the reel 2R, that is, the middle row, is a winning line. Stipulated. In this embodiment, only one winning line is applied, but a plurality of winning lines may be applied.

  Further, in this embodiment, in order to make it easy to recognize that the combination of the symbols constituting the prize is arranged in the prize line LN, the invalid lines LM1 to LM4 are set separately from the prize line LN. The invalid lines LM1 to LM4 are not determined based on the combination of the symbols arranged on the invalid lines LM1 to LM4. When the combination of the symbols constituting the specific prize is arranged on the prize line LN, the invalid lines LM1 to LM4 are invalid. When a combination of symbols (for example, bell-bell-bell) that wins when the winning line LN is aligned with any of the LM1 to LM4 is arranged, a symbol forming a specific winning on the winning line LN is formed. This is to make it easy to recognize that the combination is complete.

  In the present embodiment, as shown in FIG. 1, the upper line of the reel 2L, the upper line of the reel 2C, and the upper line of the reel 2R, that is, the invalid line LM1 set over the symbols arranged in the upper direction in the horizontal direction, and the lower line of the reel 2L , The lower line of the reel 2C, the lower line of the reel 2R, that is, the invalid line LM2 set across the symbols horizontally arranged in the lower line, the upper line of the reel 2L, the middle line of the reel 2C, the lower line of the reel 2R, that is, the lower line There are four types of invalid lines LM: an invalid line LM3 set across the symbols, a lower row of the reel 2L, a middle row of the reel 2C, and an upper row of the reel 2R, that is, an invalid line LM4 set across the patterns arranged to the right. It is defined as.

  Further, in the present embodiment, when a predetermined combination of symbols (for example, “Bell-watermelon-cherry b”) determined as a combination in the winning line LN is completed, a prize is won and a predetermined symbol is formed. When the combination is completed, a symbol combination (for example, “watermelon-watermelon-watermelon”) that is an index that is easier to recognize than a predetermined symbol combination is arranged on one of the invalid lines LM1 to LM4, and thus the invalid lines LM1 to LM4 are generated. And a combination that can make it appear as if a prize has been won by a combination of symbols arranged in any of the above. Hereinafter, a combination of symbols that are aligned with any of the invalid lines LM1 to LM4 when a predetermined symbol combination is aligned with the pay line LN is referred to as a symbol combination as an index, and constitutes a symbol combination as an index. The design is called an index design.

  When the start switch 7 is operated in a state where the game can be started, the reels 2L, 2C, 2R rotate, and the symbols on the reels 2L, 2C, 2R change continuously. When any of the stop switches 8L, 8C, 8R is operated in this state, the rotation of the corresponding reels 2L, 2C, 2R is stopped, and the display result is derived and displayed on the see-through window 3.

  When one of the reels 2L, 2C, and 2R is stopped, one game is completed, and a predetermined symbol combination (hereinafter, also referred to as a combination) is displayed on each of the reels 2L, 2C, and 2R on the winning line LN. As a result, when the game stops, a prize is generated, and a predetermined number of medals are awarded to the player according to the prize and added to the credit. When the number of credits reaches the upper limit (50 in this embodiment), medals are paid directly from the medal payout port 9 (see FIG. 1). Further, when a combination of symbols accompanied by a transition of the gaming state is stopped on the pay line LN as a result of displaying the reels 2L, 2C, 2R, the game state is shifted to a gaming state corresponding to the combination of the symbols. .

  In this embodiment, the game starts when the operation of the start switch 7 is detected in a state where the operation of the start switch 7 is valid, and ends when all the reels stop. One unit of control (game control) for executing the game is started when all controls accompanying the end of the previous game are completed, and when all controls accompanying the end of the game are completed. finish.

  Further, in the present embodiment, the configuration using three reels is illustrated, but a configuration using only one reel, a configuration using two reels, and a configuration using four or more reels may be used. In a configuration using two or more reels, the winning may be determined based on a combination of display results derived for all of the two or more reels. Further, in this embodiment, the variable display device is constituted by physical reels, but the variable display device may be constituted by an image display device such as a liquid crystal display.

  Further, in the slot machine 1 according to the present embodiment, after the game is started and the reels 2L, 2C, 2R are rotated and the symbols start to change, one of the stop switches 8L, 8C, 8R is operated. Then, the rotation of the reel corresponding to the stop switch 8L, 8C, 8R is stopped, and the symbol is stopped and displayed. The maximum stop delay time from the operation of the stop switches 8L, 8C, 8R to the stop of the rotation of the corresponding reels 2L, 2C, 2R is 190 ms (millisecond).

  The reels 2L, 2C, and 2R rotate 80 times per minute, and change 80 × 21 (the number of symbols per reel) = 1,680 symbols, so that a maximum of four symbols are drawn during 190 ms. You can do it. That is, the symbols that can be selected as the stop symbols are the symbols displayed when the stop switches 8L, 8C, and 8R are operated, and the symbols four frames away from the symbols, for a total of five symbols.

  Therefore, for example, when one of the stop switches 8L, 8C, and 8R is operated and the symbol displayed on the lower row of the reel corresponding to the stop switch is set as a reference, the symbol from the symbol to four frames ahead is displayed. Since the symbol can be displayed in the lower row, when one of the stop switches 8L, 8R is operated on each of the reels 2L, 2C, 2R, the symbol displayed in the middle row of the reel corresponding to the stop switch is operated. Can be displayed on the winning line, including symbols arranged within five frames.

  Hereinafter, the reels 2L, 2C, and 2R may be simply referred to as reels unless it is particularly necessary to distinguish them. The reel 2L may be referred to as a left reel, the reel 2C may be referred to as a middle reel, and the reel 2R may be referred to as a right reel. An operation of stopping the reels 2L, 2C, 2R by operating the stop switches 8L, 8C, 8R may be referred to as a stop operation.

  FIG. 4 is a block diagram showing a configuration of the slot machine 1. As shown in FIG. 4, the slot machine 1 is provided with a game control board 40, an effect control board 90, and a power supply board 101. The game state is controlled by the game control board 40, and the game state is controlled by the effect control board 90. Is produced, and a drive power supply for the electric components constituting the slot machine 1 is generated by the power supply board 101 and supplied to each unit.

  A power supply of AC 100 V is supplied to the power supply board 101 from the outside, and a DC voltage required for driving the electric components constituting the slot machine 1 is generated from the power supply of AC 100 V, and the game control board 40 and the production control board 90. It is supplied to. The hopper motor 34b, the payout sensor 34c, the full tank sensor 35a, the setting key switch 37, the reset / setting switch 38, and the power switch 39 are connected to the power supply board 101.

  On the game control board 40, the MAXBET switch 6, the start switch 7, the stop switches 8L, 8C, 8R, the settlement switch 10, the reset switch 23, the stop switch 36a, the automatic settlement switch 36b, the inserted medal sensor 31, and the door opening are provided. The detection switch 25, the reel sensors 33L, 33C, and 33R are connected, and the payout sensor 34c, the full tank sensor 35a, the setting key switch 37, and the reset / setting switch 38 are connected via the power supply board 101. The detection signals of these connected switches are input. In addition, the game control board 40 includes the above-described credit indicator 11, game assist indicators 12, 1 to 3 BET LEDs 14 to 16, insertion request LED 17, start valid LED 18, waiting LED 19, replay LED 20, BET switch valid LED 21, , Middle and right stop effective LEDs 22L, 22C, 22R, a set value display 24, a flow path switching solenoid 30, and reel motors 32L, 32C, 32R, and the hopper motor 34b described above via the power supply board 101. These electric components are connected and driven based on the control of a main control unit 41 described later mounted on the game control board 40.

  The game control board 40 performs a process relating to the progress of the game and also directly or indirectly controls each part of a control circuit mounted on the game control board 40, and an oscillation signal of a predetermined frequency. A control clock generation circuit for generating a control clock CCLK; a random number clock generation circuit 43 for generating a random number clock RCLK which is an oscillation signal having a predetermined frequency different from the oscillation frequency of the control clock CCLK; A switch detection circuit 44 that takes in a detection signal input from switches connected directly to or via a power supply board 101 and transmits the signal to a main control unit 41, and a motor drive signal (stepping) output from the main control unit 41. Motor drive circuit 45 for transmitting the motor phase signals) to the reel motors 32L, 32C, 32R. A solenoid drive circuit 46 for transmitting a solenoid drive signal output from the main control unit 41 to the flow path switching solenoid 30; and various displays connected to the game control board 40 using an LED drive signal output from the main control unit 41. When the voltage of the power supply supplied to the slot machine 1 is detected by monitoring the voltage of the power supply supplied to the slot machine 1, a voltage drop signal indicating the fact is output to the main control unit 41. And a reset circuit 49 that supplies a system reset signal to the main control unit 41 when the power supply is unstable such as when the power is turned on or when the power is turned off.

  FIG. 5 shows a configuration example of the main control unit 41 mounted on the game control board 40. The main control unit 41 is a one-chip microcomputer, and includes an external bus interface 501, a clock circuit 502, a verification block 503, a unique information storage circuit 504, an arithmetic circuit 505, a reset / interrupt controller 506, CPU (Central Processing Unit) 41a, ROM (Read Only Memory) 41b, RAM (Random Access Memory) 41c, free-run counter circuit 507, random number circuits 508a and 508b, timer circuit 509, interrupt controller 510 , A parallel input port 511, a serial communication circuit 512, a parallel output port 513, and an address decode circuit 514.

  The reset / interrupt controller 506 controls various reset and interrupt requests generated inside and outside the main control unit 41. The reset / interruption controller 506 includes an out-of-designation area prohibition (IAT) circuit 506a and a watchdog timer (WDT) 506b. The IAT circuit 506a is a circuit for monitoring whether or not the user program is correctly executed in the designated area, and has a function of outputting an IAT generation signal when detecting that the user program has been executed outside the designated area. In addition, the watchdog timer 506b has a function of generating a timeout signal every set period.

  The external bus interface 501 is a bus interface having an interface function between an external bus and an internal bus of a chip constituting the main control unit 41, an address bus, a data bus, and a direction control function of each control signal. The clock circuit 502 is a circuit that generates the internal system clock SCLK by dividing the control clock CCLK by two or the like. The verification block 503 has a function of connecting to an external verification machine and verifying a chip. The unique information storage circuit 504 is a circuit that stores a plurality of types of unique information serving as internal information of the main control unit 41. The arithmetic circuit 505 is a circuit that performs multiplication and division.

  The CPU 41a is a control CPU that executes a game control in the slot machine 1 by executing a user program (a game control processing program for game control) based on the control code read from the ROM 41b. When such game control is executed, a fixed data reading operation in which the CPU 41a reads fixed data from the ROM 41b, a variable data writing operation in which the CPU 41a writes various variable data in the RAM 41c and temporarily stores the same, and the CPU 41a is temporarily stored in the RAM 41c. A variable data reading operation for reading various kinds of variable data, a reception operation in which the CPU 41a receives an input of various signals from outside the main control unit 41 via the external bus interface 501, the parallel input port 511, the serial communication circuit 512, and the like; A transmission operation of outputting various signals to the outside of the main control unit 41 via the external bus interface 501, the serial communication circuit 512, the parallel output port 513, and the like is also performed.

  The ROM 41b stores control codes indicating user programs (game control processing programs for game control), fixed data, and the like. The RAM 41c provides a work area for game control and the like. Here, at least a part of the RAM 41c may be a backup RAM backed up by a backup power supply. That is, even if the power supply to the slot machine 1 is stopped, at least a part of the contents of the RAM 41c is stored for a predetermined period.

  As the free-run counter circuit 507, an 8-bit free-run counter is mounted. The random number circuits 508a and 508b are circuits that generate numerical data such as an 8-bit random number and a 16-bit random number, which are random numbers having a predetermined update range. In this embodiment, the hardware random number generated by the 16-bit random number circuit 508b among the random number circuits 508a and 508b is used as a random number for an internal lottery described later. The timer circuit 509 is a 16-bit programmable timer, counts down the set timer value based on the input of the control clock CCLK, and outputs an interrupt request signal to the interrupt controller when the timer value reaches 0000H. In this embodiment, it is possible to perform a periodic interrupt request and time measurement using the timer circuit 509.

  The interrupt controller 510 is a circuit that controls an external interrupt request from an interrupt terminal and an internal peripheral circuit (for example, a serial communication circuit 512, random number circuits 508a and 508b, and a timer circuit 509). . The parallel input port 511 includes an input-only port having a width of 8 bits. The parallel output port 513 provided in the main control unit 41 shown in FIG. 4 includes an output-only port having an 11-bit width. The serial communication circuit 512 is a circuit that performs asynchronous serial communication in input / output to / from the outside.

  The address decode circuit 514 is a circuit for decoding each functional block inside the main control unit 41 and decoding a chip select signal which is a decode signal for an external device. The chip select signal allows the internal circuit of the main control unit 41 or an external device serving as a peripheral device to selectively operate effectively, thereby enabling access from the CPU 41a.

  For example, when the main control unit 41 accesses an area of the storage area of the ROM 41b in which a program or the like is not stored, or accesses an area of the storage area of the RAM 41c for which access prohibition is set. That is, by causing an illegal access reset when an access is made to a memory area that is not accessed in a normal operation, the progress of the game is disabled. Even if an unauthorized program is stored in an area unrelated to the above, an unused area of the RAM 41c, or the like, the execution of the unauthorized program can be prevented.

  The main control unit 41 is activated by the occurrence of an internal or external reset. At this time, the main control unit 41 assigns a value set in a vector table assigned to the ROM 41b and set to the start address of the interrupt processing. Is a value indicating unused or a value indicating an area where a program or the like is actually stored. It is possible to prevent in advance that an unintended process is executed due to occurrence or the like.

  The main control unit 41 transmits various commands to the sub control unit 91 via the parallel output port 513. The command transmitted from the main control unit 41 to the sub control unit 91 is transmitted in only one direction, and the command is not transmitted from the sub control unit 91 to the main control unit 41. In the present embodiment, the command is transmitted to the sub-control unit 91 via the parallel output port 513, that is, the command is transmitted as a parallel signal. A configuration for transmitting a command to the sub-control unit 91, that is, a configuration for transmitting the command as a serial signal may be employed.

  In addition, the main control unit 41 receives detection states of various switches connected to the game control board 40 from the parallel input port 511. Then, the main control unit 41 executes a main process that shifts stepwise according to the detection state of various switches input from the parallel input port 511. In addition, the main control unit 41 can execute the interrupt process by interrupting the main process when an interrupt occurs. In the present embodiment, the timer interrupt processing (main) is executed when a timeout has occurred in the timer circuit 509, that is, at regular time intervals (about 0.56 ms in the present embodiment). In addition, the main control unit 41 is set to automatically prohibit other interrupts during execution of the interrupt processing, and when a plurality of interrupts occur simultaneously, a predetermined order is set. Has been set to execute priority. Note that if another interrupt factor occurs during execution of the interrupt processing and the interrupt factor continues even after the interrupt processing ends, the interrupt is terminated at the end of the interrupt processing. The prohibition is automatically released, at which point a new interrupt occurs. It should be noted that other interrupts are set to be automatically prohibited during execution of the interrupt processing, and the interrupt prohibition is not automatically released when the interrupt processing is completed. At the start, another interrupt may be prohibited by a program, and at the end of the interrupt processing, the prohibition of the interrupt may be released by the program.

  The main control unit 41 repeatedly performs a process according to the control state as a main process until the detection state of various switches connected to the game control board 40 changes, and responds to the change in the detection state of various switches. Execute the process of shifting in stages. In addition, the main control unit 41 executes the timer interrupt processing (main) at regular time intervals (about 0.56 ms in the present embodiment). Note that the execution interval of the timer interrupt processing (main) is set to a time longer than the sum of the time during which the processing repeated in the main processing repeats according to the control state and the execution time of the timer interrupt processing (main). Thus, at least one cycle of the process repeated according to the control state between the current and next timer interrupt processes (main) is performed at least.

  The effect switch 56 is connected to the effect control board 90, and a detection signal of the effect switch 56 is input. In addition, effect devices such as a liquid crystal display 51, effect LED 52, speakers 53 and 54, reel LED 55, and the like are connected, and these effect devices are controlled by a sub-control unit 91 described later mounted on an effect control board 90. It is driven based on this. In this embodiment, the sub-control unit 91 mounted on the effect control board 90 controls the output of the effect devices such as the liquid crystal display 51, the effect LED 52, the speakers 53 and 54, and the reel LED 55. However, an output control unit that directly performs output control of the effect device separately from the sub-control unit 91 is mounted on the effect control board 90 or another board, and the sub-control unit 91 is based on a command from the main control unit 41. The output pattern of the rendering device may be determined, and the output control unit may control the output of the rendering device based on the output pattern determined by the sub-control unit 91. In such a configuration, the sub-control unit 91 and the output control The output control of the rendering device is performed by both of the units. Further, in the present embodiment, the liquid crystal display 51, the effect LED 52, the speakers 53 and 54, and the reel LED 55 are illustrated as the effect devices, but the effect device is not limited to these, and for example, a display that is driven mechanically. A device or a mechanically driven role object may be applied as the rendering device.

  The effect control board 90 is composed of a microcomputer having a sub CPU 91a, a ROM 91b, a RAM 91c, and an I / O port 91d, and controls an effect, and a liquid crystal display 51 connected to the effect control board 90. A display control circuit 92 for performing display control of the display, an effect effect LED 52, an LED drive circuit 93 for controlling the drive of the reel LED 55, an audio output circuit 94 for controlling the audio output from the speakers 53 and 54, A reset circuit 95 for providing a reset signal to the sub CPU 91a when an initialization command from the sub CPU 91a is not input for a predetermined time; a switch detection circuit 96 for detecting a detection signal input from switches connected to the effect control board 90; A clock device 97 that outputs time information including date information and time information; The power supply voltage supplied to the lot machine 1 is monitored, and when a voltage drop is detected, a power cutoff detection circuit 98 that outputs a voltage drop signal indicating the voltage drop to the sub CPU 91a, and other circuits are mounted. Have been.

  The sub CPU 91a receives commands transmitted from the game control board 40, performs various controls for performing the effect, and directly or indirectly controls each unit of the control circuit mounted on the effect control board 90. .

  In the reset circuit 95, the voltage at which the reset signal is released is set lower than that of the reset circuit 49 that supplies a system reset signal to the main control unit 41 in the game control board 40. It is designed to be started earlier than the section 41. On the other hand, in the power interruption detection circuit 98, the voltage at which the voltage drop signal is output is set to be lower than that of the power interruption detection circuit 48 which outputs the voltage drop signal to the main control unit 41 in the game control board 40. In, the sub-control unit 91 detects a power failure at a later stage than the main control unit 41, and performs a power interruption process (sub) described later.

  The sub-control unit 91 has an interrupt function similarly to the main control unit 41, generates an interrupt when receiving a command from the main control unit 41, and acquires the command transmitted from the main control unit 41. , Execute the command reception interrupt processing stored in the buffer. Further, the sub-control unit 91 generates an interrupt every time the number of input system clocks reaches a certain number, that is, at certain time intervals (about 2 ms), and executes a timer interrupt process (sub) described later. Further, unlike the main control unit 41, when an interrupt occurs based on the reception of a command, the sub-control unit 91 interrupts the timer interrupt process (sub) even during execution of the process. , A command reception interrupt process is executed, and even if interrupts that trigger the timer interrupt process (sub) occur simultaneously, the command reception interrupt process is executed with the highest priority. The backup power is also supplied to the sub-control unit 91 at the time of a power failure, and the data stored in the RAM 91c is retained while the backup power is supplied.

  In the slot machine 1 of the present embodiment, the payout rate of medals changes according to the set value. More specifically, the medal payout rate is changed by using a winning probability according to a set value in a lottery that affects the degree of advantage to a player, such as an internal lottery, a navigation stock lottery, and an additional lottery described later. The set value is made up of six levels from 1 to 6, with 6 being the highest payout rate and the payout rate decreasing as the value decreases in the order of 5, 4, 3, 2, 1. That is, when 6 is set as the set value, the advantage is the highest for the player, and as the value decreases in the order of 5, 4, 3, 2, and 1, the advantage gradually decreases.

  In order to change the setting value, it is necessary to turn on the power of the slot machine 1 after turning on the setting key switch 37. When the setting key switch 37 is turned on and the power is turned on, the setting value read from the RAM 41c is displayed on the setting value display 24 as a display value, and the setting value can be changed by operating the reset / setting switch 38. Move to change state. When the reset / setting switch 38 is operated in the setting change state, the display value displayed on the set value display 24 is updated by one (when further operated from the set value 6, the set value is changed to 1). Return). Then, when the start switch 7 is operated, the display value is determined as the set value. Then, when the setting key switch 37 is turned off, the determined display value (set value) is stored in the RAM 41c of the main control unit 41, and the state shifts to a state where the game can proceed.

  When the power is turned on while the setting key switch 37 is turned on, the configuration may be changed to the setting change state on condition that the door opening detection switch 25 detects that the front door 1b is opened. By adopting such a configuration, it is possible to prevent the setting from being illegally changed while the front door 1b is not opened. Further, in a configuration in which the state is changed to the setting change state on condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 is used to respond to the opening of the front door 1b after shifting to the setting change state. It is preferable that the setting change state is maintained even if the detection of the change is not performed. Therefore, even if the front door 1b is temporarily closed during the setting change, the operation for shifting to the setting change state again is performed. It is not necessary, and the setting change operation does not become complicated. Further, when the setting key switch 37 is turned off after the start switch 7 is operated and the set value is determined after shifting to the setting change state, the door opening detection switch 25 detects the opening corresponding to the opening of the front door 1b. It is also possible to adopt a configuration in which the setting change state is ended and the game can proceed to a possible state, provided that the front door 1b is not opened even in such a configuration. It is possible to prevent the setting from being changed.

  In order to confirm the set value, after the game is over, the setting key switch 37 may be turned on in a state where the bet amount is not set. When the setting key switch 37 is turned on in such a situation, the setting value read out from the RAM 41c is displayed on the setting value display 24, thereby shifting to a setting check state in which the setting value can be checked. In the setting confirmation state, the progress of the game is not possible, and by setting the setting key switch 37 to the off state, the setting confirmation state ends, and the game returns to a state in which the game can proceed.

  After the game, when the setting key switch 37 is turned on in a state where the bet amount is not set, the door opening detection switch 25 must detect that the front door 1b has been opened. Alternatively, the configuration may be changed to a setting confirmation state. With such a configuration, it is possible to prevent a setting value from being illegally confirmed in a state where the front door 1b is not opened. Further, in a configuration in which the state is shifted to the setting confirmation state on condition that the detection corresponding to the opening of the front door 1b is performed, the door opening detection switch 25 responds to the opening of the front door 1b after shifting to the setting confirmation state. It is preferable that the setting confirmation state be maintained even if the detection of the setting is not detected. Therefore, even if the front door 1b is temporarily closed during the setting confirmation, the operation for shifting to the setting confirmation state again is performed. It is not necessary, and the setting confirmation operation does not become complicated. When the setting key switch 37 is turned off after the start switch 7 is operated and the set value is determined after shifting to the setting confirmation state, the door opening detection switch 25 detects the opening corresponding to the opening of the front door 1b. It is also possible to have a configuration in which the setting confirmation state is terminated and the game can be advanced to a state in which the game can be advanced, provided that the front door 1b is not opened even in such a configuration. It is possible to prevent the setting value from being confirmed.

  In the slot machine 1 of the present embodiment, the main control unit 41 determines whether or not the voltage drop signal from the power interruption detection circuit 48 is detected every time the timer interrupt processing (main) is executed. When the determination process is performed and it is determined that the voltage drop signal is detected in the power failure determination process, the power interruption process (main) for setting data for determining whether the data in the RAM 41c is normal at the next recovery is performed. Execute.

  Then, the main control unit 41 returns the processing state of the main control unit 41 to the state before the power failure based on the data stored in the RAM 41c on condition that the data in the RAM 41c is normal at the time of activation. However, when the data of the RAM 41c is not normal, it is determined that the RAM is abnormal, the RAM abnormal error code is set in the register, the state is controlled to the RAM abnormal error state, and the progress of the game is disabled.

  The error state is a normal error state that is released by a reset operation (operation of the reset / setting switch 38 or the reset switch 23), and the state is changed to the above-described setting change state and is released until a new set value is set. There is no special error state, and the RAM abnormal error state is a special error state. Once controlled to the RAM abnormal error state, the state shifts to the setting change state and is released until a new set value is set Never be.

  The sub-control unit 91 also determines whether or not the voltage drop signal from the power interruption detection circuit 98 has been detected in the timer interrupt processing (sub), and when it is determined that the voltage drop signal has been detected, At the next recovery, a power interruption process (sub) for setting data for determining whether the data in the RAM 91c is normal is executed.

  Then, the sub-control unit 91 returns the processing state of the sub-control unit 91 to the state before the power interruption based on the data stored in the RAM 91c, on condition that the data in the RAM 91c is normal at the time of activation. However, if the data in the RAM 91c is not normal, it is determined that the RAM is abnormal, and the RAM 91c is initialized. In this case, unlike the main control unit 41, the execution of the effect is not disabled only by initializing the RAM 91c.

  Further, even when it is determined that the data in the RAM 91c is normal at the time of the startup, the sub-control unit 91 receives the setting command described later indicating that the state has shifted to the setting change state from the main control unit 41. The RAM 91c is also initialized when neither the later-described return command nor the setting command indicating that the control state of the main control unit 41 has returned after a certain period of time has elapsed. Also in this case, the execution of the effect is not disabled only by initializing the RAM 91c.

  Next, initialization of the RAM 41c of the main control unit 41 will be described. The usable area of the storage area of the RAM 41c of the main control unit 41 is divided into a game RAM area, an unused area 4, and a non-game RAM area. The game RAM area is further divided into a special work, an important work, a general work, an unused area 3, and a game stack area. The special work is a work in which data that is not initialized even when the set value is changed is stored, and stores software random numbers, set values, data indicating a game state, and the like. The important work is a work in which data which is inconvenient when initialized at the end of a specific game state (RB, BB) is stored, and data for LED display, input / output data of an input port, an output port, and a game time. A clock counter and the like are stored. The general work is a work in which data that can be initialized at the end of a specific gaming state is stored, and stores a stopped symbol, the number of paid out medals, and the like. The unused area 3 is a work that is not used in any program. The game stack area is an area in which data saved from a register of the main control unit 41 during execution of a game program described later is stored.

  In the present embodiment, the main control unit 41 determines that the data in the RAM 41c is destroyed when the setting key switch 37 is turned on and the data in the RAM 41c is destroyed when the setting key switch 37 is turned on. When the five initialization conditions, namely, when the game is not destroyed, when the setting change state is ended, when a specific game state (RB, BB) is ended, and when one game is ended, each initial state is satisfied. Five types of initialization with different areas to be initialized are performed according to the initialization conditions.

  Initialization 0 is initialization performed when the setting key switch 37 is turned on and data in the RAM 41c is destroyed, and in initialization 0, all available areas are initialized. . Initialization 1 is initialization performed when the setting key switch 37 is turned on and the data in the RAM 41c is not destroyed at the time of startup. In initialization 1, the area other than the special work in the game RAM area is All areas of the game RAM area are initialized. The initialization 2 is an initialization performed after the setting change state is ended by the startup with the setting key switch 37 being ON. In the initialization 2, the special work and the game stack area (in use) in the game RAM area are used. Areas other than () are initialized. The initialization 3 is an initialization performed at the end of a specific game state. In the initialization 3, a general work, an unused area 3, and a game stack area (unused) in the game RAM area are initialized. The initialization 4 is an initialization performed at the end of one game. In the initialization 4, the unused area 3 of the game RAM area and the game stack area (unused) are initialized. The storage area of the set value and the data indicating the game state is allocated to the special work, and when the data in the RAM 41c is not destroyed at the time of starting with the setting key switch 37 being ON, that is, the data in the RAM 41c is not destroyed. If the setting is changed normally, the data indicating the set value and the game state will be held. The storage area of the timer counter, which will be described later, is allocated to important work, and is retained without being initialized at the end of the game or at the end of a specific game state.

  Further, when performing the above-described initialization, the main control unit 41 of the present embodiment specifies the start address and the end address as the RAM addresses to be initialized, so that one byte from the specified start address is obtained. After overwriting the data of 0 with 0, the logical sum of the 1-byte data is calculated, and if the calculation result is 0, the process of moving to the next address is repeated until the designated end address is reached. Then, the RAM area in the range of the designated address is initialized.

  When the main control unit 41 according to the present embodiment is activated by the occurrence of a reset, the main control unit 41 performs a startup setting. In the setting at the time of starting, the status flag provided in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result or execution result of the instruction, and particularly includes an interrupt master permission flag for setting the inhibition / permission of the interrupt. Since the initial value of the interrupt master permission flag is a value indicating that the interrupt is prohibited, the main control unit 41 starts up in a state where the interrupt is prohibited. After that, after setting various functions with reference to HW parameters to be described later, according to the program stored in the program / data area, when a reset occurs, the apparatus is started in an interrupt prohibited state, and then executed first. Start the initial setting process.

  In the initial setting process, the main control unit 41 first sets the interrupt to be prohibited, determines whether the setting key switch 37 is ON at the time of startup, and determines whether the setting key switch 37 is ON at the time of startup. If it is determined that the state is the state, the process proceeds to the setting change process, and the RAM 41c is initialized at the start of the setting change process. At this time, if the data in the RAM 41c is normal, the special work is retained and other areas are initialized, so that even after the setting is changed, a part of the control state (setting value, game state, etc.) before the change is changed. On the other hand, if the data in the RAM 41c is not normal while the data can be held, the abnormalities in the data in the RAM 41c can be surely resolved by initializing all the usable areas including the special work. It has become.

  After the RAM 41c is initialized, the interrupt is set to be enabled, and the set value is updated one by one every time the reset / setting switch 38 is operated, and after the ON of the start switch 7 is detected, The setting value when the setting key switch 37 is turned on is stored in the RAM 41c, and the setting change process is terminated.

  As described above, the main control unit 41 starts up with the interrupt master permission flag set to the initial value indicating that the interrupt is prohibited, and starts in the state in which the interrupt is prohibited. After the interrupt is set to be prohibited, the subsequent initial setting process is executed, so that it is possible to prevent the occurrence of an unintended interrupt.

  Further, after the end of the setting change process, the main control unit 41 executes a main process of performing a process stepwise according to the progress of the game for each game unit. In the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. Then, after the setting change processing is completed, the main processing is started from the stage before the processing of initializing the RAM 41c in the main processing, and the initialization of the RAM 41c after the completion of the setting change processing and the game unit The initialization of each RAM 41c can be performed by a common process.

  In the slot machine 1 of the present embodiment, a prescribed number of bets (3 in the case of RT0 to 4 and 2 in the case of RB) that can be set according to the gaming state (RT0 to RT4, RB) is determined. Therefore, the game can be started on the condition that a predetermined number of bets determined according to the game state is set. In the present embodiment, the pay line LN is activated when a prescribed number of bets is set according to the gaming state.

  In this embodiment, when all the reels 2L, 2C, 2R are stopped, the activated pay line (in this embodiment, all the pay lines are always activated. A winning combination is achieved when a combination of symbols called combinations is arranged on the winning line that has been formed (hereinafter, simply referred to as a winning line). The combination may be a combination of the same symbols or a combination including different symbols.

  The types of winning combinations are determined according to the state of the game, but can be broadly divided into small winning combinations with medal payout and re-starting so that the next game can be started without setting the number of bets. There are a gaming role and a special role accompanied by a transition to a gaming state advantageous to the player. Hereinafter, the small role and the replaying role are also collectively referred to as a general role. In order for the winning of each combination determined according to the gaming state to occur, it is necessary to win the internal lottery described later and set the winning flag of the combination in the RAM 41c. Note that among the winning flags of these roles, the winning flags of the small role and the replaying role are valid only in the game in which the flag is set, and are invalid in the next game. The combination is enabled until the combination of the permitted combinations is completed by the flag, and is invalid in the game in which the combination of the permitted combinations is completed. That is, once the special combination winning flag is won, even if the combination of combinations permitted by the flag cannot be aligned, the winning flag is not invalidated and is carried over to the next game. Becomes

  Hereinafter, the internal lottery of the present embodiment will be described. In the internal lottery, the main control unit 41 determines whether or not to permit winning of each of the above-mentioned roles before the display results of all the reels 2L, 2C, and 2R are derived (specifically, the start switch 7). At the time of detection). In the internal lottery, first, when the start switch 7 is detected, a random number for the internal lottery (an integer from 0 to 65535) is obtained. Specifically, the value generated by the random number circuit 508b and stored in the random number value register of the random number circuit 508b is set in the lottery work assigned to the RAM 41c. Then, for each combination determined according to the gaming state (RT0-4, RB), numerical data stored in the lottery work, and each combination determined according to the current gaming state, the number of bets, and the set value. It is determined whether or not a winning is permitted according to the number of determination values of.

  In the internal lottery, the number of determination values determined according to the role to be subjected to the internal lottery, the current game state and the set value are sequentially changed to the random number value for the internal lottery (numerical data stored in the lottery work). If the result of the addition overflows, it is determined that the winning combination has been won. For this reason, the winning combination is determined based on the probability (the number of judgment values / 65536) according to the magnitude of the number of judgment values.

  When the winning of any of the winning combinations is determined, the winning flag corresponding to the winning-determined winning combination is set in the internal winning flag storing work allocated to the RAM 41c. The internal winning flag storage work is composed of a 2-byte storage area, of which the upper byte is assigned as a special role storing work in which the special role winning flag is set, and the lower byte is a general role winning work. Assigned as a general role storage work for which the flag is set. Specifically, when the special combination is won, the special combination winning flag indicating that the special combination has been won is set in the special combination storing work, and the winning flag set in the general combination storing work is cleared. When the general role is won, a general role winning flag indicating that the general role has been won is set in the general role storing work. If any of the combinations and combinations of combinations are not won, only the general combination storage work is cleared.

  Next, stop control of the reels 2L, 2C, 2R will be described. The main control unit 41 refers to the table index and the table creation data stored in the ROM 41b when the rotation of the reels has started and when the reels have stopped and the reels that are still rotating still remain. Then, a stop control table is created for each rotating reel. When any one of the stop switches 8L, 8C, 8R corresponding to the reel being rotated is effectively detected, the stop control table of the corresponding reel is referred to, and the slip of the referred stop control table is performed. Based on the frame number, control is performed to stop the rotation of the reels 2L, 2C, 2R corresponding to the operated stop switches 8L, 8C, 8R.

  In this embodiment, a value of 0 to 4 is determined as the number of sliding frames, and it is possible to stop the reel by drawing up to four symbols after detecting the stop operation. In other words, the stop position of the symbol can be specified from a range of up to five frames including the stop operation position where the stop operation is detected. Further, since it is necessary to move one frame to move the reel for one symbol, it is possible to draw up to four symbols and stop the reel after detecting the stop operation. The stop position of the symbol can be designated from a maximum of five symbols including the operation position.

  In the present embodiment, if any one of the winning combinations is won, when the stop operation is performed, the winning combinations within the pull-in range of a maximum of four frames can be aligned and stopped on the pay line. If possible, a control is performed to stop the rolls in a uniform manner, and for the winning combination, a control is performed to stop the rolls without aligning them in the pull-in range of a maximum of four frames. When the special role and the small role are elected at the same time, such as when the small role is elected while the special role has been carried over from before the previous game, when the stop operation is performed, the maximum If it is possible to stop all the winning combinations in the 4-frame pull-in range, control is performed to align and stop the winning small roles. If it is not possible to draw in, if it is possible to stop all the special roles that have been won in the pay-in range of a maximum of four frames on the winning line, control will be performed to align and stop them. That is, control is performed to stop the four frames without being aligned in the pull-in range. That is, in such a case, the control for aligning the small role on the pay line is given priority over the special role, and the special role can be won only when the small role cannot be drawn. When the special role and the small role can be drawn in at the same time, only the small role is drawn in, and the small role and the special role are not aligned on the winning line at the same time. In addition, when the special role and the small role are elected at the same time, the control to arrange the special role on the winning line has priority over the small role, and only when the special role cannot be drawn, the small role is placed on the winning line. Alignment control may be performed.

  Further, in the present embodiment, when the special role and the replaying role are simultaneously won, for example, when the replaying role is won while the special role has been carried over from before the previous game, a stop operation is performed. At this time, a control is performed in which the symbols of the replaying game are aligned and stopped within a pull-in range of a maximum of four frames on the winning line. In this case, the symbols constituting the replaying game or the symbols forming the replaying game simultaneously won are arranged within 5 symbols, that is, at intervals of 4 frames or less on any of the reels 2L, 2C and 2R. Since the stop can be stopped at an arbitrary position within the pull-in range of 4 frames, if the special role and the replaying role are simultaneously won, regardless of the operation timing of the stop switches 8L, 8C, 8R by the player. Instead, the re-game players will always win. In other words, in such a case, the control for aligning the re-gaming combination on the winning line is given priority over the special combination, and the re-gaming combination always wins. When the special role and the replaying role can be drawn in at the same time, only the replaying role is drawn in and the special role does not coincide with the replaying role on the winning line.

  In this embodiment, the reel stop control is performed by using the stop control table that can specify the number of sliding frames for each timing at which the stop operation is performed. A configuration in which the stop position is specified from the table and stop control for stopping the reel at the specified stop position is performed.The stop position that can be stopped at the timing of the stop operation is searched without using the stop control table or the stop position table. Specified and configured to perform stop control to stop the reel at the specified stop position, stop control using stop control table, stop control using stop position table, stop possible without using stop control table or stop position table A configuration in which stop control by searching and specifying a stop position is used together, and a configuration in which stop control is performed by partially changing the stop control table and stop position table It may be.

  In the present embodiment, the main control unit 41 counts the game time, which is the time that has elapsed since the start of the game, each time the reel rotation is started, that is, the time elapsed from the start of the reel rotation. After the end of one game, when a predetermined number of bets is set by inserting medals or the like and the game start operation is performed in a state where the game start operation is enabled, the reel rotation of the previous game is started. If the game time from which the timing was started is equal to or longer than the specified time (4.1 seconds in this embodiment), that is, if the specified time has elapsed since the start of reel rotation of the previous game, no wait is generated. At that time, the rotation of the reel for the game in the game is started. On the other hand, after the end of one game, when a predetermined number of bets is set by inserting medals or the like and the game start operation is performed in a state where the game start operation is enabled, the reel rotation of the previous game is started. If the game time that started counting from the point in time is less than the specified time, that is, if the specified time has not elapsed since the start of reel rotation in the previous game, a wait is generated and the reel rotation is started at that point. Instead, the game waits until the game time that has started timing from the start of reel rotation of the previous game reaches a specified time, and starts reel rotation when the specified time is reached.

  In the present embodiment, the main control unit 41 performs control to output an external output signal indicating a game state, an error occurrence state, and the like. These external output signals are output to a hall device such as a hall computer through an external output board 1000 and an information providing terminal board of a game shop (hall) in which the slot machine 1 is installed.

  The main control unit 41 includes a medal IN signal indicating the number of medals used for setting the number of bets, a medal OUT signal indicating the number of medals given to the player due to the occurrence of a prize, and a gaming state during RB (regular bonus). RB signal indicating that the game state is BB (Big Bonus), an BB signal indicating that a game state is starting, an ART signal indicating the start of ART described later, a door opening signal indicating that the front door 1b is opening, and a later described A setting change signal indicating that the mode has shifted to the setting change mode, a throw-in error signal indicating an abnormality of the medal selector, and a pay-out error signal indicating an abnormality of the hopper unit 34 are output.

  The external output board 1000 is provided with a relay circuit, a parallel-serial conversion circuit, and a terminal for each output signal, and is provided with a connector to be electrically connected to a circuit of the information providing terminal board. Among the signals output from the game control board 40, the medal IN signal, the medal OUT signal, the RB signal, the BB signal, and the ART signal are directly output as pulse signals to the information providing terminal board via the relay circuit. . On the other hand, the door opening signal, the setting change signal, the closing error signal, and the dispensing error signal are converted by a parallel-serial conversion circuit into security signals, which are serial signals that can be individually identified, and information is provided. Output to terminal board.

  Next, a command transmitted from the main control unit 41 to the sub control unit 91 will be described.

  In the present embodiment, the main control unit 41 instructs the sub-control unit 91 to insert a number-of-insertion command, a credit command, a game status command, an ART status command, an internal winning command, a freeze command, an ART lottery result command, and a reel acceleration information command. , Stop operation command, number of sliding commands, stop command, game end command, winning number command, payout start command, payout end command, standby command, stop command, error command, return command, setting command, setting confirmation command, A plurality of types of commands including a door command and an operation detection command are transmitted. These commands are composed of 1-byte type data indicating the type of the command and 1-byte extended data indicating the content of the command. The sub-control unit 91 can determine the type of the command from the type data.

  The inserted number command is a command capable of specifying the inserted number of medals, that is, the number of medals used for setting the bet amount, and is a state from the end of the game (after changing the setting) to the start of the game. Or, when a medal is inserted in a state where the specified number of bets is not set, or when the MAXBET switch 6 is operated to set the number of bets, this is transmitted. Further, since the inserted number command is transmitted when the operation of setting the bet amount is performed, it is possible to specify that the operation of setting the bet amount has been performed by receiving the inserted number command.

  The credit command is a command capable of specifying the number of medals stored as credit, and is a state from the end of the game (after changing the setting) to the start of the game. In a state in which a specified number of bets is set, Sent when medals are inserted and credits are added.

  The game state command is a command capable of specifying the game state (RT0 to 4, RB) of the game, and is transmitted when the start switch 7 is operated to start the game.

  The ART state command is a command capable of specifying whether or not an AT is being performed, whether or not an ART is being performed, the number of remaining games until reaching a prescribed number of games described later, the number of remaining games in the precursor period, and the number of remaining games in the ART. , When the game has started, and is transmitted after the game state command.

  The internal winning command is a command capable of specifying an internal lottery result, and is transmitted when the start switch 7 is operated to start the game and after the ART state command. The internal winning command includes a first internal winning command and a second internal winning command, and a state in which the navigation notification is performed when the notification target role targeted for the navigation notification is won in the internal lottery (AT If the navigation notification is performed during or during non-AT), the first internal winning command that can specify the type of the winning notification target role and the stop order that is advantageous to the player is transmitted, and the navigation notification is performed. In the state where the notification is not performed (when the navigation notification is not performed during the non-AT), the type of the notified notification target role can be specified, but the stop order advantageous to the player cannot be specified, the second internal winning. Command is sent.

  Since the game state command, the ART state command, and the internal winning command are transmitted when the game is started by operating the start switch 7, by receiving these commands, the start switch 7 is operated to start the game. It can be specified.

  The freeze command is a command that can specify whether or not the game is controlled to be in a freeze state that delays the progress of the game for a predetermined period of time in the game, and when the game is controlled to be in the freeze state, the type thereof can be specified. And transmitted after transmitting the internal winning command.

  The ART lottery result command is a command capable of specifying whether or not an ART lottery or an additional lottery, which will be described later, has been won, the number of the selected ART games or the number of additional games, and is used when the game is started. Sent after transmission of an internal winning command in a game in which a lottery or an additional lottery is performed.

  The reel acceleration information command is a command that can specify that the rotation of the reel starts with the progress of the game, and is transmitted when the rotation of the reel starts with the progress of the game. It is also transmitted when the rotation of the reel is started along with the end of the freeze state. Therefore, after the start of the freeze state is specified by the freeze command, the reel acceleration information command is received, so that the game progresses according to the progress of the game. It is possible to specify not only the start of the rotation of the reel but also the end of the freeze state.

  The stop operation command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, and the area number of the stop operation position of the corresponding reel. It is transmitted each time the accompanying stop control is performed.

  The number of sliding frames command is a command capable of specifying whether the reel to be stopped is the left reel, the middle reel, or the right reel, or the number of sliding frames to be moved from when the corresponding reel is stopped to when it is stopped. Each time the stop control associated with the stop operation of each reel is performed, it is transmitted after the corresponding stop operation command is transmitted.

  The stop command is a command capable of specifying whether the reel to be stopped is the left reel, the middle reel, or the right reel, and the area number of the stop position of the corresponding reel, and the stop control accompanying the stop operation of each reel. Is transmitted after the corresponding slide frame number command is transmitted.

  The stop operation command, the number of sliding frames command, and the stop command can specify whether the reel to be stopped is a left reel, a middle reel, or a right reel, and is associated with the stop operation of each reel. Since the command is transmitted every time the stop control is performed, by receiving these commands, it is possible to specify that any one of the reels has been stopped and the reel to be stopped.

  The game end command is a command that can specify that the game has ended, and is transmitted when the player presses a stop switch to stop the third stop reel and releases the stop switch.

  The winning number command is a command capable of specifying the combination of symbols aligned on the winning line LN, the presence or absence of a winning, the type of winning, and the number of medals to be paid out at the time of winning, so that the player stops the third stop reel. This is when the stop switch is pressed down and the stop switch is released, and is transmitted after the transmission of the game end command.

  Since both the game end command and the winning number command are transmitted when the player presses the stop switch to stop the third stop reel and releases the stop switch, by receiving these commands, It is possible to specify that all the operations necessary to advance one game are completed.

  The payout start command is a command for notifying the start of payout of medals, and is transmitted when the payout of medals due to winning or the settlement of credits (including medals used for setting the number of bets) is started. The payout end command is a command for notifying the end of payout of medals, and is transmitted when payout of medals due to winning and credit settlement is completed.

  The standby command is a command indicating that a transition to a standby state is performed. After the end of one game, when the estimated end time (60 seconds in this embodiment) elapses without a bet amount being set and a transition is made to the standby state, a credit is issued. The payout of the medals by the settlement of the medals (including the medals used for setting the number of bets) is completed, and is transmitted after the payout end command is transmitted.

  The stop command is a command indicating the occurrence or release of the stop state. After the BB ends, the stop command indicating the occurrence of the stop state is transmitted when the ending effect waiting time has elapsed, and the reset operation is performed. At the time when the stop state is released, a stop command indicating the release of the stop state is transmitted.

  The error command is a command that indicates the occurrence or release of an error state and the type of the error state.When an error is determined, and when the state is controlled to the error state, an error command that indicates the occurrence and the type of the error state is transmitted and reset. When the operation is performed and the error state is released, an error command indicating the release of the error state is transmitted.

  The return command is a command indicating that the main control unit 41 has returned to the control state before the power failure, and is transmitted when the main control unit 41 has returned to the control state before the power failure at the time of activation.

  The setting command is a command that indicates the start or end of the setting change state, the setting value after the setting change, a setting command indicating the start of the setting change state is transmitted at the time of transition to the setting change state, and when the setting change state ends, A setting command indicating the end of the setting change state and the setting value after the setting change is transmitted. In addition, since the control state of the main control unit 41 is initialized along with the transition to the setting change state, it is possible to specify that the control state of the main control unit 41 has been initialized by the setting command indicating the start of setting. .

  The setting confirmation command is a command that indicates the start or end of the setting confirmation state. A setting confirmation command that indicates the start of the setting confirmation is sent when moving to the setting confirmation state, and a setting that indicates the end of the setting confirmation when the setting confirmation state ends. A confirmation command is sent.

  The door command is a command indicating the detection state of the door open detection switch 25, that is, on (open state) / off (closed state), at power-on, at the end of one game (after the end of the game, the bet amount of the next game). Before the setting can be started) and when the detection state of the door opening detection switch 25 changes (from on to off, from off to on).

  The operation detection command is a command indicating a detection state (on / off) of operation switches (MAX BET switch 6, start switch 7, stop switch 8L, 8C, 8R), and is transmitted at regular intervals.

  Of these commands, commands other than the door command and the operation detection command are generated in the main processing, temporarily stored in a command queue provided in the RAM 41c, and transmitted in the subsequent command transmission processing of the timer interrupt processing (main). You.

  On the other hand, the door command is generated in the door monitoring process of the timer interruption process (main), is temporarily stored in a command queue provided in the RAM 41c, and is transmitted in the subsequent command transmission process of the timer interruption process (main). You.

  The operation detection command is generated based on the detection state of the switch every time the command transmission processing of the timer interrupt processing (main) is executed ten times, and is temporarily stored in a command queue provided in the RAM 41c. Is transmitted in the command transmission processing of the subsequent timer interruption processing (main).

  Next, the control of the effect performed by the sub-control unit 91 based on the command transmitted from the main control unit 41 to the effect control board 90 will be described. When receiving a command from the main control unit 41, the sub control unit 91 executes a command reception interrupt process. In the command reception interrupt processing, the command acquired from the command transmission line is stored in a reception buffer provided in the RAM 91c.

  In the timer interrupt processing (sub), the sub control unit 91 determines whether or not an unprocessed command is stored in the reception buffer. The control pattern table stored in the ROM 91b is referred to based on the command received in the step, and the liquid crystal display 51, the effect LED 52, the speakers 53 and 54, the reel LED 55, and the like are controlled based on the control contents registered in the control pattern table. Controls the output of various effect devices. In the control pattern table, for each of a plurality of types of effect patterns, a display pattern of the liquid crystal display 51 corresponding to the type of command, a lighting mode of the effect LED 52, an output mode of the speakers 53 and 54, a lighting mode of the reel LED 55, and the like. The control patterns of these effect devices are registered, and upon receiving the command, the sub-control unit 91 sets the control pattern of the control pattern registered in the control pattern table corresponding to the effect pattern set in the RAM 91c in the game. The control device refers to the control pattern corresponding to the type of the received command, and controls the output of the effect device based on the control pattern. As a result, an effect according to the effect pattern and the progress of the game is executed.

  When a new command is received during the execution of the effect triggered by the reception of a certain command, the sub-control unit 91 stops the effect based on the control pattern being executed, and returns to the newly received command. An effect based on the corresponding control pattern is executed. In other words, when a new command is received even in a state where the production has not been completed to the end, the production that was being executed is canceled and a new production is performed unless the received new command is not a command that triggers a new production. An effect based on the command will be executed.

  The effect pattern is selected at the selection rate according to the result of the internal lottery indicated by the internal winning command when the internal winning command is received, and is set in the RAM 91c. The selection rate of the effect pattern is registered in the effect table stored in the ROM 91b. When the internal control command is received, the sub-control unit 91 sets the effect in the effect table according to the result of the internal lottery indicated by the internal win command. With reference to the registered selection rate, one of a plurality of effect patterns is selected from the plurality of effect patterns in accordance with the selected rate, and the selected effect pattern is set as the effect pattern of the game in the RAM 91c. Also, even if the same command is received, different control patterns are selected depending on the effect pattern selected at the time of receiving the internal winning command, and as a result, different effects may be performed depending on the effect pattern.

  In the slot machine 1 according to the present embodiment, the main control unit 41 executes a navigation period for notifying the stop order that is advantageous to the player according to the internal lottery result by the lighting mode of the game auxiliary display 12 and a navigation period. It can be controlled at a certain assist time (hereinafter, referred to as AT).

  When controlled by the AT, the main control unit 41 executes the navigation notification by winning the navigation target combination according to the gaming state, and transmits a pressing order command to the sub control unit 91. Thus, the navigation effect using the liquid crystal display 51 or the like is executed. Further, in the present embodiment, even in a normal state where the AT is not controlled, the main control unit 41 can execute the navigation notification and the navigation effect by satisfying a certain condition.

  FIG. 6 is an address map of a memory area used by the main control unit 41. As shown in FIG. 6, the memory area used by the main control unit 41 includes a memory area (0000H to 7FFFH) allocated to the ROM 41b and a memory area (F000H to FFFFH) allocated to the RAM 41c.

  The memory area of the ROM 41b includes a program / data area (0000H to 26FFH) in which programs and fixed data are stored, a ROM comment area (2700H to 277FH) in which arbitrary data such as a program title and version can be set, A vector table area (2780H to 27A7H) in which an upper address of a subroutine of a CALLV instruction to be executed and a start address of a timer interrupt process (main) are set, and parameters for setting internal functions of the main control unit 41 by hardware. Are set, and an unused area (2800H to 7FFFH) where access is prohibited is included.

  The parameters set in the HW parameter area in the ROM 41b include the last address (HPREND) of the ROM area used in the program / data area, the start address (HRAMSTAT) and the last address (HRAMEND) of the RAM area whose access is prohibited.

  The memory area of the RAM 41c includes an available area (F000H to F400H) that can be used as a work, and an internal function register area (F4B0H to F4B0H) in which a register group for controlling each function mounted on the main control unit 41 is stored. F6FFH) and unused areas where access is prohibited (F401H to F4AFH, F700H to FFFFH).

  FIG. 7 is an address map of the program / data area in the ROM 41b and the usable area in the RAM 41c of the main control unit 41.

  As shown in FIG. 7A, the program / data area in the ROM 41b includes a game program area in which a game program related to the progress of the game is stored, a game data area in which game data used by the game program is stored, It includes a use area 1, a non-game program area in which a non-game program not related to the progress of the game is stored, a non-game data area in which non-game data used by the non-game program is stored, and an unused area 2. .

  The progress of the game is to advance a series of processes constituting the game. In the case of a slot machine, the number of bets is set and the game can be started. Advancing a step of causing the reel to stop, deriving a display result, and giving a value such as a medal according to the display result.

  A game program area related to the progress of the game and a non-game program not related to the progress of the game are separately allocated, and are allocated rearward in the storage area of the ROM 41b among the game program area and the non-program area. Since the unused area 1 having at least 16 bytes or more is allocated to the area before the non-program area, the storage area includes a game program area related to the progress of the game and a non-game program not related to the progress of the game. Can be easily specified according to the difference between

  Further, the game program area and the game data area, and the non-game program area and the non-game data area are respectively allocated to continuous areas, while the game program area and the game data area related to the progress of the game and the non-game data area related to the progress of the game. Since the game program and the non-game data area are allocated to areas that are not continuous across the unused area 1 of at least 16 bytes or more, the game program area and the game data area related to the progress of the game and the A non-game program and a non-game data area that are not related can be easily specified according to the difference in the storage area.

  In the above description, “before and after the storage area” means the magnitude relationship of the address values assigned to the storage area, with the smaller address being the front and the larger address being the rear. For this reason, a storage area allocated behind one storage area corresponds to a storage area having an address value larger than that of one storage area, and a storage area allocated ahead of one storage area. , A storage area having an address value smaller than that of one storage area.

  Further, a configuration may be adopted in which a game program is allocated behind the non-game program area, and an unused area is allocated in front of the game program allocated behind the non-game program area. A game program area related to the progress of the game and a non-game program not related to the progress of the game can be easily specified according to the difference in the storage area.

  Further, the game program area and the non-game program area may be assigned to areas adjacent to each other with the unused area 1 interposed therebetween. A non-game program irrespective of the progress of the game can be easily specified according to the difference in the storage area.

  Further, in the unused areas 1 and 2 of the program / data area of the ROM 41b, since 0 values are stored in all areas, a game program area and a game data area, a non-game program area and a non-game data, The unused areas 1 and 2 can be easily distinguished from each other, and even when illegal data is stored in the unused areas 1 and 2, it can be easily found.

  It should be noted that the configuration may be such that 1 is stored in all the unused areas 1 and 2 of the program / data area of the ROM 41b. Even in such a configuration, the game program area and the game data area and the non-game The program area and the non-game data can be easily distinguished from the unused areas 1 and 2, and even if the unused areas 1 and 2 contain illegal data, it can be easily found. .

  Further, if the configuration is such that the game program area and the non-game program area are assigned to separate areas, the game program area and the non-game program area may be configured to be applied to adjacent areas. Even with such a configuration, a game program area related to the progress of the game and a non-game program not related to the progress of the game can be easily specified according to the difference in the storage area.

  In addition, both the game program area and the non-game program area start from the address (0H) of the same lower 4 digits when the address is expressed in binary notation, and the program / data area of the ROM 41b. Among them, the game program area related to the progress of the game and the non-game program area not related to the progress of the game can be easily distinguished from other areas.

  In addition, both the game program area and the non-game program area not only start from the address of the same lower 4 digits when the address is expressed in binary but also the lower 1 digit when the address is expressed in hexadecimal. Starts from the same address (0H) of 0, so that the game program area and the non-game program area can be easily distinguished from other areas not only in the case where the address is expressed in binary but also in the case where the address is expressed in hexadecimal. can do.

  In both the game program area and the non-game program area, regardless of whether the address is expressed in binary or hexadecimal, the lower N (N is a natural number of 1 or more) digits starts from the address having the same value. With such a configuration, the game program area and the non-game program area can be easily distinguished from other areas. For example, the lower N (N is a natural number of 1 or more) digit having the same value of 1 The same effect can be obtained with a configuration starting from the address of

  As shown in FIG. 7B, the usable area of the RAM 41c includes a game RAM area used as a work by the game program, a non-game RAM area used as a work by the non-game program, and an unused area 4. The game RAM area includes a special work, an important work, a general work, an unused area 3, and a game stack area in which a game program saves data. The non-game RAM area includes a game stack area. It includes an area that can be referenced by a program, an area that cannot be referenced by a game program, and a non-game stack area in which a non-game program saves data. In the present embodiment, the game stack area and the non-game stack area are individually provided in different areas. However, a configuration in which one stack area shared by the game program and the non-game program may be provided.

  The unused area 3 is an area in which neither the game program nor the non-game program is used, and is a surplus area with respect to the game RAM area having a predetermined capacity.

  The unused area 4 is an area of 16 bytes or more in which neither the game program nor the non-game program is used. Since the game RAM area and the non-game RAM area are allocated to areas that are not continuous across the unused area 4, the game RAM area used by the game program related to the progress of the game and the non-game RAM area not related to the progress of the game The non-game RAM area used by the game program can be easily specified according to the difference in the storage area.

  Hereinafter, the game program area, the game data area, and the game RAM area may be collectively referred to as a game area, and the non-game program area, the non-game data area, and the non-game RAM area may be collectively referred to as a non-game area. . The unused area 1 and the unused area 2, the unused area 3 and the unused area 4 may be collectively referred to as an unused area.

  When the main control unit 41 accesses a prohibited area of the program / data area of the ROM 41b based on a parameter set in the HW parameter area, the access is permitted in an available area of the RAM 41c. When an area other than the set area is accessed, when an area other than the program / data area in the ROM 41b is accessed, and when an area other than the usable area in the RAM 41c is accessed, In other words, when an illegal access is reset when an access is made to a memory area that cannot be accessed in a normal operation, the progress of the game is disabled. If an unauthorized program is stored in an unused area or the like of the RAM 41c, Even, it is possible to prevent illegal program from being executed.

  In particular, in the present embodiment, a game program area and a non-game program area are allocated to a program / data area of the ROM 41b to which access is permitted by a program, and the program / data area is located before the non-game program area behind the game program area. An unused area 1 is allocated to the area, and a lump of the program / data area including the area from the start address of the game program area to the end address of the non-game program is set based on the parameters set in the HW parameter area. Access to the area (the area from the game program area to the non-game data area) is set to be permitted all at once, while the other areas, that is, the game program, game data, non-game program, Non-game data is not stored Because it is forbidden access to the area later than trick data, it is possible to prevent conducted unintended control by malware or illegal data.

  Further, in the program / data area of the ROM 41b, the access of which is permitted by the program, a game area is allocated behind the non-game program area, and an unused area is provided in an area before the game program area behind the non-game program area. Is assigned and, based on the parameters set in the HW parameter area, access to a group of areas including the area from the start address of the non-game program area to the end address of the game program in the program / data area is collectively performed. Even if access is set to be permitted while access to other areas is prohibited, unintended control by an unauthorized program or data can be prevented.

  A game program area and a non-game program area are allocated to the program / data area, and an unused area 1 is allocated to an area in front of the non-game program area behind the game program area. Of the areas, one area including the game program area (the area from the game program area to the game data area) and one area including the non-game program (the area from the non-game program area to the non-game data area) A configuration may be adopted in which access is set to allow access and access to other areas is prohibited. Even in such a configuration, access is made to an area of the program / data area where no game program or non-game program is stored. Access is prohibited, the intention of malicious programs and data Can be prevented without control will take place. Further, in the program / data area of the ROM 41b to which access is permitted by the program, a game area is allocated behind the non-game program area, and an unused area is provided in an area before the game program area behind the non-game program area. Are allocated, and among the program / data areas, a group including the game program area (area from the game program area to the game data area) and a group including the non-game program (from the non-game program area to the non-game Access to the data area) and access to other areas may be prohibited. Even in such a configuration, a game program or a non-game Access to an area where no program is stored Because There is inhibited, it is possible to prevent conducted unintended control by malware or illegal data.

  Further, in the above description, the area to which access is permitted in the program / data area itself is set. However, by setting the area to which access is prohibited in the program / data area, the area to which access is indirectly set is set. It is good also as a structure performed.

  The main control unit 41 determines, based on the parameters set in the HW parameter area, that the user program is executed in an area other than the designated area where the program traveling is permitted, that is, that the user program is executed in a normal operation. When the user program is executed in the non-existing area, the IAT circuit 506a outputs the IAT generation signal, thereby disabling the progress of the game. Therefore, the unused area of the ROM 41b, the area unrelated to the operation, and the unoccupied area of the RAM 41c. Even if an unauthorized program is stored in the use area or the like, the execution of the unauthorized program can be prevented.

  In particular, in the present embodiment, a game program area and a non-game program area are allocated to a program / data area of the ROM 41b to which access is permitted by a program, and the program / data area is located before the non-game program area behind the game program area. The unused area 1 is allocated to the area, and the IAT circuit 506a permits the program running for each of the game program area and the non-game program area in the program / data area based on the parameters set in the HW parameter area. While the area is set as the designated area, program running in other areas, that is, areas where the game program or the non-game program is not stored in the program / data area is prohibited. Control line It can be prevented been.

  Further, in the program / data area of the ROM 41b, the access of which is permitted by the program, a game area is allocated behind the non-game program area, and an unused area is provided in an area before the game program area behind the non-game program area. Is assigned, and based on the parameters set in the HW parameter area, the IAT circuit 506a sets each of the game program area and the non-game program area in the program / data area as a designated area in which the program running is permitted. Thus, even if the program running in other areas is prohibited, it is possible to prevent unintended control by an unauthorized program or unauthorized data from being performed.

  Note that a game program area and a non-game program area are allocated to the program / data area, an unused area 1 is allocated to an area in front of the non-game program area behind the game program area, and an HW parameter area is allocated. Based on the parameters set in (1), a group of areas (areas from the game program area to the non-game data area) including the area from the start address of the game program area to the last address of the non-game program in the program / data area , The IAT circuit 506a may collectively set the designated area for permitting the program running and prohibit the program running in other areas. Even in such a configuration, the program / data area Of which game programs and non-game programs are stored Since the program running in the absence area is prohibited, it is possible to prevent conducted unintended control by malware or illegal data. Further, in the program / data area of the ROM 41b, the access of which is permitted by the program, a game area is allocated behind the non-game program area, and an unused area is provided in the area before the game program area behind the non-game program area. Are assigned, and based on the parameters set in the HW parameter area, a group of areas (from the game program area to the end address of the game program) including the area from the start address of the non-game program area to the end address of the game program in the program / data area The area up to the non-game data area) is collectively set by the IAT circuit 506a as a designated area where program running is permitted, and program running in other areas is prohibited. Unintended control It can be prevented been.

  In the above description, the program / data area is configured to set the area in which the program running is permitted. However, by setting the program / data area in which the program running is prohibited, the program running is indirectly permitted. A configuration in which an area is set may be adopted.

  The program executed by the main control unit 41 includes a main routine for managing the progress of the entire program, and a subroutine called during execution of another program.

  Also, a CALL instruction is included as an instruction for causing the main control unit 41 to execute a program stored in the program / data area.

  The CALL instruction is an instruction to call and execute a subroutine stored at an address designated in a main routine or a subroutine. When calling the subroutine by the CALL instruction, the main control unit 41 stores the address of the caller in the stack area, calls and executes the subroutine stored at the specified address. Then, after the subroutine ends, the process returns to the address of the caller stored in the stack area, that is, the main routine or the subroutine program of the caller who has executed the CALL instruction.

  The CALL instruction includes a normal CALL instruction and a CALLV instruction which is a special CALL instruction. A normal CALL instruction is an instruction that specifies an upper address and a lower address to specify both an upper address and a lower address and specifies an address and calls a subroutine, whereas a CALLV instruction specifies only a lower address. By doing so, the subroutine is called by specifying an address based on an upper address preset in the vector table area of the ROM 41b and a specified lower address, and calls the subroutine with a smaller amount of data compared to a normal CALL instruction. It becomes possible.

  The RST instruction is an instruction for calling a subroutine stored at a specific address corresponding to a specified value to execute by designating a value corresponding to a plurality of predetermined specific addresses. A subroutine can be called with a smaller amount of data than an instruction or a CALLV instruction. When calling the subroutine by the RST instruction, the main control unit 41 stores the address of the caller in the stack area, calls and executes the subroutine stored at the specific address corresponding to the designated value. After the subroutine ends, the process returns to the address of the caller stored in the stack area, that is, the main routine or the subroutine of the caller who has executed the RST instruction.

  The jump instruction is an instruction for moving to a program stored at an address specified in a main routine or a subroutine. The main control unit 41 moves to the program stored at the address specified by the jump command, and executes the destination program. In this case, unlike the CALL instruction or the RST instruction, even if the program after the movement ends, the program does not return to the source program.

  The main control unit 41 includes an LD instruction as an instruction to read data stored in the program / data area. The LD instruction is an instruction for reading data stored at an address specified in a main routine or a subroutine into a specified register. The main control unit 41 reads the data stored at the address specified by the LD instruction, and stores the read data in the register specified by the LD instruction.

  A subroutine frequently used among the game programs stored in the ROM 41b is stored in a region of the game program region of the ROM 41b where the start address is a specific value (for example, 00H). On the other hand, in the vector table area of the ROM 41b, a specific value is set as an upper address of a subroutine called by the CALLV instruction. Then, when calling the subroutine in which the upper address of the top address becomes the specific value, the main control unit 41 specifies only the lower address using the CALLV instruction, thereby changing the specific value set in the vector table area as the upper address. Then, the lower address specified as the lower address is specified, and the subroutine stored at the combined upper and lower addresses is called and executed. For this reason, an upper address constituting a part of an address used when calling a particularly frequently used subroutine in the game program is set in the vector table in advance as a specific value, and based on the specific value set in the vector table. Address, the subroutine can be called with a smaller amount of data as compared with a normal CALL instruction for calling a program by designating both the upper address and the lower address. It is possible to reduce waste of a program for specifying an address.

  A particularly frequently used subroutine among the non-game programs stored in the ROM 41b is stored in an area of the non-game program area of the ROM 41b where the start address is a specific value, and a CALLV instruction is stored in a vector table area of the ROM 41b. By setting a specific value as an upper address of a subroutine to be called in the subroutine, and when the main control unit 41 calls a subroutine in which the upper address of the leading address has a specific value, only the lower address is specified by using the CALLV instruction. , The subroutine can be called with a smaller amount of data compared to a normal CALL instruction that calls a program by specifying both the upper address and the lower address. When calling It is possible to reduce the waste of program for specifying the address.

  Further, a configuration may be adopted in which the upper address used when calling by the CALLV instruction is set in a specific register of the main control unit 41 instead of the vector table area.

  In addition to the CALLV instruction, a part of the address is specified by using a value stored in a vector table area, a value set in a specific register, and the like, and by specifying the remaining part of the address, With a configuration using a special CALL instruction that can specify the storage address of a subroutine, it is possible to reduce waste of a program for specifying an address when calling a subroutine. In addition, an identification value having a smaller data amount than an address is assigned to each of a plurality of areas constituting the vector table area, and a storage address of a subroutine is set to each of the plurality of areas. Even with a configuration using a special CALL instruction capable of specifying a storage address of a subroutine stored in an area corresponding to a value, it is possible to reduce waste of a program for specifying an address when calling a subroutine. .

  In addition, game data that is particularly frequently used among game data stored in the ROM 41b is stored in a region of the game data area of the ROM 41b where a head address is a specific value, and a special LD is stored in a vector table area of the ROM 41b. By setting a specific value as the upper address of the data to be read by the instruction, and when the main control unit 41 calls game data in which the upper address of the top address becomes the specific value, the lower address is specified using a special LD instruction. Even in the case where the game data is read out, it is possible to call out the game data with a smaller amount of data as compared with a normal LD instruction for reading out the data by specifying both the upper address and the lower address. Of the program for specifying the address when reading the game data of It can be reduced.

  In addition, the non-game data that is particularly frequently used among the non-game data stored in the ROM 41b is stored in an area of the non-game data area of the ROM 41b where the top address is a specific value, and is stored in the vector table area of the ROM 41b. When a specific value is set as an upper address of data to be read by a special LD instruction, and when the main control unit 41 calls non-game data in which the upper address of the top address has a specific value, only the lower address is used by using the special LD instruction. By designating, even when the non-game data is read, the non-game data is called with a smaller amount of data as compared with a normal LD instruction for reading data by specifying both the upper address and the lower address. And a process for specifying an address when reading these non-game data. It is possible to reduce the waste of lamb.

  Also in these cases, a configuration may be adopted in which the upper address used when calling with a special LD instruction is set in a specific register of the main control unit 41 instead of the vector table area.

  Part of the address is specified using the value stored in the vector table area, the value set in a specific register, etc., and the data storage address can be specified by specifying the remaining part of the address. With a configuration using a special LD instruction, it is possible to reduce waste of a program for specifying an address when reading data. In addition, an identification value having a smaller data amount than an address is assigned to each of a plurality of areas constituting the vector table area, and a data storage address is set for each of the plurality of areas, and the identification value is specified to specify the identification value. Even with a configuration using a special LD instruction that can specify a storage address of data stored in an area corresponding to a value, it is possible to reduce waste of a program for specifying an address when reading data. .

  The main control unit 41 is activated when a system reset by input of a system reset signal, a WDT reset by the WDT 506b, and the above-mentioned illegal access reset occur. At this time, the value set in the vector table area, that is, The upper address of the subroutine of the CALLV instruction and the start address of the timer interrupt processing (main) are values indicating the area where the program or the like is actually stored in the program area, or FFFFH (in the unused vector table area). Is determined, and if the value set in the vector table area is neither a value indicating the outside of the area where the program is set nor FFFFH, it does not start up. Unintended processing may be executed due to the occurrence of interrupts, etc. It can be prevented before.

  The game program is a program related to the progress of the game, and is a program for executing a process that hinders the progress of the game unless a process based on the program is executed. On the other hand, the non-game program is a program that is not related to the progress of the game, and even if it is called from the game program and returns to the game program without executing the processing based on the program, the game can be advanced. This is a program for executing processing.

  As shown in FIG. 8, the game program includes a game dedicated program included only in the game program, and a common determination program and a common general-purpose program included in both the game program and the non-game program.

  The game-dedicated program includes, for example, a game start waiting process, an internal lottery process, a reel control process, a game end setting process, an external output 1 process, an initial setting process, a power interruption process, and an error process. The game start waiting process is for setting the bet amount by inserting medals or the like after the control of one game is completed, and starting the game by operating the start switch 7 after the specified number of bets is set. The internal lottery process is a process of performing an internal lottery and setting a winning flag, and the reel control process is to start rotation of the reels and to operate the stop switches 8L, 8C, 8R. In the game end setting process, it is determined whether or not a prize has occurred according to the stop position of the stopped reel, payout of medals, setting of re-games, The external output 1 process is a process for performing transition or the like, and the external output 1 process is a process for controlling the output of the medal IN signal, the medal OUT signal, the RB signal, the BB signal, and the RT signal among the external output signals. , First The setting process is a process for enabling the game when the power is turned on (backup abnormality confirmation, register initialization, etc.). The power interruption process can return to the state before the power interruption after the power interruption occurs. The error processing includes various kinds of abnormalities (medal insertion abnormality, foreign object detection in the medal selector 29, reel rotation abnormality, medal payout abnormality, foreign matter detection near the payout exit, RAM abnormality, setting, etc.). This is a process for disabling the game when a value abnormality, empty hopper tank 34a, full tank detection of overflow tank 35, etc.) are detected. Although not specifically shown, the game program also includes processing related to the above-described AT (such as lottery related to the AT and control related to navigation notification).

  The common determination program in the game program includes, for example, an insertion determination process and a payout determination process. The insertion determination process is a process of determining whether or not a medal is normally passed by the inserted medal sensor 31, and is a process executed in a state where medals can be inserted for setting a bet amount or the like. The payout determination process is a process of determining whether or not the medal is normally passed by the payout sensor 34c, and is a process executed in a state in which the payout of the medal is permitted at the time of winning a small combination or at the time of credit settlement. It is.

  The common general-purpose program in the game program is a process called and executed from a plurality of types of processes constituting the game program. For example, a counter update process, a port input process, a data conversion process, an LED display process, a data setting process, Including command setting processing. The counter update process is a process for updating a designated counter value, the port input process is a process for acquiring an input state of a designated port, and the data conversion process is a process for inputting game data. The LED display process is a process of setting the designated value to be displayed on the LED, and the data setting process is a process of setting the designated data. The command setting process is a process of setting a specified command in a command queue.

  In particular, when an abnormality is detected as described above, the game program executes a reset condition (such as a random number abnormality, a RAM abnormality, a backup abnormality, or a setting value abnormality in the case of a setting value abnormality, Error processing to disable the progress of the game until a reset operation is established in the case of an abnormality other than the above.

  As shown in FIG. 8, the non-game program includes a non-game dedicated program included only in the non-game program, and a common determination program and a common general-purpose program that are the same as the game program.

  Non-gaming dedicated programs include, for example, test signal output processing, foreign object detection processing, door monitoring processing, external output 2 processing, inserted medal error determination processing, payout medal error determination processing, power failure determination processing, normal command transmission processing, power interruption Time command transmission processing. The test signal output process is a process for outputting a test signal generated in association with the result of the game, and the foreign object detection process is a process for detecting a foreign object in the medal passage by the slot sensor 26, The door monitoring process is a process for detecting the opening of the front door 1b, and the external output 2 process is a process of detecting a security signal (a door opening signal, a setting change signal, a closing error signal, a dispensing error signal) among the external output signals. This is a process for performing output control. In the inserted medal error determination process, based on the detection status of the inserted medal sensor 31, detection of a backflow of the inserted medal, detection of a clogged medal in the medal selector 29, and detection of a foreign object in the medal selector 29 are performed. The payout medal error determination processing is performed based on the detection state of the payout sensor 34c. The power failure determination process is a process for determining whether or not a voltage drop signal from the power interruption detection circuit 48 has been detected. The transmission process is a process for transmitting, to the sub-control unit 91, one command set first among the commands set in the command queue by the command setting process of the game dedicated program and the non-game dedicated program. The power-off command transmission process is a process for transmitting all commands set in the command queue to the sub-control unit 91.

  The common general-purpose program in the non-game program is a process called and executed from a plurality of types of processes constituting the non-game program, and like the common general-purpose program in the game program, for example, a counter update process, a port input process, It includes data conversion processing, LED display processing, data setting processing, and command setting processing.

  The non-game program includes a process of determining whether or not a predetermined detection state is based on the detection state of the detection means (the insertion port sensor 26, the full tank sensor 35a, and the door open detection switch 25) which are not related to the progress of the game.

  Further, the non-game program functions as a detection means relating to the progress of the game in a specific control state among a plurality of control states (game start waiting processing, internal lottery processing, reel control processing, game end setting processing). In other control states, the detecting means (for example, the inserted medal sensor 31 and the payout sensor 34c) functioning as detecting means not related to the progress of the game is based on the detection state in the control state not related to the progress of the game. A process of determining whether or not a predetermined detection situation is present (for example, a process of detecting inserted medals and a process of detecting paid-out medals for detecting an abnormality due to detection of insertion of medals during spinning of the reels and payout of medals). Including. In addition, since such a determination process is the same process as determining whether or not a predetermined detection status is based on a detection status in a control state related to the progress of a game in a game program, it corresponds to a common determination program. .

  In the processing included in the game program, the external output 1 processing, the processing of counting the number of inserted medals in the game start waiting processing, the processing of switching the flow path switching solenoid 30, and the number of medals paid out in the game end setting processing are performed. Processing that is not directly related to the progress of the game, such as counting, processing for detecting that the hopper tank 34a has been emptied, processing for updating software random numbers, processing related to AT, transmission of internal winning commands, etc. If so, all or a part of these processes may be included in the non-game program. On the other hand, all or some of the processes included in the non-game program may be included in the game program as long as they are indirectly related to the progress of the game.

  In the present embodiment, as shown in FIG. 9, the CPU 41a of the main control unit 41 calls the non-game program in the process based on the game program, executes the process based on the non-game program, and executes the process based on the non-game program. Then, the process returns to the process based on the game program.

  As shown in FIG. 9, the CPU 41a executes the processing based on the game program with reference to the game data in the game data area, and uses the game RAM area as a work when executing the processing based on the game program in principle. It is possible to refer to and update the contents of the game RAM area. In addition, when executing the processing based on the non-gaming program in principle, the CPU 41a executes the processing based on the non-gaming program with reference to the game data in the non-gaming data area, and uses the non-gaming RAM area as a work, It is possible to refer to and update the contents of the non-game RAM area.

  Further, in executing the processing based on the game program, the CPU 41a does not refer to the non-game data area and does not update the non-game RAM area, but can refer to the non-game RAM area. In executing the processing based on the non-game program, the game RAM area is not updated and the game RAM area is not updated, but the game RAM area can be referred to.

  In addition, the processing based on the game program can refer only to a specific area (for example, an error flag setting area indicating abnormality detection) of the non-game RAM area necessary for the game program. In the processing based on the game RAM area, only a specific area necessary for the non-game program (for example, an internal winning flag setting area, a game state setting area, an RT setting area, and the like) can be referred to. In addition, a specific area in the non-game RAM area where processing based on the game program can be referred to, and a specific area in the game RAM area where processing based on the non-game program can be referred to may be assigned to consecutive address areas. Although preferred, a configuration in which a part or the whole is allocated to a discontinuous address area may be used.

  As described above, in the present embodiment, a game program area in which a game program relating to the progress of a game is stored, a game data area in which game data referred to by the game program is stored in a readable manner, and work data referred to by the game program. Is stored in a readable and writable manner, a non-game program area in which a non-game program which is a program called by the game program and is not related to the progress of the game is stored, and a non-game referenced by the non-game program Since a non-game data area in which data is stored in a readable manner and a non-game RAM area in which work data referenced by the non-game program is stored in a readable and writable manner are separately allocated, a game program, Game data and game program work data, Game program, the workpiece data of the non game data and non-game program, can be easily identified according to a difference in the storage area.

  Also, by dividing the game program area and the game data area from the non-game program area and the non-game data area, the area occupied in the ROM 41b can be compactly managed according to each function. It becomes even easier to identify the relevant data.

  Further, in the present embodiment, it is possible to refer to the non-game RAM area when executing the game program, and to refer to the game RAM area when executing the non-game program. In executing the game program, the data used by the non-game program can be easily used, and in executing the non-game program, the data used by the game program can be easily used. On the other hand, when the game program is executed, it is impossible to update the non-game RAM area, and when the non-game program is executed, it is impossible to update the game RAM area. Does not affect the processing of the non-game program, and the non-game program does not affect the processing of the game program.

  Further, in the present embodiment, the processing based on the game program can refer only to a specific area required for the game program (for example, an error flag setting area indicating abnormality detection) in the non-game RAM area. The processing based on the non-gaming program can refer to only a specific area required for the non-gaming program (for example, an internal winning flag setting area, a game state setting area, an RT setting area, etc.) in the game RAM area. Since the data which can be referred to by the game program in the non-game RAM area and the data which can be referred to by the non-game program are limited to a specific area, the reference destination of the game program or the non-game program can be easily specified. be able to.

  As shown in FIG. 10A, the main control unit 41 of the present embodiment can call a non-game program from a process based on the game program during execution of the main process. As shown, it is possible to call a non-game program from a process based on the game program during execution of the timer interrupt process.

  As shown in FIG. 10A, when a non-game program is called from the main process based on the game program, the start address of the non-game program to be called is set in a specific area in the game program, and the common call process is performed. Execute 1. The common call process 1 is a process included in the game program. In the common call process 1, the register of the game program is saved in the game stack area, and the stack pointer (SP, an address indicating the current position of the game stack area) Is saved to the SP save area of the game RAM area, the timer interrupt is set to be prohibited by setting the value of the interrupt master permission flag to a value indicating that the interrupt is prohibited, and then set to a specific area. Call the non-gaming program at the address you are at.

  On the other hand, based on the called non-game program, the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program is set, and the processing of the non-game program is executed. Thereafter, the process returns to the calling game program, that is, the common calling process 1.

  After returning to the common call processing 1, the common call processing 1 releases the timer interrupt prohibition by setting the value of the interrupt master permission flag to a value indicating the interrupt permission, and saves the game stack area and the SP. Based on the data saved in the area, the register and the stack pointer of the game program are returned to the state before calling the non-game program, and the processing ends.

  As described above, in the present embodiment, when the game program calls the non-game program, the interrupt is set to be prohibited by the common calling process 1, and when returning from the non-game program to the game program, the interruption of the interrupt is set. Since the prohibition is released, the interrupt can be set to be prohibited during the period in which the non-game program is being executed.

  When the non-game program is called from the main process based on the game program, the non-game program sets various types of processing after first setting interrupts to be prohibited, and executes the last process of the non-game program. In this case, the interrupt can be set to be prohibited during the period in which the non-game program is executed, as in the present embodiment. Further, since the setting of prohibition and cancellation of the interrupt is performed by the non-game program, it is not necessary to set and cancel the prohibition of the interrupt in the common calling process 1 of the game program, and the capacity of the game program can be reduced. .

  As shown in FIG. 10B, when a non-game program is called from the timer interrupt processing based on the game program, the start address of the non-game program to be called is set in a specific area in the game program, and Execute call processing 2. In the common calling process 2, the register of the game program is saved in the game stack area, and the stack pointer (SP, the address indicating the current position of the game stack area) is saved in the SP save area of the game RAM area, and then specified. The non-game program of the address set in the area is called.

  On the other hand, the called non-game program sets the stack pointer of the non-game program, executes the process of the non-game program, and then returns to the common calling process 2 of the caller.

  After returning to the common calling process 2, the common calling process 2 sets the register and the stack pointer of the game program to the state before calling the non-game program based on the data saved in the game stack area and the SP save area. Return and end.

As described above, in the common call process 2, unlike the common call process 1, the timer interrupt is not set to be disabled or canceled, but as described above, the main control unit 41 performs other interrupts during execution of the timer interrupt process. Since the execution of the interruption process is prohibited, the interruption can be prohibited during the period in which the non-game program is being executed.

  In this embodiment, when the game program executes the common call process 1 and the common call process 2 to call the non-game program and execute the non-game program, the game program uses the register actually used by the game program. Since the process of saving and protecting all areas of the register is performed regardless of the presence or absence, when returning to the game program, it is possible to reliably return from the state at the time the non-game program was called .

  In addition, without executing the common calling process 1 and the common calling process 2, the value of the register used by the game program immediately before calling the non-game program from the process based on the game program in the game program is protected. After all the processing based on is completed, the configuration may be such that the value of the protected register is restored at the initial stage of returning to the game program. With such a configuration, the register may be restored before calling the non-game program. Is performed, and the register is restored after returning from the non-game program, so that the data stored in the register by the non-game program does not affect the game program.

  Further, when the non-game program is called, the non-game program first saves the stack pointer and the register of the game program, and restores the stack pointer and the register of the game program at the end of the non-game program. With such a configuration, as in the present embodiment, when returning to the game program, it is possible to reliably return from the state at the time the non-game program was called, and The capacity can be reduced.

  Next, various control contents executed by the main control unit 41 in the present embodiment will be described below with reference to FIGS.

  First, an initialization process executed by the main control unit 41 at the time of startup will be described. When the main control unit 41 is activated by the occurrence of a reset, the main control unit 41 performs a startup setting. In the setting at the time of starting, the status flag provided in the main control unit 41 is initialized. The status flag is data that holds the state of the operation result or execution result of the instruction, and particularly includes an interrupt master permission flag for setting the inhibition / permission of the interrupt. Since the initial value of the interrupt master permission flag is a value indicating that the interrupt is prohibited, the main control unit 41 starts up in a state where the interrupt is prohibited. After that, the main control unit 41 sets various functions with reference to the HW parameters, and then performs an initial setting process according to the program stored in the program / data area. In this embodiment, the initial setting process is included in the game program.

  As shown in FIG. 11, in the initial setting process, first, the value of the interrupt master permission flag is set to a value indicating that the interrupt is prohibited, thereby prohibiting the interrupt (Sa1). As described above, the main control unit 41 is activated in a state where the interrupt is prohibited, but in Sa1, the main control unit 41 prohibits the interrupt again. Next, initialization data is set (Sa2), and each output port including the parallel output port 513 is initialized (Sa3). Next, the internal register is set (Sa4).

  Next, it is determined whether or not the power supply voltage is normal (Sa5). If the power supply voltage is not normal, the determination is repeated until the power supply voltage becomes normal. If the power supply voltage is normal, the upper address of the interrupt vector is set (Sa6). Then, access to the RAM 41c is permitted (Sa7), and the stack pointer is initialized (Sa8).

  Next, the RAM parity of the game RAM area (the area of F000H to F1FFH including the game stack area and the unused area 3) in the available area of the RAM 41c is calculated (Sa9). Then, it is determined whether or not the calculated RAM parity is 0 (Sa10). As will be described later, if the power interruption processing (main) is normally performed at the time of the previous power-off, the RAM parity should be 0. Therefore, if the RAM parity is not 0 in the step Sd10, the game of the RAM 41c is executed. If the data stored in the RAM area is not normal, in this case, the process proceeds to step Sa13 to clear the destruction diagnosis data (Sa13). On the other hand, when the RAM parity becomes 0, destruction diagnosis data stored in the game RAM area is further acquired (Sa11), and it is determined whether or not the acquired destruction diagnosis data is correct (Sa12). The destruction diagnosis data is cleared (Sa13).

  Next, it is determined whether or not the setting key switch 37 is ON (Sa14). When the setting key switch 37 is in the ON state, the timer interrupt is set (Sa19). Specifically, a register of a timer circuit 509 incorporated in the main control unit 41 is set so that a timer interrupt is periodically executed at predetermined time intervals. In this embodiment, a value corresponding to about 0.56 ms is set in a predetermined register (time constant register), so that a timer interrupt is periodically generated about every 0.56 ms. In addition, in the timer circuit 509, by setting the register, the timer is initialized, and the timer starts counting from the initial value. When the setting of the timer interrupt in the step of Sa19 is completed, the processing shifts to the setting change processing.

  On the other hand, when the setting key switch 37 is in the OFF state, it is determined whether or not the storage content of the RAM 41c is destroyed (Sa15). In step Sa15, it is determined whether or not a RAM abnormality flag to be described later is set and whether or not the storage content of the RAM 41c is destroyed based on the determinations in Sa10 and Sa12. If the content stored in the RAM 41c has not been destroyed, a return command is transmitted to the sub control unit 91 (Sa16). Note that the case where the storage content of the RAM 41c is not destroyed means that the RAM abnormality flag is not set, the RAM parity is determined to be 0 in the step Sa10, and the destruction diagnosis data is further determined in the step Sa12. This is the case where it is determined to be correct.

  After the step Sa16, all the registers are restored based on the data stored in the game RAM area of the RAM 41c (Sa17), and the same timer interrupt setting as the step Sa19 is performed (Sa18). Then, the processing shifts to Sd24 processing of timer interrupt processing (main) described later. As a result, the state of the game RAM area and the non-game RAM area of the RAM 41c before the power interruption, and the processing executed before the power interruption is restored.

  If the content stored in the RAM 41c is destroyed in the step Sa15, a RAM abnormality flag indicating that the content stored in the RAM 41c is not normal is set in the RAM 41c (Sa20), and the process proceeds to error processing. In the error processing, the progress of the game is disabled. Further, in the error state in which the RAM abnormality flag is set and the state is shifted, the setting key switch 37 is turned on and the power switch 39 is turned on, so that the state can be canceled by shifting to the setting change processing. On the other hand, when the power switch 39 is turned on without setting the setting key switch 37 to the ON state, the RAM abnormality flag remains set, and it is determined in step Sa15 that the RAM is destroyed. The error state is returned again.

  Next, a setting change process executed by the main control unit 41 will be described. In the present embodiment, the setting change process is included in the game program.

  As shown in FIG. 12, the main control unit 41 first sets a start address of the RAM 41c, that is, a start address (F000H) of an available area in a register (Sb1). Next, it is determined whether or not the storage content of the RAM 41c has been destroyed (Sb2), similarly to the step of Sa15 shown in FIG. If the contents of the RAM 41c are not destroyed, that is, if the contents of the RAM are not abnormal, the start address of the initialization target RAM at the start of the setting change (the last address of the area where the important work is stored in the available area) The next address is set in the register (Sb3). That is, the address set in Sb1 is changed. If the contents of the RAM 41c are destroyed, that is, if the contents of the RAM are abnormal, the process proceeds to step Sb4.

  Next, the last address (F1FFH) of the game stack area (in use) is specified as the last address of the initialization target RAM (Sb4), the game area initialization process is executed, and the address specified in the step Sb1 or Sb3 starts. The area up to the final address of the initialization target RAM is initialized (Sb5). In step Sb1, the start address (F000H) of the usable area is set, so if the RAM content is abnormal, in step Sb5, all areas of the game RAM area of the RAM 41c are initialized. Becomes On the other hand, in step Sb3, the next address of the last address of the area where the special work is stored in the available area is set as the start address of the initialization target RAM at the start of the setting change. If not abnormal, in step Sb5, an area other than the special work in the game RAM area of the RAM 41c is initialized.

  Thereafter, a non-game area initialization process described later is executed to initialize the area from the start address of the unused area 4 to the last address of the non-game stack area (in use), that is, the unused area 4 and the non-game RAM area. (Sb6).

  Next, a setting command (start) indicating the start of the setting change state is transmitted to the sub control unit 91 (Sb7), and the interruption is permitted (Sb8).

  Next, it is determined whether the reset / setting switch 38 has changed from OFF to ON (Sb9). When the reset / setting switch 38 changes from OFF to ON, the set value of the register is updated (1 is added for 1 to 5, and 1 is updated for 6) (Sb10). If the reset / setting switch 38 has not changed, it is determined whether the start switch 7 has changed from OFF to ON (Sb11). If the start switch 7 has not changed, the process returns to step Sb7. On the other hand, when the start switch 7 changes from OFF to ON, it is determined whether the setting key switch 37 is in the OFF state (Sb12). If the setting key switch 37 is not in the OFF state, the process waits until the setting key switch 37 is turned off. When the setting key switch 37 is in the OFF state, the data of the set value set in the register is stored in the special work of the RAM 41c (Sb13).

  Next, a setting command (end) indicating the end of the setting change state is transmitted to the sub-control unit 91 (Sb14). Then, the start address of the initialization target RAM at the end of the setting change (the next address of the last address of the area where the special work is stored in the available area) is set in the register (Sb14), and the process proceeds to the main processing. .

  Next, a game area initialization process executed by the main control unit 41 will be described. In the present embodiment, the game area initialization processing is included in the game program.

  As shown in FIG. 13, the main control unit 41 acquires the start address and the end address of the initialization target RAM set in the register (Sf1). Then, the head address value is subtracted from the end address value of the initialization target RAM to calculate the capacity of the initialization target RAM (Sf2), and the calculated capacity of the initialization target RAM is set in the register (Sf3). The start address value of the initialization target RAM is set as the designated address (Sf4), and the 1-byte data stored at the designated address is overwritten with 0 and cleared (Sf5). Thereafter, the logical sum of the 1-byte data is calculated to determine whether or not the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to step Sf5, and the 1-byte data is returned again. Is overwritten with 0 and cleared. If it is determined in step Sf6 that the calculation result is 0, the designated address is updated to the address next to the address currently set as the designated address (Sf7), and the register is decremented by one. (Sf8), it is determined whether or not the register is 0 (Sf9).

  If it is determined in step Sf9 that the register is not 0, the process returns to step Sf5, and the processes in steps Sf5 to Sf9 are repeated until the register becomes 0. If it is determined in step Sf9 that the register is 0, the game area initialization processing ends, and the process returns to the calling program.

  As described above, in the game area initialization process of the present embodiment, by specifying the start address and the end address of the initialization target RAM, the capacity of the initialization target RAM is calculated, and the start address of the initialization target RAM is calculated. Then, by sequentially clearing the area corresponding to the capacity of the initialization target RAM, the designated initialization target RAM area of the game RAM area is initialized.

  In the game area initialization process of this embodiment, by specifying the start address and end address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address and end address, and The process of updating the specified address to the next address after clearing the data of the specified address with the address as the initial value of the specified address is repeatedly performed by the number of times corresponding to the capacity of the RAM to be initialized. Although the area from the address to the end address is initialized, by specifying the start address and end address of the RAM to be initialized, the start address is used as the initial value of the specified address, and the data of the specified address is After clearing, the process of updating the specified address to the next address is performed when the specified address is By repeatedly executed until the may be configured to area from the start address to be initialized RAM to the end address is initialized.

  Next, a non-game area initialization process executed by the main control unit 41 will be described. In this embodiment, the non-game area initialization processing is included in the non-game program.

  As shown in FIG. 14, the main control unit 41 sets the start address of the unused area 4 as the start address of the initialization target RAM (Sg1). Then, the head address value of the initialization target RAM (the head address value of the unused area 4) is subtracted from the last address value of the usable area of the RAM 41c to calculate the capacity of the initialization target RAM (Sg2). The capacity of the initialization target RAM is set in the register (Sg3). Also, the start address value of the initialization target RAM (the start address value of the unused area 4) is set as the designated address (Sg4), and the 1-byte data stored at the designated address is overwritten with 0 and cleared. (Sg5). Thereafter, the logical sum of the one-byte data is calculated, and it is determined whether the calculation result is 0 (Sf6). If the calculation result is not 0, the process returns to step Sg5, and the 1-byte data is again calculated. Is overwritten with 0 and cleared. If it is determined in step Sg6 that the calculation result is 0, the designated address is updated to the address next to the address currently set as the designated address (Sg7), and the register is decremented by one. (Sg8), it is determined whether or not the register is 0 (Sg9).

  If it is determined in step Sg9 that the register is not 0, the process returns to step Sg5, and the processes in steps Sg5 to Sg9 are repeated until the register becomes 0. If it is determined in step Sg9 that the register is 0, the non-gaming area initialization process ends, and the process returns to the calling program.

  As described above, in the non-game area initialization process of this embodiment, the RAM area corresponding to the capacity of the initialization target RAM is sequentially cleared from the start address of the initialization target RAM (the start address of the unused area 4). The area from the start address to the end address of the initialization target RAM, that is, the unused area 4 and the non-game RAM area are initialized.

  In the non-game area initialization process of this embodiment, by specifying the start address of the initialization target RAM, the capacity of the initialization target RAM is calculated based on the start address, and the start address is set to the specified address. The process of updating the specified address to the next address after clearing the data of the specified address as the initial value is repeatedly executed by the number of times of the capacity of the RAM to be initialized, so that the process from the start address to the end address of the RAM to be initialized is repeated. Area is initialized, but by specifying the start address and end address of the RAM to be initialized, the start address is used as the initial value of the specified address, and after the data of the specified address is cleared, the specified address is cleared. Is updated to the next address by repeatedly executing until the specified address becomes the end address. Area from the start address to be initialized RAM to the end address may be configured to be initialized.

  In the non-game area initialization process of the present embodiment, the start address of the unused area 4 is set as the start address of the initialization target RAM, so that the entire unused area 4 and the non-game RAM area are initialized. The non-game area initialization process may be any configuration as long as at least a part of the non-game RAM area is initialized, and initializes a part of the non-game RAM area. However, a part of the non-game RAM area and the unused area 4 may be initialized.

  Further, in the present embodiment, in the game area initialization processing and the non-game area initialization processing, the 1-byte data stored at the designated address is overwritten with 0 and cleared, and thereafter, the logic of the 1-byte data is cleared. The sum is calculated, and it is determined whether the calculation result is 0 or not (Sf6). If the calculation result is not 0, the process of overwriting and clearing 1 byte data with 0 again is performed, Although the configuration is such that the data at the address to be cleared is cleared, the configuration may be such that the 1-byte data stored at the specified address is overwritten with 0 and cleared.

  Next, a main process executed by the main control unit 41 will be described. The main processing is repeatedly executed for each game of one unit. One cycle of the main processing corresponds to one unit of the game. In this embodiment, the main process is included in the game program.

  As shown in FIG. 15, the main control unit 41 first prohibits an interrupt (Sc1). Next, the last address of the initialization target RAM (the last address of the game stack area (unused)) is set (Sc2).

  Next, a game area initialization process is executed to clear the area of the RAM 41c indicated by the specified address (Sc3). At this time, if the main processing is started after the setting change processing, when the setting change processing is completed, the area where the special work is stored in the available area is set as the head address of the initialization target RAM. Of the game stack area (unused) is set as the final address of the initialization target RAM in Sc2 of the main processing. And areas (important work, general work, unused area 3, stack area (unused)) other than the game stack area (in use) are initialized. At the end of a game that is not in a specific game state, the start address (start address of the unused area 3) of the initialization target RAM at the end of the game is set in the step of Sc10 described later, and the initialization is performed in the step of Sc2. Since the last address of the target RAM (the last address of the game stack area (unused)) is set, the unused area 3 and the game stack area (unused) among the available areas are initialized. At the end of the specific game state and at the end of the game, in the step Sc11 described later, the start address of the initialization target RAM at the end of the specific game state (a special work in the game RAM area is stored). In the step of Sc2, the final address of the initialization target RAM at the end of the specific gaming state (the final address of the game stack area (unused)) is set. Therefore, the general work, the unused area 3, and the game stack area (unused) in the game RAM area are initialized.

  After the initialization of the RAM in the step of Sc3, an interruption is permitted (Sc4), and a game start waiting process is executed (Sc5). In the game start waiting process, the process waits in a state where the number of bets can be set, sets a specified number of bets according to the game state, and starts the game when the start switch 7 is operated.

  Next, an internal lottery process is executed (Sc6). In the internal lottery process, it is determined whether the winning of each of the above combinations is permitted based on the random number value for the internal lottery latched at the same time as the start of the game by the detection of the start switch 7 in the step Sc5 (that is, the display result is derived). A process is performed to determine whether to allow or not.

  Next, a reel control process is executed (Sc7). In the reel control process, the process of rotating the reels 2L, 2C, 2R in response to the operation of the start switch 7, the result of the internal lottery in the step Sd2, and the operation of the stop switches 8L, 8C, 8R by the player are detected. In response to this, a process of stopping the rotation of the corresponding reels 2L, 2C, 2R is executed.

  Next, a game end time setting process is executed (Sc8). In the game end setting process, when it is determined in the process of Sc7 that the rotation of all the reels 2L, 2C, 2R has stopped, a prize is generated according to the display result derived on each of the reels 2L, 2C, 2R. A process is performed to determine whether or not it is. Then, when it is determined that a winning has occurred, processing such as adding credits and paying out medals is performed based on the number of payouts according to the winning. If a prize has been won, a process of setting a game state in preparation for the next game is executed after the payout of medals or the like is completed. If no winning has occurred, after the reels have stopped, a process of setting a gaming state in preparation for the next game is executed.

  When the game end time setting process ends, it is determined whether or not a specific game state has ended (Sc9). If the specific game state has not ended, the start address of the initialization target RAM at the time of game end is determined. Set (Sc10) and return to the step of Sc1. If it is the end of the specific game state, the start address of the initialization target RAM at the end of the specific game state is set (Sc11), and the process returns to the step of Sc1.

  In the main process, a command storing process of generating a command in accordance with the progress of the game and setting the command in a command queue is executed, and the set command is executed in a normal timer interrupt process (main). The command is transmitted to the sub-control unit 91 by the command transmission process.

  FIGS. 16 and 17 are flowcharts showing the control contents of the timer interrupt processing (main) which is executed by the main control unit 41 interrupting the main processing (mainly the main processing) at regular intervals (at intervals of about 0.56 ms). is there. The timer interrupt process (main) is a process executed by an interrupt generated according to the count of the timer circuit 509, and the address where the program of the timer interrupt process (main) is stored is a vector table. Is set as a value corresponding to the timer interrupt. Then, when a timer interrupt occurs, the processing from that address is executed. Further, other interrupts are automatically prohibited during the execution of the timer interrupt processing (main). In this embodiment, the timer interrupt processing (main) is included in the game program.

  As shown in FIG. 16, in the timer interrupt processing (main), first, the register in use is saved in the game stack area (Sd1).

  Next, a power failure determination process is performed (Sd2). In the power failure determination process, it is determined whether or not a voltage drop signal has been input from the power interruption detection circuit 48. If the voltage drop signal has been input, it is determined whether or not the voltage drop signal has been input in the previous power failure determination process. If a voltage drop signal is also input in the previous power failure determination process, it is determined that a power failure has occurred, and a power interruption flag indicating that fact is set.

  After the power failure determination process in step Sd2, it is determined whether or not the power failure flag is set (Sd3). If the power failure flag is not set, the process proceeds to Sd4, and the detection data of various switches is input from the input port. Performs port input processing for inputting. On the other hand, if the power interruption flag is set in the step Sd3, by executing the power interruption command transmission process, all the untransmitted commands set in the command queue are sent to the sub control unit 91. After the transmission (Sd25), the process proceeds to the power interruption processing (main).

  Next, the branch counter for identifying the timer interrupt to be executed in the timer interrupt processing (main) from the four types of timer interrupts 1 to 4 is advanced by 1 (Sd5). In step Sd5, 1 is added when the branch counter value is 0 to 2 and updated to 0 when the counter value is 3. That is, the branch counter value loops in the order of 0 → 1 → 2 → 3 → 0... Every time the timer interrupt processing (main) is executed.

  Next, it is determined with reference to the branch counter value whether it is 2 or 3, that is, whether it is timer interrupt 3 or timer interrupt 4 (Sd6), and if it is not timer interrupt 3 or timer interrupt 4, that is, if it is not timer interrupt 4, In the case of 1 or timer interrupt 2, a motor phase signal output process for outputting phase signal data of the reel motors 32C, 32C, 32R is executed (Sd7).

  Next, it is determined whether or not it is 1 by referring to the branch counter value, that is, whether or not it is the timer interrupt 2 (Sd8). If it is not the timer interrupt 2, that is, if it is the timer interrupt 1, the reel motor Reel start processing (Sd9) for controlling the step time interval at the start of 32L, 32C, 32R, motor step processing (Sd10) for changing the phase signal data of reel motors 32L, 32C, 32R, reel motors 32L, 32C , 32R are stopped, and after a lapse of a predetermined time, motor phase signal standby processing (Sd11) for changing the phase signal to one-phase excitation is sequentially performed, and then the process proceeds to step Sd24.

  If it is determined in step Sd8 that the interrupt is the timer interrupt 2, the normal command transmission process (Sd12) for transmitting various commands set in the command queue to the sub-control unit 91 is performed. Door monitoring processing (Sd13) for monitoring a detection state, requesting transmission of a door command, etc .; external output signal updating processing for updating external output signals (Sd14); LED dynamic display processing for dynamically lighting various displays (Sd15); After sequentially executing a control signal output process (Sd16) for outputting data such as lighting signals of various LEDs to the output port and a time counter update process (Sd17) for updating various time counters, the process proceeds to step Sd24.

  If it is determined in step Sd6 that the interrupt is timer interrupt 3 or timer interrupt 4, it is further determined whether the branch counter value is 3, that is, timer interrupt 4 (Sd18). If it is not the timer interrupt 4, that is, if it is the timer interrupt 3, the origin passing process (Sd19) for checking the passing of the origin of the rotating reels 2L, 2C, and 2R (passing of the reel reference position) (Sd19), After sequentially executing a switch input determination process (Sd20) for determining whether or not the detection state has changed, the process proceeds to step Sd24.

  If it is determined in step Sd18 that the interrupt is the timer interrupt 4, a stop switch process (Sd21) for determining a stop position in response to the detection of the stop switches 8L, 8C, and 8R. A stop process (Sd22) for starting the braking by excitation, a final stop process (Sd23) for three-phase excitation after a predetermined time from the start of the brake in the stop process, and then the process proceeds to step Sd24.

  In the step of Sd24, the register saved in the game stack area in Sd1 is restored, and the process returns to the process before the interruption.

  In this embodiment, the timer interruption process (main) is included in the game program, while the power failure determination process, the command transmission process at power failure, the normal command transmission process, and the door open monitoring process are included in the non-game program. As described above, the main control unit 41 sets interrupt prohibition in the timer interrupt processing (main), saves the stack pointer and the register of the game program, and then calls these non-game programs. It has become. When returning to the timer interrupt processing (main) from the non-game program, the stack pointer and the register of the game program are returned to the state before calling the non-game program, and the subsequent processing is performed. It is supposed to run. Since the main control unit 41 is set to prohibit other interrupts during execution of the interrupt process, the main control unit 41 executes subsequent processes in a state where the interrupt is prohibited even after returning from the non-game program. I do.

  In addition, the power failure determination processing, the command transmission processing at the time of power failure, the normal command transmission processing, and the door open monitoring processing, which are non-game programs executed in the timer interrupt processing (main), need to be executed before these non-game programs. Processing excluding certain processing (for example, port input processing and motor phase signal output processing that must be executed before branching of the timer interrupt), that is, effects on control whether performed before or after the non-game program It is to be executed before the processing without.

  Next, a power interruption process executed by the main control unit 41 will be described.

  FIG. 18 illustrates the power interruption processing (main) executed after the power interruption command transmission processing when the main control unit 41 determines that the power interruption flag is set in the timer interrupt processing (main) described above. It is a flowchart which shows the control content. In the present embodiment, the power interruption process is included in the game program.

  In the power interruption processing (main), the main control unit 41 first saves all registers that may be used to the stack area (Se1).

  Next, all output ports including the parallel output port 513 for outputting a command are initialized (Se2). Thus, the output state of the output port corresponding to the command output last by the command transmission processing at the time of power failure is initialized. Then, destruction diagnosis data is set in the game RAM area (Se2). The destruction diagnosis data is 5A (H), that is, a value including 1 in any bit. Next, RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of all areas (including the unused area 3) of the game RAM area becomes 0, and all the areas in the game stack area are set. RAM parity adjustment data is calculated and set in the game RAM area so that the exclusive OR of the areas (unused area 3, game stack area (unused) and game stack area (in use)) becomes 0 ( Se4), access to the RAM 41c is prohibited (Se5). Thereafter, the voltage decreases, the CPU 41a of the main control unit 41 stops, and the state shifts to a standby state. When the voltage drops in the standby state, the operation of the main control unit 41 is internally stopped, and the operation is reliably stopped when the power is cut off.

  In the present embodiment, the adjustment data is set in the target area so that the calculation result of the target area in the power interruption processing becomes a specific value (0 in this embodiment), and the target data is set in the start processing. It is determined whether or not the data in the RAM 41c is normal based on whether or not the calculation result of the area becomes a specific value. However, the calculation result of the area targeted in the power interruption process and the area targeted in the startup processing are determined. It may be configured to determine whether the data in the RAM 41c is normal based on whether or not the calculation result of the RAM 41c matches. Further, the calculation method is not limited to the exclusive OR, and another calculation method (for example, a sum) may be used.

  Further, in the present embodiment, RAM parity adjustment data 1 is calculated using data stored in all areas of the game RAM area including the unused area 3 in the power interruption processing, and the unused area 3 is calculated in the startup processing. The RAM 41c determines whether or not the RAM 41c is normal based on the RAM parity calculated using the data stored in all areas of the game RAM area including the game RAM area. In this case, it is determined that the RAM is abnormal, so that an unauthorized program can be prevented from being stored in the unused area 3.

  In this embodiment, RAM parity adjustment data is calculated using data stored in all areas of the game RAM area including the unused area 3 in the power interruption processing, and the unused area 3 is included in the start-up processing. Although the configuration is such that it is determined whether the RAM 41c is normal based on the RAM parity calculated using the data stored in all the areas of the game RAM area, the RAM parity of the game RAM area including the unused area 3 is adjusted. Data is calculated and set in the game RAM area, and RAM parity adjustment data in the non-game RAM area is calculated and set in the non-game RAM area, and stored in the game RAM area including the unused area 3 in the start-up process. RAM parity calculated using the calculated data, and RAM parity calculated using the data stored in the non-game RAM area. RAM41c may be determined configure whether normal or not based. In such a configuration, if an invalid program is stored in the game RAM area or the non-game RAM area, it is determined that the RAM is abnormal, so that the illegal program is stored in either the game RAM area or the non-game RAM area. Can be prevented from being stored.

  As described above, in the present embodiment, when a reset occurs, the main control unit 41 starts up in an interrupt-prohibited state, and thereafter, at the start of the initial setting process to be executed first, the program is used to execute the interrupt. The prohibition is performed, and even if the main control unit 41 is activated in a state where the interrupt is not prohibited for some reason, it is possible to prevent the occurrence of an unintended interrupt.

  Further, the main control unit 41 allows the interrupt after setting the timer interrupt in the timer circuit 509 after the activation, and the interrupt occurs when the timer interrupt does not operate normally. Can be prevented. In addition, the timer circuit 509 sets a timer interrupt so that the timer is initialized and starts counting time from an initial value. Second, the timer interrupt can be generated at fixed time intervals without deviation from the time until the second and subsequent interrupts occur. In addition, the main control unit 41 updates the setting of the timer circuit 509 to an initial value by a program in the initial setting process, and when the setting of the timer circuit 509 is rewritten for some reason at startup. Even if there is, unintended interruption can be prevented from occurring.

  If the setting key switch 37 is ON at the time of activation, the main control unit 41 shifts to the setting change process, and initializes the RAM 41c at the start of the setting change process. At this time, if the data in the RAM 41c is normal, the special work is retained and the other available areas, that is, the game RAM area, the unused area 3, and the non-game RAM area excluding the special work are initialized, Even after the setting change, a part of the control state (setting value, game state, etc.) before the change can be retained, but if the data in the RAM 41c is not normal, all the usable areas are initialized. Thus, the abnormality in the data in the RAM 41c can be reliably eliminated.

  Further, the main control unit 41 sets the RAM abnormality flag when the RAM abnormality is determined. Therefore, when the power is turned off after the occurrence of the RAM abnormality error and the power is turned on again, the RAM parity is set to 0. That is, even when the destruction diagnosis data is determined to be normal, it is possible to determine whether or not the data in the RAM 41c is destroyed based on the RAM abnormality flag.

  Further, after the end of the setting change process, the main control unit 41 executes a main process of performing a process stepwise according to the progress of the game for each game unit. In the main process, the RAM 41c is initialized for each game unit, and the RAM 41c is also initialized at the end of the setting change process. Then, after the setting change processing is completed, the main processing is started from the stage before the processing of initializing the RAM 41c in the main processing, and the initialization of the RAM 41c after the completion of the setting change processing and the game unit The initialization of each RAM 41c can be performed by a common process.

  Further, when performing initialization of the RAM 41c, the main control unit 41 is configured to prohibit an interrupt until the initialization is completed, and the timer interrupt processing (main) is performed during execution of the initialization of the RAM 41c. This can prevent the initialized contents from being changed, and prevent the processing performed in the timer interrupt processing (main) from being performed normally.

  Further, the main control unit 41 updates the output state of the external output signal in the main processing, and changes the output state of the external output signal in the subsequent timer interrupt processing (main) based on the updated output state. In addition, when updating the output state of the external output signal, interrupts are prohibited until the update is completed, and the timer interrupt processing (main) occurs before the output state of the external output signal is completed. By doing so, it is possible to prevent an external output signal indicating unintended data from being output.

  The main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program that is a program called by the game program and is not related to the progress of the game. It is possible to execute the main processing based on the program, and to execute the timer interrupt processing (main) based on the game program by interrupting the main processing at predetermined time intervals. It is also possible to call and execute a non-game program from (main).

  In such a configuration, the main control unit 41 may malfunction due to execution of the timer interrupt processing (main) during execution of the non-game program.

  On the other hand, the main control unit 41 of the present embodiment can execute a game program related to the progress of the game and a non-game program that is a program called by the game program and is not related to the progress of the game. It is possible to execute the main process based on the game program, and to execute the timer interrupt process (main) based on the game program by interrupting the main process at predetermined time intervals. In a configuration in which a non-game program can be called and executed also from the timer interrupt process (main), when the non-game program is called from the main process, the interrupt of another process is set to be prohibited, When calling the non-game program from the timer interrupt processing (main) while calling the non-game program, That is, when a non-game program is called in a situation in which an interrupt is less likely to occur, the non-game program is called without setting interrupts for other processes to be prohibited. It is possible to reduce the program capacity related to the prohibition of the interrupt while preventing a malfunction due to the execution of the interrupt.

  The timer interrupt processing (main) executed by the main control unit 41 of the present embodiment includes processing by a game program, for example, LED dynamic display processing, control signal output processing, and the like, and non-game program processing, for example, normal time. It is composed of a plurality of processes including a command transmission process and a command transmission process at the time of power failure. Of the plurality of processes constituting the timer interrupt process (main), a process by a predetermined game program In particular, since the non-game program is called prior to the processing that does not cause any problem if executed before or after the non-game program, that is, a plurality of processes constituting the timer interrupt process (main) The non-game program is called at the earliest possible stage, so, for example, if the timer interrupt processing (main) is not terminated for some reason, the next timer Even if the Ma interrupt interrupt had occurred doubly generated, it is possible to prevent the other interrupts during execution of a non-game program from being executed.

  The main control unit 41 of the present embodiment can execute a game program and a non-game program, and stores a game stack area for saving data used by the game program and a non-game stack area for saving data used by the non-game program. , Is provided separately, and the main control unit 41 saves the data used by the game program and the data used by the non-game program in the stack areas provided separately. Management becomes easy. In particular, data used by a game program saved by the occurrence of a timer interrupt and data used by a non-game program executed during execution of a timer interrupt process (main) are stored together in one stack area. Since there is no such situation, the management of the stack does not become complicated.

  When executing the non-game program, the main control unit 41 of this embodiment saves the register value used in the game program to the game stack area, calls the non-game program, and executes the processing in the non-game program. When the processing in the non-game program is completed, the saved register value is restored, so that the value of the register used by the game program is prevented from being changed when the non-game program is executed. it can.

Further, when a non-game program is called from a process based on a game program, a common call process 1 or a common call process 2 for saving a register value used in the game program to a game stack area is called. By sharing a program for executing the non-game program in the processing, the program capacity can be reduced.

In this embodiment, when the non-game program is called from the processing based on the game program in the main processing, the common call processing 1 is executed, while the non-game program is called from the processing based on the game program in the timer interrupt processing. At this time, the configuration is such that the value of the register used in the game program is saved in the game stack area by executing the common call processing 2 different from the common call processing 1, but the processing based on the game program is performed in the main processing. A common common calling process may be executed when a non-game program is called from a game program, or when a non-game program is called from a process based on a game program in a timer interrupt process.

  Note that the main control unit 41 of the present embodiment is configured to be able to call and execute a non-game program from both the main process and the timer interrupt process (main). When calling, the interrupt of other processing is set to prohibit, and the non-game program is called, while when calling the non-game program from the timer interrupt processing (main), the interrupt of other processing is set to prohibit. The main control unit 41 calls the non-gaming program from the main processing, the non-gaming program from the timer interrupt processing (main), etc. May be configured to prohibit the interruption of the process.

Specifically, when the main control unit 41 calls the non-game program from the process based on the game program during the execution of the main process, the main control unit 41 executes the common call process 1 as in the present embodiment, while executing the timer interrupt. When a non-game program is called from a process based on the game program during execution of the process, as shown in FIG. 23, in the game program, the start address of the non-game program to be called is set in a register, and the common call process is executed. Execute 3. The common calling process 3 is a process included in the game program, like the common calling process 1. In the common calling process 3, the register of the game program is saved in the game RAM area, and the stack pointer (SP, the game stack area) is saved. The address indicating the current position of the timer is saved in the SP save area of the game RAM area, and the timer interrupt is set to be disabled by setting the value of the interrupt master permission flag to a value indicating that the interrupt is prohibited. Thereafter, the non-game program of the address set in the register is called.

On the other hand, the called non-game program sets the stack pointer (non-SP, address indicating the current position of the non-game stack area) of the non-game program, executes the process of the non-game program, The process returns to the calling game program, that is, the common calling process 3. After returning to a common call processing 3, a common call processing 3, similar to the common call processing 2, on the basis of the data saved in the game RAM area, the stack pointer register and a game program, a non-gaming program Return to the state before calling and end. That is, in the common calling process 3, after the processing of the non-game program ends, the value of the interrupt master permission flag is not set, and the prohibition of the interrupt is maintained even after the end of the non-game program.

  In such a configuration, the main control unit 41 prohibits interruption of other processes not only when calling the non-game program from the main process but also when calling the non-game program from the timer interrupt process (main). Therefore, similarly to the present embodiment, it is possible to prevent malfunction due to execution of an interrupt during execution of a non-game program.

  In particular, when the timer interrupt processing (main) is executed, interrupt prohibition is set, and when the timer interrupt processing (main) is completed, the interrupt prohibition is released. Interruption of other processing is prohibited during execution. Even in this case, the interruption of other processing is prohibited again when the non-game program is called from the timer interrupt processing (main). Even if the interrupt prohibition setting is canceled due to a cause, it is possible to prevent malfunction due to execution of an interrupt during execution of the non-game program.

  Also, as described above, when the timer interrupt processing (main) is executed, interrupt prohibition is set, and at the end of the timer interrupt processing (main), the interrupt prohibition is released. This is a configuration in which interruption of other processing is prohibited during execution of (main). However, when interrupting another processing is prohibited again when a non-game program is called from the timer interruption processing (main). By maintaining the setting of prohibition of interruption of other processing set at the time of calling the non-game program even after the end of the non-game program, the non-game It is possible to prevent the prohibition of the interrupt from being released by executing the program.

  Next, initialization of the RAM 41c of the main control unit 41 will be described with reference to FIG.

  The main control unit 41 of the present embodiment initializes the game RAM area, the unused area 4, and the non-game RAM area when determining that the storage content of the RAM 41c is destroyed at the start of the setting change process. That is, initialization 0 for initializing all the available areas is performed.

  Also, at the start of the setting change process, if it is determined that the storage content of the RAM 41c is not destroyed, the game RAM area other than the special work, the unused area 4, and the non-game RAM area are initialized. That is, initialization 1 for initializing an area other than the special work in the usable area is performed.

  At the end of the setting change process, the important work, the general work, the unused area 3 and the game stack area (unused) in the game RAM area are initialized, that is, the special work and the game stack area in the game RAM area. Initialization 2 for initializing an area other than (in use) is performed.

  At the end of a specific game state and at the end of one game, an initialization 3 for initializing a general work, an unused area 3 and a game stack area (unused) in the game RAM area is performed.

  At the end of one game, not at the end of a specific game state, an initialization 4 for initializing an unused area 3 and a game stack area (unused) in the game RAM area is performed.

  As described above, the main control unit 41 of the present embodiment performs the initializations 0 to 4 when the predetermined condition is satisfied, and performs the initialization of the available area of the RAM 41c when the first condition is satisfied as the predetermined condition. Initializing at least a part of the game RAM area in which data used by the game program is stored, and when the second condition is satisfied as a predetermined condition, at least a part of the game RAM area and a usable area of the RAM 41c Of the non-game RAM area used by the non-game program is initialized.

  Specifically, as shown in FIG. 19, at the end of one game, an unused area 3 and a game stack area (unused) which are a part of the game RAM area in the available area as a first condition. Is initialized, but the non-game RAM area of the usable area is not initialized. As a first condition, at the end of a specific game state, a general work, an unused area 3 and a game stack area (unused) which are a part of the game RAM area among the available areas are initialized. The non-game RAM area of the possible area is not initialized. As a first condition, after the setting change state is completed, an important work, a general work, an unused area 3, and a game stack area (unused) which are a part of the game RAM area among the available areas are initialized. However, the non-game RAM area of the usable area is not initialized.

  On the other hand, as a second condition, when there is no abnormality in the RAM when the setting change state is started, an important work, a general work, an unused area 3, which is a part of the game RAM area in the available area, The game stack area (unused) and the game stack area (used) are initialized, and all areas of the non-game RAM area are initialized. Further, when the setting change state is started, if there is an abnormality in the RAM, all the areas of the game RAM area among the available areas are initialized, and all the areas of the game RAM area are initialized.

  The main control unit 41 of the present embodiment can execute a game program related to the progress of a game and a non-game program that is a program called by the game program and that is not related to the progress of the game. A ROM 41d for storing programs is provided.

  In such a configuration, if a game program and a non-game program are mixed in one ROM 41d, it is difficult to determine which program is a program related to the progress of the game.

  On the other hand, in the present embodiment, the ROM 41d includes a game program area in which a game program is stored and a non-game program area in which a non-game program is stored. Since the areas are separately assigned, the game program and the non-game program can be easily specified according to the difference in the storage area.

  Further, the main control unit 41 of the present embodiment is used as a work of the game program, and stores a game RAM area for storing data used by the game program, and a data for use by the non-game program used as a work of the non-game program. A RAM 41c including a non-game RAM area. The game RAM area and the non-game RAM area are separately allocated in the RAM 41c, so that the data used by the game program and the non-game program And the data can be easily specified according to the difference in the storage area, and the main control unit 41 initializes at least a part of the game RAM area when the first initialization condition is satisfied, When the initialization condition 2 is satisfied, at least a part of the game RAM area is initialized and To initialize at least a portion of the non-gaming RAM area, it is possible to initialize the appropriate data in accordance with the status of the data used by data and non-game programs used by the game program stored in the RAM 41c.

  The main control unit 41 of the present embodiment initializes the unused area 3 and the game stack area (unused), which are part of the game RAM area, when one game is completed, as a first initialization condition. As a first initialization condition, when a special game state (BB) ends and one game ends, a general work, an unused area 3 and a game stack, which are a part of the game RAM area, The area (unused) is initialized, and as a first initialization condition, when the setting change is completed and the main processing is started, an important work area, a general work area, a part of the game RAM area, Since the used area 3 and the game stack area (unused) are initialized, appropriate data can be initialized according to the situation.

  In addition, the main control unit 41 of the present embodiment, as a second initialization condition, when there is no abnormality in the RAM at the start of setting change, an important work, a general work, an unused area which is a part of the game RAM area. 3. While initializing the game stack area (unused) and the game stack area (in use), of the non-game RAM area, an area referred to by the game program, an area not referred to by the game program, and a non-game stack area ( The unused RAM and the non-gaming stack area (in use), that is, all the areas of the non-gaming RAM area are initialized. Of these, special work, important work, general work, unused area 3, game stack area (unused) and game stack area (in use), ie, game R In addition to initializing all areas of the M area, of the non-game RAM area, an area referred to by the game program, an area not referred to by the game program, a non-game stack area (unused), and a non-game stack area (in use) That is, in order to initialize all areas of the non-game RAM area, appropriate data is initialized according to the situation among data used by the game program and data used by the non-game program stored in the RAM 41c. can do.

  The main control unit 41 of the present embodiment is configured to initialize a part of the game RAM area when the first initialization condition is satisfied. It is only necessary to initialize at least a part of the game RAM area when the initialization condition is satisfied, and all the areas of the game RAM area may be initialized.

  Further, the main control unit 41 of the present embodiment is configured to initialize a part of the game RAM area and initialize all areas of the non-game RAM area when the second initialization condition is satisfied. However, the main control unit 41 initializes at least a part of the game RAM area when the second initialization condition is satisfied, and initializes at least a part of the non-game RAM area. Any area may be used to initialize all areas of the game RAM area, all areas of the non-game RAM area may be initialized, or at least a part of the non-game RAM area may be initialized. Or a game RAM area and a non-game RAM area, all of which may be initialized.

  The main control unit 41 of the present embodiment configures the program for initializing the game RAM area and the program for initializing the non-game RAM area as separate programs. Since the initialization is not required, the capacity of the game program can be reduced. In addition, the program for initializing the game RAM area can be shared when the first initialization condition is satisfied and when the second initialization condition is satisfied. Further, since a program for initializing the game RAM area is provided as a game program, and a program for initializing the non-game RAM area is provided as a non-game program, the game program initializes the non-game RAM area, and the non-game program executes the game RAM. It is possible to prevent the game program from affecting the non-game program and prevent the non-game program from affecting the game program without initializing the area.

  The main control unit 41 according to the present embodiment determines, as the first initialization condition, that it is not the end of the specific game state after performing the game end process setting in the main process, that is, one game ends. By setting the start address of the initialization target RAM at the end of the game when the game is completed and executing the game area initialization processing, a predetermined area of the game RAM area is initialized, so that the game progresses for each game unit. It is possible to initialize a part of the unnecessary game RAM area.

  The main control unit 41 of the present embodiment is activated when the setting key switch 37 is ON and starts the setting change process, that is, the second initialization condition is satisfied based on the fact that the setting change operation is performed. Then, a predetermined area of the game RAM area is initialized by executing the game area initialization processing, and a predetermined area of the non-game RAM area is initialized by executing the non-game area initialization processing. Thus, both the game RAM area and the non-game RAM area can be initialized based on the setting change operation (initialization operation) of the game clerk.

  The game RAM area of the RAM 41c of the present embodiment includes an unused area 3 that is not used when performing control based on a game program or control based on a non-game program, and includes a first initialization condition. Since the unused area 3 is initialized when the second initialization condition is satisfied or when the second initialization condition is satisfied, illegal data can be prevented from being stored in the unused area 3.

  In the present embodiment, the unused area 3 is initialized both when the first initialization condition is satisfied and when the second initialization condition is satisfied. However, at least when the first initialization condition is satisfied. If the configuration is such that the unused area 3 is initialized when one of the conditions is satisfied when the second initialization condition is satisfied, illegal data can be prevented from being stored in the unused area 3. Further, if the first initialization condition includes a plurality of conditions, and if at least one of the conditions is satisfied, the unused area 3 is initialized, invalid data is stored in the unused area 3. Can be prevented. The same applies even when the second initialization condition includes a plurality of conditions.

  The main control unit 41 of the present embodiment is used as a work of a game program, a game RAM area for storing data used by the game program, and a non-game memory used for work of the non-game program and storing data used by the non-game program. And a RAM 41c including a game RAM area. The RAM 41c has a configuration capable of holding data stored in the RAM 41c for a predetermined period even when power supply to the slot machine 1 is stopped by a backup power supply. When the power supply to the slot machine 1 is started, the control unit 41 starts an initial setting process, and determines whether the contents stored in the RAM are normal based on the data stored in the RAM 41c held by the backup power supply. And if it is determined to be normal, the data stored in the RAM 41c is determined. Based resume control.

  In such a configuration, when the power supply to the slot machine 1 is started, based on the data stored in both the game RAM area and the non-game RAM area of the RAM 41c, whether the content stored in the RAM is normal or not is determined. When it is determined whether the control is restarted based on the data stored in the RAM 41c, the load becomes excessive.

  On the other hand, when the power supply to the slot machine 1 is started, the main control unit 41 of the present embodiment starts the initialization processing, and the RAM 41c in the game RAM area of the RAM 41c held by the backup power supply It is determined whether or not the storage content of the RAM is normal based on the parity and the destructive diagnosis data stored in the game RAM area, and when it is determined that the content is normal, the data stored in the game RAM area and the non-game The control is restarted based on the data stored in the RAM area, and whether the non-game data stored in the non-game RAM area and not hindering the progress of the game is normal or not is determined. By omitting the determination, it is possible to reduce the load when restarting the control, while ensuring that the game can be normally performed.

  The game RAM area of the RAM 41c of the present embodiment includes an unused area 3 that is not used when performing control based on a game program or when performing control based on a non-game program. The unit 41 performs an initial setting process when the power supply to the slot machine 1 is started, calculates a RAM parity of the game RAM area including the unused area 3 in the initial setting process, and calculates the calculated RAM. Since it is determined whether or not the storage content of the game RAM area is normal based on the parity, it is possible to prevent unauthorized data from being stored in the unused area 3.

  When the power supply to the slot machine 1 is started, the main control unit 41 of the present embodiment executes an initialization process, and determines whether or not the storage content of the RAM 41c is destroyed in the initialization process. When it is determined that the storage contents of the RAM 41c are destroyed, the RAM abnormality flag is set and error processing is controlled, and thereafter, the error state is maintained without automatically returning to the normal state. When the power supply to the slot machine 1 is started in the state of ON, the control is changed to the setting change processing, the game area initialization processing is executed to initialize the game RAM area, and the non-game area initialization. The non-game RAM area is initialized by executing the processing, that is, both the game RAM area and the non-game RAM area are initialized when the error state is released. While game any abnormality has occurred in the RAM area and the non gaming RAM area can be prevented from proceeding.

  When the power supply to the slot machine 1 is started, the main control unit 41 of the present embodiment sets the RAM abnormality flag when it is determined in the initial setting processing that the storage content of the RAM 41c is destroyed. After that, the power supply to the slot machine 1 is started with the setting key switch 36 being ON and the setting change processing is executed, so that the error state is released and the game is released. In this configuration, both the RAM area and the non-game RAM area are initialized. However, when the power supply to the slot machine 1 is started, the main controller 41 destroys the stored contents of the RAM 41c in the initialization processing. If it is determined that the game has been executed, both the game RAM area and the non-game RAM area may be initialized, and control may be performed for error processing. In such a configuration, when controlling the error processing, both the game RAM area and the non-game RAM area are initialized. The game can be prevented from proceeding with the occurrence. In addition, both the game RAM area and the non-game RAM area may be initialized when it is determined that the storage content of the RAM 41c is destroyed and when the setting change process is executed thereafter. Even with the configuration, it is possible to prevent the game from proceeding with an abnormality occurring in either the game RAM area or the non-game RAM area.

  The main controller 41 of the present embodiment executes the power interruption processing when the power supply to the slot machine 1 is stopped and the power interruption detection circuit 48 detects a decrease in the power supply voltage. Access to both the game RAM area and the non-game RAM area is prohibited by prohibiting access to the game RAM area. In this way, it is possible to prevent illegal data from being stored.

  Next, a timer counter for measuring a time interval used by the main control unit 41 for controlling the progress of a game or the like will be described with reference to FIGS.

  When the timing start condition is satisfied, the main control unit 41 sets an initial value corresponding to the counted time as the timer value of the timer counter assigned to the game RAM area of the RAM 41c, and sets the timer interrupt processing (main). The timer value is periodically subtracted, and when the timer value becomes 0, it is specified that the measured time has elapsed.

  More specifically, when the timekeeping start condition is satisfied in the main process, the main control unit 41 sets an initial value of the timer value according to the timekeeping time in an area to which a timer counter according to the condition is assigned. The set timer value is decremented by one until it becomes 0 approximately every 2.24 ms in the time counter update process of the timer interrupt process (main).

  Then, in the main processing, as shown in FIG. 20, the address of the corresponding timer counter is obtained (Si1), the obtained value is read (Si2), and it is determined whether the read value is not 0 (Si3). When it is determined that the read value is 0, it is specified that the clock time has elapsed.

  As shown in FIG. 21, the timer counter used in the present embodiment has a 1-byte timer A, a 1-byte timer B, a 1-byte timer C whose initial value is 1 byte or less, and an initial value exceeding 1 byte and 2 bytes or less. It includes a 2-byte timer A, a 2-byte timer B, a 2-byte timer C, and a 2-byte timer D.

  The 1-byte timer is a timer for measuring a relatively short period that can be measured with a timer value within 1 byte. For example, an external output signal timer for measuring an output period of an external output signal, an LED output update period LED update timer that measures the time, a stop invalidation timer that measures the time from when the stop operation is detected until the stop operation is validated again, and a payout wait that measures the time until the payout of medals starts after the reel stops. A timer, an insertion detection timer that measures a period after ON of the insertion medal sensor 31 is detected, an insertion port detection timer that measures a period since ON of the insertion sensor 26 is detected, and ON of the payout sensor 34c is detected. There is a payout detection timer that measures a period after the start, and a start timer that measures a period from the start of reel rotation until the stop operation becomes effective. Among these, the stop invalidation timer, the payout waiting timer, and the start time timer do not extend over the timing at which one game ends, but the external output signal timer, the LED update timer, the insertion detection timer, the insertion port The detection timer and the payout detection timer sometimes cross over the time measured by these timers when one game ends.

  The 2-byte timer is a timer for measuring a relatively long period that cannot be measured with a timer value within 1 byte. For example, a 1-game time timer for measuring a prescribed time (about 4.1 seconds) required for 1 game A security signal timer for measuring the minimum output period of the security signal among the external output signals, a standby time timer for measuring a period from the end of the game, a hopper empty timer for measuring a period during which the payout sensor 34c is not detected after the hopper motor 34b is driven. There is a timer. Of these, the standby time timer and the hopper empty timer do not straddle the timing of the end of one game with the measurement period of these timers, but the one game time timer and the security signal timer have the time measured by these timers of one game. May end the timing of the end.

  As described above, the timer counter indicates the timing at which one game ends, that is, the timing at which a part of the RAM 41c is initialized in accordance with the progress of the game (at the end of one game or at the end of a specific game state, Are initialized, and a timer counter that measures a measurement period that extends over a period of time, and a timer counter that does not extend over the timing at which a part of the RAM 41c is initialized in accordance with the progress of the game. The counter is also assigned to a special work that is not initialized at a timing according to the progress of the game.

  Of these timer counters, the one-byte timers A to C are assigned one byte at a time to a continuous three-byte area (804CH to 804EH) of the RAM 41c, and the two-byte timers A to D correspond to eight consecutive bytes of the RAM 41c. Two bytes are allocated to the area (804FH to 8055h). Further, 1-byte timers A to C and 2-byte timers A to D are also allocated to continuous areas of the RAM 41c. Hereinafter, the area to which the 1-byte timers A to C are assigned is called a 1-byte timer group, and the area to which the 2-byte timers A to D are assigned is called a 2-byte timer group. That is, both the 1-byte timer group and the 2-byte timer group are set in areas to which consecutive addresses are assigned according to a predetermined rule. The area to which consecutive addresses are assigned according to a predetermined rule is, for example, an area to which a start address and an address to be added by N (N is a natural number) from the start address are assigned.

  FIG. 22 is a flowchart showing the control contents of the time counter updating process.

  In the time counter update process, first, the number of 1-byte timer counters to be updated (3 in this embodiment) is set as the number of 1-byte processes (Sj1), and the start address (804CH) of the 1-byte timer group is set in the timer counter. The pointer is set (Sj2).

  Next, if the 1-byte value stored at the designated address (the address indicated by the pointer) is not 0, the 1-byte value of the designated address is decremented by 1 (Sj3), and the number of processes set in the step of Sj1 is subtracted by 1. (Sj4), it is determined whether or not the number of processes after the subtraction is 0 (Sj5).

  If the number of times of processing after the subtraction is not 0 in step Sj5, that is, if all the one-byte timers have not been updated, the pointer is incremented by 1 (Sj6), and the process returns to step Sj3. As a result, the pointer moves to the address of the unprocessed 1-byte timer, and if the value of the 1-byte at the specified address is not 0, the pointer is decremented.

  If the number of times of processing after the subtraction is 0 in step Sj5, that is, if all the 1-byte timers have been updated, the number of 2-byte timer counters to be updated is set as the number of 2-byte processings (this embodiment Then, 4) is set (Sj7), and the pointer is incremented by 1 (Sj8). As a result, the pointer moves to the head address (804FH) of the 2-byte counter group.

  Next, if the 2-byte value stored in the area consisting of the designated address (the address indicated by the pointer) and the next address is not 0, the 2-byte value of the designated address and the next address is decremented by 1 (Sj9), and Sj7 The number of times of processing set in the step is subtracted by 1 (Sj10), and it is determined whether or not the number of times of processing after the subtraction is 0 (Sj11).

  If the number of times of processing after the subtraction is not 0 in step Sj11, that is, if all the 2-byte timers have not been updated, the pointer is incremented by 2 (Sj12), and the process returns to step Sj9. As a result, the pointer moves to the address of the unprocessed 2-byte timer, and the value of the designated address and the next address are decremented unless the 2-byte value is 0.

  If the number of processes after the subtraction is 0 in the step Sj11, that is, if the update of all the 2-byte timers has been completed, the process ends.

  As described above, in the present embodiment, the value of the timer counter assigned to the RAM 41c is periodically updated, and the passage of time is specified by reaching a specific value (0). Conventionally, when measuring a plurality of types of time intervals, a timer value is set and updated in a plurality of types of processing requiring time measurement, and a program for updating a plurality of types of timer values is provided in each processing. In such a case, the program capacity is increased. In addition, since a plurality of types of timer counters are allocated as a data group for each process in which each is used, it is necessary to read the value of an unrelated address in order to update them collectively in one process. there were.

  On the other hand, in the present embodiment, the area in which a plurality of types of timer counter values are stored is set in the area of the RAM 41c to which consecutive addresses are assigned according to a predetermined rule, and the timer value stored in the designated address is set. Since the updating process is repeated by adding a constant to the current designated address and changing the designated address for the area where the plural types of timer counter values are stored, the plural types of timer values are updated. In addition, the program capacity can be reduced as compared with the case where the processing of designating a plurality of types of addresses and updating the values of the addresses is performed by individual processing.

  It should be noted that the process of updating the timer value stored at the designated address is repeatedly performed while changing the designated address for the area in which the plurality of types of timer counter values are stored by performing a predetermined operation. Any configuration may be used as long as the value is updated. For example, by adding a constant to the current designated address and repeatedly executing while changing the designated address for an area in which a plurality of types of timer counter values are stored, a plurality of types are provided. , Or a value corresponding to the number of processes with respect to the reference address (for example, in the case of a 1-byte counter, +1 for 1 process, 2 for 2 processes, and 2 In the case of 3, +3...) Is added or subtracted to change the designated address for the area in which a plurality of types of timer counter values are stored. Ri may be configured to update a plurality of types of the timer value by return run.

  Further, in the present embodiment, the configuration is such that the values of the seven types of timer counters of 1-byte timers A to C and the two-byte timers A to D are provided. The process of updating the timer value stored at the specified address in the area where the consecutive addresses are assigned by the specified operation is performed by changing the specified address for the area storing the multiple types of timer values by performing a predetermined operation. If the configuration is such that two or more timer values are updated by repeatedly executing the program, the program capacity can be reduced as described above.

  In addition, only one of the one-byte timer and the two-byte timer sets the value of the timer counter in an area of the RAM 41c to which continuous addresses are assigned according to a predetermined rule, and updates the timer value stored at the specified address. A configuration in which a plurality of timer values are updated by performing a predetermined operation repeatedly while changing a designated address for an area in which a plurality of types of timer values are stored and changing the designated address may be used.

  In addition, only a part of the timer counters provided in the main control unit 41 sets the timer value in an area of the RAM 41c to which continuous addresses are assigned according to a predetermined rule, and updates the timer value stored at the designated address. A configuration in which a plurality of timer values are updated by performing a predetermined operation repeatedly while changing a designated address for an area in which a plurality of types of timer values are stored and changing the designated address may be used.

  In the present embodiment, a separate timer counter is provided for each type of period to be measured. For example, one timer counter may be shared for a plurality of types of periods in which the measured periods do not overlap.

  Further, in the present embodiment, as the processing executed by the main control unit 41, a timer interruption processing (main) for periodically performing a predetermined processing regardless of the progress of the game, and a processing in accordance with the progress of the game The main control unit 41 sets an initial value in a timer counter when a time measurement condition is satisfied in the main processing, and performs a plurality of types of processing in a timer interrupt processing (main). Since the timer value is updated, there is no need to provide a process for updating a plurality of types of timer values in each process constituting the main process. Therefore, the program capacity for updating the plurality of types of timer values is reduced. be able to.

  In this embodiment, the timer interrupt process (main) is executed by periodically interrupting the main process. However, in the timer interrupt process performed periodically, a predetermined timer interrupt process is performed regardless of the progress of the game. The main control unit 41 may be configured to perform both a periodic process for performing the performed process and a main process for performing a process that varies stepwise according to the progress of the game. By setting an initial value to the timer counter when the timing condition is satisfied in the processing and updating a plurality of types of timer values in the periodic processing, a plurality of types of timer values can be stored in each processing constituting the main processing. Since there is no need to provide a process for updating, it is possible to reduce the program capacity for updating a plurality of types of timer values.

  Further, in the present embodiment, in the time counter update processing, the value of the designated address is updated on condition that the value of the address is not 0, so that the timer value is updated to an abnormal value. Can be prevented.

  Further, in the present embodiment, in the time counter updating process, the same number of processes as the number of timer counters to be updated are set, and the process of updating the timer value is repeatedly executed by the set number of processes. In addition to simplifying the management of the number of timer counters to be performed, for example, when a plurality of types of timer counters having different update intervals are provided, it is possible to arbitrarily set the type of timer value to be updated according to the number of processes to be set it can.

  The number of processes, that is, the number of timer counters to be updated may be set in a program, or may be set by reading a value set in a table.

  In addition, the timer counter to be updated last is set in advance without setting the number of processes first, and the timer value is updated repeatedly until the address of the timer counter is reached. A specific end value (for example, FFh) is stored in the next address of the timer counter to be updated, and the process of repeatedly updating the timer value until the value read from the specified address becomes the specific end value may be repeatedly executed. good.

  Further, in this embodiment, a 1-byte timer counter and a 2-byte timer counter are provided, and a process of updating a 1-byte timer value and a process of updating a 2-byte timer value are separately provided. Therefore, the capacity of the program and the capacity occupied by the timer value in the RAM 41c can be reduced as compared with the case where the process of updating the 1-byte timer value and the process of updating the 2-byte timer value are shared.

  In this embodiment, a 2-byte timer counter is provided to measure a relatively long time corresponding to an initial value exceeding 1 byte. For example, a timer counter having a different update interval, for example, a timer By providing a first timer counter that updates once every four times of interrupt processing (main) and a second timer counter that updates once every fourteen times, a relative value can be obtained without providing a 2-byte counter. In such a configuration, it is not necessary to provide a process of updating the 1-byte timer value and a process of updating the 2-byte timer value. Can reduce the program capacity required for updating the program.

  Further, in the present embodiment, a plurality of types of timer counters are allocated in the RAM 41c to special works that are not initialized according to the progress of the game, and are not initialized according to the progress of the game. Regardless of the progress of the game, it is possible to measure the time of the period spanning the timing at which a part of the RAM 41c is initialized according to the progress of the game.

  In particular, in the present embodiment, the measurement period is not limited to the timer counter that may straddle the timing at which one game ends, that is, the timing at which a part of the RAM 41c is initialized in accordance with the progress of the game. Timer counters that do not straddle the timing at which a part of the RAM 41c is initialized in accordance with the progress are stored together with other timer counters in the area allocated to the special work, so that the timer counters can be easily managed. At the same time, a timer counter that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game, and the timing at which a part of the RAM 41c is initialized according to the progress of the game. The application of the timer counter can be easily changed by a later design change, such as changing to a timer counter that may straddle. It can be. In addition, if the configuration is such that one timer counter is shared for a plurality of types of periods in which the measurement periods do not overlap as described above, the timing at which a part of the RAM 41c is initialized may cross over as the game progresses. It is possible to measure the measurement period and the measurement period that does not straddle the timing at which a part of the RAM 41c is initialized according to the progress of the game with one timer counter.

  As described above, the embodiments of the present invention have been described with reference to the drawings. However, the present invention is not limited to the embodiments, and includes changes and additions within a scope not departing from the gist of the present invention. Needless to say.

  In the above embodiment, an example is described in which the present invention is applied to a slot machine in which a bet amount is set using medals and credits as a game value, but a slot in which a bet number is set using a game ball as a game value. The present invention may be applied to a machine or a completely credit-type slot machine that sets a bet amount using only credits as a game value. When a game ball is used as a game value, for example, one medal can be made to correspond to five game balls. When the number of bets is set to 3 in the above embodiment, 15 game balls are used. This is equivalent to setting a bet amount by using this.

  Furthermore, the present invention is not limited to the use of only one of a plurality of types of game values such as medals and game balls. For example, a plurality of types of game values such as medals and game balls can be used together. It may be. That is, it is possible to set a bet amount and play a game by using any of a plurality of types of gaming values such as medals and game balls, and to generate a plurality of types of games such as medals and game balls by generating a prize. A slot machine that can pay out any of the utility values may be applied.

  In the above embodiment, a slot machine as a gaming machine is applied. However, the gaming machine is not limited to the slot machine 1, but is applied to a gaming machine other than the slot machine, such as a pachinko gaming machine using a game ball. In particular, the game program and the non-game program can be executed, and the above-described configuration for initializing the RAM 41c, determining the abnormality of the RAM at startup, and calling the non-game program may be applied.

1 Slot machine 2L, 2C, 2R Reel 6 MAXBET switch 7 Start switch 8L, 8C, 8R Stop switch 12 Game auxiliary display 41 Main control unit 41c RAM
91 Sub-control unit 91c RAM

Claims (1)

In gaming machines that play games,
First storage means having a first storage area capable of storing a program,
Control means for performing control based on a program stored in the first storage means;
A second storage unit having a second storage area capable of storing variation data used when the control unit performs control based on the program;
Holding means for holding data stored in the second storage area for a predetermined period even when power supply to the gaming machine is stopped;
With
The first storage area includes:
A first program area in which a first program is stored;
A second program area in which a second program called by the first program is stored;
Including
The second storage area,
A first variation data area capable of storing first variation data used when the control means performs control based on the first program;
A second variation data area capable of storing second variation data used when the control unit performs control based on the second program;
Including
The first program includes a first initialization program for initializing at least a part of the first variation data,
The second program includes a second initialization program for initializing at least a part of the second variation data,
The control means includes:
When performing control based on the first program, refer to and update the first variation data, refer to the second variation data but do not update,
When performing control based on the second program, refer to and update the second variation data, refer to the first variation data but do not update,
When the power supply to the gaming machine is started, the storage contents are stored based on the first variation data stored in the first variation data area among the data stored in the second storage area by the storage means. Is determined to be normal, and when it is determined to be normal, based on the first variation data stored in the first variation data area and the second variation data stored in the second variation data area. Start control,
In accordance with the progress of the game, it is determined whether or not the initialization condition is satisfied. When it is determined that the initialization condition is satisfied, the initialization by the first initialization program and the second initialization Only initialization by the first initialization program among the initializations by the initialization program,
When the power supply to the gaming machine is started, if it is determined that the storage content is not normal based on the first variation data stored in the first variation data area, the first initialization program performed separately and initialization by the initialization and the second initialization program, the gaming machine.

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