JP6766893B2 - リフトピン、該リフトピンを用いたエピタキシャル成長装置およびシリコンエピタキシャルウェーハの製造方法 - Google Patents
リフトピン、該リフトピンを用いたエピタキシャル成長装置およびシリコンエピタキシャルウェーハの製造方法 Download PDFInfo
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- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/06—Epitaxial-layer growth by reactive sputtering
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/12—Substrate holders or susceptors
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- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02293—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process formation of epitaxial layers by a deposition process
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01—ELECTRIC ELEMENTS
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Description
(1)エピタキシャル成長装置内に設置するサセプタの貫通孔内を該貫通方向に移動可能に挿通され、前記サセプタに載置するシリコンウェーハを支持しながら該シリコンウェーハを前記サセプタに対して進退させるリフトピンであって、
前記貫通孔内に挿通される直胴部と、
前記シリコンウェーハに当接する頭部と、
前記頭部の頂部を少なくとも被覆する被覆部と、を有し、
前記直胴部および前記頭部は、多孔質体からなり、
前記被覆部は炭素系被覆材からなり、
前記被覆部が、前記頭部における前記多孔質体の空隙の少なくとも一部を充填していることを特徴とするリフトピン。
図4に示すリフトピン500を作製した。リフトピン500の作製にあたり、多孔質SiCの気孔率を40%とした。リフトピン500の頭部520をフェノール樹脂で含浸し、炭素化して、ガラス状カーボンからなる被覆部を形成した。リフトピン500の最表面(被覆部550の露出面550A)から頭部520の表面520Aまでの厚み、すなわち表層厚みD1は約40μmであった。また、頭部520の当接側の表面520Aから、被覆部550の表層部を充填する部分の厚み(すなわち、深部厚みD2)は、100μmであった。さらに、直胴部510の周面を、CVD法を用いて1250℃にてSiCコート材で被覆した。なお、各厚みは本試験後にリフトピンを断面破断して顕微鏡、SEMを用いて測定したものであり、50枚エピタキシャル成長処理した後の、各平均厚みの測定値である。
発明例1ではガラス状カーボンからなる被覆部を形成していたところ、これに替えて熱分解炭素を炭素系被覆材とした。その他の条件は発明例2と同様にして発明例2に係るリフトピンを作製した。
図3に示す、リフトピン5を用意した。リフトピン5の直胴部51および頭部52は、緻密な(多孔質でない)SiCからなる。この頭部52の表面に、ガラス状カーボンをコーティングし、比較例1に係るリフトピンを作製した。
図3に示す、SiCのみからなるリフトピン5を用意し、比較例2に係るリフトピンとした。
図3に示す、ガラス状カーボンのみからなるリフトピン5を用意し、比較例3に係るリフトピンとした。
得られたエピタキシャルウェーハについて、0.25μmLPD発生密度を測定した。すなわち、作製したエピタキシャルウェーハについて、ウェーハ表面検査装置(ケーエルエーテンコール社製、SP−2)を用いて、エピタキシャル膜表面で観察されるサイズ0.25μm以上の表面欠陥(LPD:Light Point Defect)の個数を評価した。この測定結果によって、発塵によるパーティクルの発生状況を評価することができる。
評価基準は下記のとおりとした。
○:0.2個/wafer以下
△:0.2個/wafer超〜0.5個/wafer以下
×:0.5個/wafer超
得られたエピタキシャルウェーハについて、リフトピン当接部のピンマーク強度として、ウェーハ表面検査装置(ケーエルエーテンコール社製、SP−2)を用いて、リフトピン接触領域における、レーザー反射の設定値以上の散乱強度を有する領域の面積を測定し、ウェーハ裏面のリフトピン起因の疵付きを評価した。
評価基準は下記のとおりとした。
◎:0.5mm2以下
○:0.5mm2超〜1mm2以下
△:1mm2超〜2mm2以下
×:2mm2超
2 エピタキシャル膜形成室
4 サセプタ
5 リフトピン
6 昇降シャフト
W シリコンウェーハ
11 上部ドーム
12 下部ドーム
13 ドーム取付体
40 サセプタ回転部
41 サセプタサポートシャフト
42 貫通孔
500 リフトピン
510 直胴部
520 頭部
530 SiCコート材
550 被覆部
Claims (7)
- エピタキシャル成長装置内に設置するサセプタの貫通孔内を該貫通方向に移動可能に挿通され、前記サセプタに載置するシリコンウェーハを支持しながら該シリコンウェーハを前記サセプタに対して進退させるリフトピンであって、
前記貫通孔内に挿通される直胴部と、
前記シリコンウェーハに当接する頭部と、
前記頭部の頂部を少なくとも被覆する被覆部と、を有し、
前記直胴部および前記頭部は、多孔質体からなり、
前記被覆部は炭素系被覆材(但し、「SiC」を除く。)からなり、
前記被覆部が、前記頭部における前記多孔質体の空隙の少なくとも一部を充填していることを特徴とするリフトピン。 - 前記多孔質体は多孔質SiCまたは多孔質炭素材からなる、請求項1に記載のリフトピン。
- 前記直胴部がSiCコート材により被覆される、請求項1または2に記載のリフトピン。
- 前記多孔質体の気孔率が、15%以上85%以下である、請求項1〜3のいずれか1項に記載のリフトピン。
- 前記被覆部の前記炭素系被覆材がガラス状カーボンまたは熱分解炭素からなる、請求項1〜4のいずれか1項に記載のリフトピン。
- 請求項1〜5のいずれか1項に記載のリフトピンを有することを特徴とする、エピタキシャル成長装置。
- 請求項6に記載のエピタキシャル成長装置を用いて、シリコンウェーハ上にエピタキシャル膜を成長させることを特徴とする、シリコンエピタキシャルウェーハの製造方法。
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PCT/JP2017/045443 WO2018142788A1 (ja) | 2017-02-02 | 2017-12-19 | リフトピン、該リフトピンを用いたエピタキシャル成長装置およびシリコンエピタキシャルウェーハの製造方法 |
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US11961756B2 (en) | 2019-01-17 | 2024-04-16 | Asm Ip Holding B.V. | Vented susceptor |
USD920936S1 (en) | 2019-01-17 | 2021-06-01 | Asm Ip Holding B.V. | Higher temperature vented susceptor |
US11404302B2 (en) | 2019-05-22 | 2022-08-02 | Asm Ip Holding B.V. | Substrate susceptor using edge purging |
US11764101B2 (en) | 2019-10-24 | 2023-09-19 | ASM IP Holding, B.V. | Susceptor for semiconductor substrate processing |
WO2022162928A1 (ja) | 2021-02-01 | 2022-08-04 | 株式会社天谷製作所 | リフトピン、半導体製造装置およびリフトピン製造方法 |
US20240038575A1 (en) * | 2022-07-27 | 2024-02-01 | Applied Materials, Inc. | Thickness uniformity improvement kit for thermally sensitive epitaxial processing |
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JP3092801B2 (ja) * | 1998-04-28 | 2000-09-25 | 信越半導体株式会社 | 薄膜成長装置 |
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JP3266567B2 (ja) * | 1998-05-18 | 2002-03-18 | 松下電器産業株式会社 | 真空処理装置 |
JP4402763B2 (ja) * | 1999-05-13 | 2010-01-20 | Sumco Techxiv株式会社 | エピタキシャルウェーハ製造装置 |
JP3931578B2 (ja) * | 2001-03-30 | 2007-06-20 | 信越半導体株式会社 | 気相成長装置 |
JP3672300B2 (ja) | 2001-10-30 | 2005-07-20 | アプライド マテリアルズ インコーポレイテッド | 薄膜成長装置用のリフトピン、その形成方法およびリフトピン頭部 |
US20030178145A1 (en) * | 2002-03-25 | 2003-09-25 | Applied Materials, Inc. | Closed hole edge lift pin and susceptor for wafer process chambers |
JP2004356124A (ja) * | 2003-05-27 | 2004-12-16 | Sumitomo Electric Ind Ltd | 多孔質セラミックスを用いた半導体製造装置用部品及び半導体製造装置 |
US7754609B1 (en) * | 2003-10-28 | 2010-07-13 | Applied Materials, Inc. | Cleaning processes for silicon carbide materials |
JP2005311108A (ja) * | 2004-04-22 | 2005-11-04 | Shin Etsu Handotai Co Ltd | 気相成長装置 |
NL1034780C2 (nl) | 2007-11-30 | 2009-06-03 | Xycarb Ceramics B V | Inrichting voor het laagsgewijs laten neerslaan van verschillende materialen op een halfgeleider-substraat alsmede een hefpin voor toepassing in een dergelijke inrichting. |
JP5412759B2 (ja) * | 2008-07-31 | 2014-02-12 | 株式会社Sumco | エピタキシャルウェーハの保持具及びそのウェーハの製造方法 |
JP6507573B2 (ja) * | 2014-10-31 | 2019-05-08 | 株式会社Sumco | リフトピン、該リフトピンを用いたエピタキシャル成長装置およびエピタキシャルウェーハの製造方法 |
JP6520050B2 (ja) * | 2014-10-31 | 2019-05-29 | 株式会社Sumco | リフトピン、該リフトピンを用いたエピタキシャル成長装置およびエピタキシャルウェーハの製造方法 |
TWI615917B (zh) | 2015-04-27 | 2018-02-21 | Sumco股份有限公司 | 承托器及磊晶生長裝置 |
JP6424726B2 (ja) | 2015-04-27 | 2018-11-21 | 株式会社Sumco | サセプタ及びエピタキシャル成長装置 |
JP6435992B2 (ja) | 2015-05-29 | 2018-12-12 | 株式会社Sumco | エピタキシャル成長装置、エピタキシャルウェーハの製造方法およびエピタキシャル成長装置用リフトピン |
JP6451508B2 (ja) * | 2015-05-29 | 2019-01-16 | 株式会社Sumco | エピタキシャル成長装置、エピタキシャルウェーハの製造方法およびエピタキシャル成長装置用リフトピン |
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