JP6725090B1 - 光半導体装置 - Google Patents
光半導体装置 Download PDFInfo
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- JP6725090B1 JP6725090B1 JP2020510617A JP2020510617A JP6725090B1 JP 6725090 B1 JP6725090 B1 JP 6725090B1 JP 2020510617 A JP2020510617 A JP 2020510617A JP 2020510617 A JP2020510617 A JP 2020510617A JP 6725090 B1 JP6725090 B1 JP 6725090B1
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- 230000003287 optical effect Effects 0.000 title claims description 38
- 239000004065 semiconductor Substances 0.000 title claims description 37
- 239000003990 capacitor Substances 0.000 claims abstract description 63
- 229910000679 solder Inorganic materials 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims description 15
- 230000003071 parasitic effect Effects 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 6
- 238000011179 visual inspection Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000007689 inspection Methods 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 244000126211 Hericium coralloides Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
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Abstract
Description
図1は、実施の形態1に係る光半導体装置の回路図である。光半導体装置1はTOSA(Transmitter Optical Sub-Assembly)であり、発光素子2、コンデンサ3及び終端抵抗4を有する。発光素子2のアノードは駆動回路5に接続され、カソードはGNDに接続されている。コンデンサ3及び終端抵抗4は発光素子2と並列に接続されている。発光素子2は、例えばEML−LD(Electro-absorption Modulator Laser Diode)である。駆動回路5から供給された高周波の変調電気信号に応じて発光素子2が発光する。なお、図1ではコンデンサ3と終端抵抗4が駆動回路5からGNDに向かって順に接続されているが、これに限らず、駆動回路5側から終端抵抗4、コンデンサ3の順に接続してもよい。
図7は、実施の形態2に係る光半導体装置を示す平面図である。導電パターン13の平面形状はL字形であり、導電パターン13のはみ出し部25はコンデンサ3の隣接する2辺からはみ出している。実施の形態1と同様に、はみ出し部25とコンデンサ3の境界において、導電パターン13のはみ出し部25の横幅はコンデンサ3の横幅よりも狭い。これにより、導電パターン9と導電パターン13との間の寄生容量が低減するため、高周波性能を向上することができる。
図8は、実施の形態3に係る光半導体装置を示す平面図である。導電パターン13のはみ出し部25は櫛歯状である。これにより、はみ出し部25の面積が小さくなり、GNDパターン8と導電パターン13との間の寄生容量が低減するため、高周波性能を向上することができる。ただし、はんだ22の外観検査を行うために、各櫛歯の横幅を100μm以上にする必要がある。その他の構成及び効果は実施の形態1と同様である。
図9は、実施の形態4に係る光半導体装置を示す側面図である。図10は、実施の形態4に係る光半導体装置のキャリア基板とサブマウントの間に設けられた導電パターンを示す平面図である。この平面図においてサブマウント7及びその上の構成は省略している。
Claims (6)
- サブマウントと、
前記サブマウントの上面に設けられた第1の導電パターンと、
前記サブマウントの下面側に設けられたGNDパターンと、
発光素子と、
前記第1の導電パターンにはんだにより接合された下面電極と、前記発光素子に接続された上面電極とを有するコンデンサと、
前記第1の導電パターンに接続された終端抵抗とを備え、
前記第1の導電パターンは、平面視で前記コンデンサからはみ出したはみ出し部を有し、
前記はみ出し部の横幅は前記コンデンサの横幅よりも狭く、
前記はみ出し部は、前記コンデンサの外周の2箇所以上からはみ出し、
前記下面電極が前記コンデンサの誘電体の下面全面に設けられていることを特徴とする光半導体装置。 - 前記第1の導電パターンの平面形状は長方形であり、
前記コンデンサの平面形状は四角形であり、
前記第1の導電パターンの長辺は前記コンデンサの辺よりも長く、
前記第1の導電パターンの短辺は前記コンデンサの辺よりも短く、
前記はみ出し部は前記コンデンサの対向する2辺からはみ出していることを特徴とする請求項1に記載の光半導体装置。 - 前記サブマウント、前記第1の導電パターン、前記発光素子、前記コンデンサ及び前記終端抵抗を含むセットが複数あり、前記複数のセットが前記第1の導電パターンの前記短辺の方向に横並びに配置されていることを特徴とする請求項2に記載の光半導体装置。
- 前記第1の導電パターンの平面形状はL字形であり、
前記コンデンサの平面形状は四角形であり、
前記はみ出し部は前記コンデンサの隣接する2辺からはみ出していることを特徴とする請求項1に記載の光半導体装置。 - 前記はみ出し部は櫛歯状であることを特徴とする請求項1に記載の光半導体装置。
- サブマウントと、
前記サブマウントの上面に設けられた第1の導電パターンと、
前記サブマウントの下面側に設けられたGNDパターンと、
発光素子と、
前記第1の導電パターンにはんだにより接合された下面電極と、前記発光素子に接続された上面電極とを有するコンデンサと、
前記第1の導電パターンに接続された終端抵抗と、
キャリア基板と、
前記キャリア基板の上面に設けられた第2の導電パターンと、
前記サブマウントの下面に設けられた第3の導電パターンとを備え、
前記第1の導電パターンは、平面視で前記コンデンサからはみ出したはみ出し部を有し、
前記はみ出し部の横幅は前記コンデンサの横幅よりも狭く、
前記はみ出し部は、前記コンデンサの外周の2箇所以上からはみ出し、
前記サブマウントは前記キャリア基板の上に設けられ、
前記GNDパターンは前記キャリア基板の下面に設けられ、
前記第2の導電パターンと前記第3の導電パターンは、互いに接合され、前記発光素子の下方には存在するが、前記コンデンサの下方には存在しないことを特徴とする光半導体装置。
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Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001257435A (ja) * | 2000-03-08 | 2001-09-21 | Nippon Telegr & Teleph Corp <Ntt> | 光送信器 |
JP2004259722A (ja) * | 2003-02-24 | 2004-09-16 | Kanji Otsuka | 電子回路装置 |
US20160119062A1 (en) * | 2014-10-28 | 2016-04-28 | Mellanox Technologies Denmark Aps | Driver circuit for an electro-absorption or micro-ring modulator and optical transmitter comprising such driver circuit |
JP2016181543A (ja) * | 2015-03-23 | 2016-10-13 | 日本電信電話株式会社 | 高周波伝送線路および光回路 |
US20170162927A1 (en) * | 2014-05-31 | 2017-06-08 | Hatem Mohamed Aead | Air Gap Creation In Electronic Devices |
JP2017120846A (ja) * | 2015-12-28 | 2017-07-06 | 日本電信電話株式会社 | 光半導体装置 |
WO2018229978A1 (ja) * | 2017-06-16 | 2018-12-20 | 三菱電機株式会社 | プリント配線板 |
JP2019102827A (ja) * | 2017-11-28 | 2019-06-24 | 京セラ株式会社 | 伝送回路、配線基板および高周波装置 |
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JP5707732B2 (ja) * | 2010-05-12 | 2015-04-30 | 住友電気工業株式会社 | 光半導体装置 |
JP6512602B2 (ja) * | 2014-06-02 | 2019-05-15 | 住友電工デバイス・イノベーション株式会社 | 半導体レーザ素子 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001257435A (ja) * | 2000-03-08 | 2001-09-21 | Nippon Telegr & Teleph Corp <Ntt> | 光送信器 |
JP2004259722A (ja) * | 2003-02-24 | 2004-09-16 | Kanji Otsuka | 電子回路装置 |
US20170162927A1 (en) * | 2014-05-31 | 2017-06-08 | Hatem Mohamed Aead | Air Gap Creation In Electronic Devices |
US20160119062A1 (en) * | 2014-10-28 | 2016-04-28 | Mellanox Technologies Denmark Aps | Driver circuit for an electro-absorption or micro-ring modulator and optical transmitter comprising such driver circuit |
JP2016181543A (ja) * | 2015-03-23 | 2016-10-13 | 日本電信電話株式会社 | 高周波伝送線路および光回路 |
JP2017120846A (ja) * | 2015-12-28 | 2017-07-06 | 日本電信電話株式会社 | 光半導体装置 |
WO2018229978A1 (ja) * | 2017-06-16 | 2018-12-20 | 三菱電機株式会社 | プリント配線板 |
JP2019102827A (ja) * | 2017-11-28 | 2019-06-24 | 京セラ株式会社 | 伝送回路、配線基板および高周波装置 |
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