JP6636978B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP6636978B2
JP6636978B2 JP2017059873A JP2017059873A JP6636978B2 JP 6636978 B2 JP6636978 B2 JP 6636978B2 JP 2017059873 A JP2017059873 A JP 2017059873A JP 2017059873 A JP2017059873 A JP 2017059873A JP 6636978 B2 JP6636978 B2 JP 6636978B2
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JP
Japan
Prior art keywords
lead
groove
semiconductor chip
semiconductor device
bed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2017059873A
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English (en)
Japanese (ja)
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JP2018163962A (ja
JP2018163962A5 (https=
Inventor
福井　剛
剛 福井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Devices and Storage Corp filed Critical Toshiba Corp
Priority to JP2017059873A priority Critical patent/JP6636978B2/ja
Publication of JP2018163962A publication Critical patent/JP2018163962A/ja
Publication of JP2018163962A5 publication Critical patent/JP2018163962A5/ja
Application granted granted Critical
Publication of JP6636978B2 publication Critical patent/JP6636978B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/871—Bond wires and strap connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/766—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2017059873A 2017-03-24 2017-03-24 半導体装置及びその製造方法 Expired - Fee Related JP6636978B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2017059873A JP6636978B2 (ja) 2017-03-24 2017-03-24 半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017059873A JP6636978B2 (ja) 2017-03-24 2017-03-24 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2018163962A JP2018163962A (ja) 2018-10-18
JP2018163962A5 JP2018163962A5 (https=) 2019-01-17
JP6636978B2 true JP6636978B2 (ja) 2020-01-29

Family

ID=63860368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017059873A Expired - Fee Related JP6636978B2 (ja) 2017-03-24 2017-03-24 半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JP6636978B2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12494415B2 (en) 2021-07-12 2025-12-09 Shindengen Electric Manufacturing Co., Ltd. Tip connection portion of terminal member and associated semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021174883A (ja) * 2020-04-24 2021-11-01 Ｊｘ金属株式会社 金属板、金属樹脂複合体、および半導体ディバイス
JP7474213B2 (ja) 2021-03-16 2024-04-24 株式会社東芝 半導体装置
JP2023007028A (ja) * 2021-07-01 2023-01-18 ローム株式会社 半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3065045B2 (ja) * 1998-11-13 2000-07-12 日本電気株式会社 半導体装置
JP2001077264A (ja) * 1999-09-01 2001-03-23 Matsushita Electronics Industry Corp 樹脂封止型半導体装置の製造方法
JP4591362B2 (ja) * 2006-01-25 2010-12-01 株式会社デンソー 電子装置の製造方法
JP5745238B2 (ja) * 2010-07-30 2015-07-08 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体装置およびその製造方法
JP2014007363A (ja) * 2012-06-27 2014-01-16 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
JP2016029676A (ja) * 2012-12-19 2016-03-03 富士電機株式会社 半導体装置
JP2016058612A (ja) * 2014-09-11 2016-04-21 株式会社デンソー 半導体装置
JP6468085B2 (ja) * 2015-06-11 2019-02-13 株式会社デンソー 基板、および、その製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12494415B2 (en) 2021-07-12 2025-12-09 Shindengen Electric Manufacturing Co., Ltd. Tip connection portion of terminal member and associated semiconductor device

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Publication number Publication date
JP2018163962A (ja) 2018-10-18

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