JP6534602B2 - 配線基板、半導体装置及び配線基板の製造方法 - Google Patents

配線基板、半導体装置及び配線基板の製造方法 Download PDF

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JP6534602B2
JP6534602B2 JP2015224688A JP2015224688A JP6534602B2 JP 6534602 B2 JP6534602 B2 JP 6534602B2 JP 2015224688 A JP2015224688 A JP 2015224688A JP 2015224688 A JP2015224688 A JP 2015224688A JP 6534602 B2 JP6534602 B2 JP 6534602B2
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wiring
insulating layer
hole
layer
conductive pattern
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JP2017092411A (ja
JP2017092411A5 (enExample
Inventor
奈津子 北城
奈津子 北城
裕司 雪入
裕司 雪入
田中　泉
泉 田中
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to US15/298,487 priority patent/US9711461B2/en
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    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Physics & Mathematics (AREA)
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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Geometry (AREA)
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JP7396789B2 (ja) 2018-08-10 2023-12-12 日東電工株式会社 配線回路基板、その製造方法および配線回路基板集合体シート
KR102679250B1 (ko) * 2018-09-12 2024-06-28 엘지이노텍 주식회사 연성 회로기판 및 이를 포함하는 칩 패키지, 및 이를 포함하는 전자 디바이스
JP2022096004A (ja) * 2019-04-26 2022-06-29 株式会社アクセス プリント配線基板の製造方法及びプリント配線基板
JP2021068792A (ja) * 2019-10-23 2021-04-30 イビデン株式会社 プリント配線板、及び、プリント配線板の製造方法
KR102818699B1 (ko) * 2020-01-29 2025-06-09 삼성전자주식회사 반도체 패키지 제조용 프레임 지그, 프레임 지그를 포함하는 반도체 패키지 제조 장치, 및 프레임 지그를 이용한 반도체 패키지 제조 방법

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TW200850083A (en) * 2007-03-22 2008-12-16 Ngk Spark Plug Co Method of manufacturing multilayer wiring board
JP2009194321A (ja) * 2008-02-18 2009-08-27 Shinko Electric Ind Co Ltd 配線基板及びその製造方法、半導体パッケージ
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