JP6476114B2 - 調整可能な及び高いゲート・ソース定格電圧を備えるｉｉｉ‐窒化物エンハンスメントモードトランジスタ - Google Patents

調整可能な及び高いゲート・ソース定格電圧を備えるｉｉｉ‐窒化物エンハンスメントモードトランジスタ Download PDF

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JP6476114B2
JP6476114B2 JP2015526712A JP2015526712A JP6476114B2 JP 6476114 B2 JP6476114 B2 JP 6476114B2 JP 2015526712 A JP2015526712 A JP 2015526712A JP 2015526712 A JP2015526712 A JP 2015526712A JP 6476114 B2 JP6476114 B2 JP 6476114B2
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gan fet
gate
mode gan
forming
enhancement mode
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JP2015529019A (ja
JP2015529019A5 (enExample
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ペンハルカル サミール
ペンハルカル サミール
ティピルネニ ナヴィーン
ティピルネニ ナヴィーン
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日本テキサス・インスツルメンツ合同会社
テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/05—Manufacture or treatment characterised by using material-based technologies using Group III-V technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/343—Gate regions of field-effect devices having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2015526712A 2012-08-09 2013-08-08 調整可能な及び高いゲート・ソース定格電圧を備えるｉｉｉ‐窒化物エンハンスメントモードトランジスタ Active JP6476114B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261681298P 2012-08-09 2012-08-09
US61/681,298 2012-08-09
US13/886,410 2013-05-03
US13/886,410 US8933461B2 (en) 2012-08-09 2013-05-03 III-nitride enhancement mode transistors with tunable and high gate-source voltage rating
PCT/US2013/054168 WO2014026018A1 (en) 2012-08-09 2013-08-08 Iii-nitride enhancement mode transistors with tunable and high gate-source voltage rating

Publications (3)

Publication Number Publication Date
JP2015529019A JP2015529019A (ja) 2015-10-01
JP2015529019A5 JP2015529019A5 (enExample) 2016-09-15
JP6476114B2 true JP6476114B2 (ja) 2019-02-27

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JP2015526712A Active JP6476114B2 (ja) 2012-08-09 2013-08-08 調整可能な及び高いゲート・ソース定格電圧を備えるｉｉｉ‐窒化物エンハンスメントモードトランジスタ

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Country Link
US (1) US8933461B2 (enExample)
JP (1) JP6476114B2 (enExample)
CN (1) CN104521000B (enExample)
WO (1) WO2014026018A1 (enExample)

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US20160293596A1 (en) * 2015-03-30 2016-10-06 Texas Instruments Incorporated Normally off iii-nitride transistor
US10205313B2 (en) 2015-07-24 2019-02-12 Symptote Technologies, LLC Two-transistor devices for protecting circuits from sustained overcurrent
CN108292837B (zh) * 2015-09-21 2020-01-17 西普托特技术有限责任公司 用于保护电路的单晶体管器件以及方法
US9685545B2 (en) * 2015-11-25 2017-06-20 Texas Instruments Incorporated Isolated III-N semiconductor devices
WO2018182704A1 (en) * 2017-03-31 2018-10-04 Intel Corporation Enhancement/depletion device pairs and methods of producing the same
US11309887B2 (en) 2018-02-09 2022-04-19 Delta Electronics, Inc. Conversion circuit
US10784770B2 (en) 2018-02-09 2020-09-22 Delta Electronics, Inc. Conversion circuit
US10784768B2 (en) 2018-02-09 2020-09-22 Delta Electronics, Inc. Conversion circuit and conversion circuitry
US10734882B2 (en) * 2018-02-09 2020-08-04 Delta Electronics, Inc. Conversion circuit
WO2019175471A1 (en) * 2018-03-14 2019-09-19 Emberion Oy Surface mesfet
US10516043B1 (en) 2018-07-19 2019-12-24 Cree, Inc. Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors
US10840798B1 (en) 2018-09-28 2020-11-17 Dialog Semiconductor (Uk) Limited Bidirectional signaling method for high-voltage floating circuits
CN109742072B (zh) * 2019-01-04 2019-08-16 苏州汉骅半导体有限公司 集成增强型和耗尽型的hemt及其制造方法
JP7300840B2 (ja) 2019-02-04 2023-06-30 ローム株式会社 窒化物半導体装置の製造方法
CN121038348A (zh) * 2019-03-21 2025-11-28 创世舫科技有限公司 半桥电路和装入在封装中的电子部件
US11101378B2 (en) * 2019-04-09 2021-08-24 Raytheon Company Semiconductor structure having both enhancement mode group III-N high electron mobility transistors and depletion mode group III-N high electron mobility transistors
US11658236B2 (en) 2019-05-07 2023-05-23 Cambridge Gan Devices Limited III-V semiconductor device with integrated power transistor and start-up circuit
US11081578B2 (en) 2019-05-07 2021-08-03 Cambridge Gan Devices Limited III-V depletion mode semiconductor device
US11955488B2 (en) * 2019-05-07 2024-04-09 Cambridge Gan Devices Limited III-V semiconductor device with integrated power transistor and start-up circuit
US11302785B2 (en) 2019-06-18 2022-04-12 Texas Instruments Incorporated Method for testing a high voltage transistor with a field plate
US11545566B2 (en) 2019-12-26 2023-01-03 Raytheon Company Gallium nitride high electron mobility transistors (HEMTs) having reduced current collapse and power added efficiency enhancement
US11362190B2 (en) 2020-05-22 2022-06-14 Raytheon Company Depletion mode high electron mobility field effect transistor (HEMT) semiconductor device having beryllium doped Schottky contact layers
CN116097447A (zh) * 2020-09-01 2023-05-09 电力集成公司 包括二维电子气区域的管芯密封环

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Also Published As

Publication number Publication date
CN104521000B (zh) 2018-01-02
US20140042452A1 (en) 2014-02-13
US8933461B2 (en) 2015-01-13
WO2014026018A1 (en) 2014-02-13
JP2015529019A (ja) 2015-10-01
CN104521000A (zh) 2015-04-15

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