TW201421648A - 半導體裝置 - Google Patents
半導體裝置 Download PDFInfo
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- TW201421648A TW201421648A TW102141968A TW102141968A TW201421648A TW 201421648 A TW201421648 A TW 201421648A TW 102141968 A TW102141968 A TW 102141968A TW 102141968 A TW102141968 A TW 102141968A TW 201421648 A TW201421648 A TW 201421648A
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- gallium nitride
- field effect
- effect transistor
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 106
- 230000005669 field effect Effects 0.000 claims abstract description 195
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 229910002601 GaN Inorganic materials 0.000 claims description 229
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 226
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 37
- 150000004767 nitrides Chemical class 0.000 claims description 35
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 180
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052729 chemical element Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
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Abstract
一種半導體裝置包含基板、第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體。第一氮化鎵場效電晶體置於基板上。第一氮化鎵場效電晶體為空乏型場效電晶體。第二氮化鎵場效電晶體置於基板上。第二氮化鎵場效電晶體為增強型場效電晶體。氮化鎵二極體置於基板上。第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體皆置於基板的同一側並互相電性連接。
Description
本發明是有關於一種半導體裝置。
隨著半導體技術的不斷發展,矽基半導體的技術已非常成熟。然而隨著元件尺寸的不斷縮小,許多元件性能卻也面臨到一些來自材料本身所造成的瓶頸。許多下一世代的半導體元件技術也陸續提出,其中III-V 族半導體材料,尤其是氮基材料,例如氮化鎵,更因其具有特殊的自發極化效應與能形成二維電子氣(2DEG),具有高電子飽和速度與高崩潰電場,使得氮化鎵元件受到矚目,特別是常關型氮化鎵電晶體。
在習知常關型氮化鎵電晶體的應用中,往往會因應產品的需求,而進行不同的程度的調整,以符合產品所需電性參數,例如崩潰電壓、導通電阻、切換電阻…等。然而由於許多參數的調整通常是互斥的,亦即當優化某一參數時,往往會造成另一參數的劣化。因此很多時候,並不會直接使用單一元件的常關型氮化鎵電晶體,而採用藉複數個電路元件的整合所形成的等效電路,來進行後續應用。然而,因氮基半導體技術之發展不若矽基半導體技術成熟,因此氮基半導體面臨電路整合上的困難。
本發明之一態樣提供一種半導體裝置,包含基板、第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體。第一氮化鎵場效電晶體置於基板上。第一氮化鎵場效電晶體為空乏型場效電晶體。第二氮化鎵場效電晶體置於基板上。第二氮化鎵場效電晶體為增強型場效電晶體。氮化鎵二極體置於基板上。第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體皆置於基板的同一側並互相電性連接。
在一或多個實施方式中 ,第一氮化鎵場效電晶體以共汲共閘形態 電性連接第二氮化鎵場效電晶體,且氮化鎵二極體並聯地電性連接第二氮化鎵場效電晶體。
在一或多個實施方式中,第二氮化鎵場效電晶體之汲極電性連接至第一氮化鎵場效電晶體之源極與氮化鎵二極體之陰極。
在一或多個實施方式中,第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體共同組成常關型場效電晶體裝置。
在一或多個實施方式中,上述之半導體裝置更包含功率因數修正二極體。功率因數修正二極體之陽極電性連接至第一氮化鎵場效電晶體之汲極。
在一或多個實施方式中,上述之半導體裝置更包含氮化物層,置於基板上。第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體皆置於氮化物層上。
在一或多個實施方式中,第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體共同包含至少一異質結構層,且異質結構層至少包含氮化鎵鋁(AlxGa1-xN,0<x<0.3)。
在一或多個實施方式中,第一氮化鎵場效電晶體包含異質結構層、源極、汲極與閘極。異質結構層置於基板上。異質結構層包含複數個氮化物半導體層以及至少一個二維電子氣通道於其中。源極與汲極互相分離設置,且分別電性連接至二維電子氣通道。閘極置於異質結構層上方,且置於源極與汲極之間。
在一或多個實施方式中,第二氮化鎵場效電晶體包含異質結構層、源極、汲極、閘極與p型摻雜層。異質結構層置於基板上。異質結構層包含複數個氮化物半導體層以及二維電子氣通道於其中。源極與汲極互相分離設置,且分別電性連接至二維電子氣通道。閘極置於異質結構層上方,且置於源極與汲極之間。p型摻雜層置於異質結構層與閘極之間。
在一或多個實施方式中,p型摻雜層之材質為p型氮化鎵或p型氮化鎵鋁。
在一或多個實施方式中,第二氮化鎵場效電晶體包含異質結構層、源極、汲極與閘極。異質結構層置於基板上。異質結構層包含複數個氮化物半導體層以及二維電子氣通道於其中,且異質結構層具有傾斜部。源極與汲極互相分離設置,且分別電性連接至二維電子氣通道。閘極置於源極與汲極之間。至少部份之閘極置於異質結構層之傾斜部上。
在一或多個實施方式中,第二氮化鎵場效電晶體包含異質結構層、源極、汲極與閘極。異質結構層置於基板上。異質結構層包含複數個氮化物半導體層以及二維電子氣通道於其中,且異質結構層具有凹槽。源極與汲極互相分離設置,且分別電性連接至二維電子氣通道。閘極置於源極與汲極之間,其中至少部份之閘極置於異質結構層之凹槽上。
在一或多個實施方式中,氮化鎵二極體包含異質結構層、陽極、陰極與p型摻雜層 。異質結構層包含複數個氮化物半導體層置於基板上。 陽極與陰極互相分離設置,且分別電性連接至異質結構層。p型摻雜層置於異質結構層上,且置於陽極與異質結構層之間。
本發明之另一態樣提供一種半導體裝置,包含基板、異質結構層、第一氮化鎵場效電晶體、第二氮化鎵場效電晶體、中間連接結構與覆蓋層。異質結構層置於基板上。異質結構層包含第一區域、第二區域與中間連接區域,中間連接區域置於第一區域與第二區域之間,且異質結構層產生二維電子氣通道於其中。第一氮化鎵場效電晶體包含第一區域之部份異質結構層。第二氮化鎵場效電晶體包含第二區域之部份異質結構層。中間連接結構置於中間連接區域之異質結構層上方,且電性連接第一氮化鎵場效電晶體與第二氮化鎵場效電晶體。覆蓋層置於中間連接結構與異質結構層之間。位於異質結構層之中間連接區域之二維電子氣通道於覆蓋層下方實質中斷。
在一或多個實施方式中,覆蓋層為p型摻雜層。
在一或多個實施方式中,第一氮化鎵場效電晶體為空乏型場效電晶體,且第二氮化鎵場效電晶體為增強型場效電晶體。
在一或多個實施方式中,中間連接結構電性連接增強型場效電晶體之汲極與空乏型場效電晶體之源極,且中間連接結構之上表面、增強型場效電晶體之汲極之上表面、與空乏型場效電晶體之源極之上表面實質共平面。
在一或多個實施方式中,異質結構層包含第一半導體層與第二半導體層,第二半導體層置於第一半導體層上。
在一或多個實施方式中,二維電子氣結構毗鄰第一半導體層與第二半導體層之間的界面。
因第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體皆置於基板的同一側,因此第一氮化鎵場效電晶體、第二氮化鎵場效電晶體與氮化鎵二極體之間的連接電阻可被降低。
100...基板
150...氮化物層
200、620...第一氮化鎵場效電晶體
210、310、410、510、560、610...異質結構層
212~216、312~316、412~416、512~516、561~565...氮化物半導體層
220、330、520、570、752...閘極
230、340、530、580、622、754...源極
240、350、540、590、634、732...汲極
300、500、550、630...第二氮化鎵場效電晶體
320、420...p型摻雜層
400、707、720、740、760...氮化鎵二極體
430、490、742、762...陽極
440、764...陰極
450...二極體
566...凹槽
612...第一半導體層
614...第二半導體層
616...二維電子氣通道
640...中間連接結構
650、632...覆蓋層
705、720、730...增強型氮化鎵場效電晶體
750...空乏型氮化鎵場效電晶體
I-I...傾斜部
II-II...第一區域
III-III...第二區域
IV-IV...中間連接區域
第1圖為本發明一實施方式之半導體裝置的剖面圖。
第2圖為本發明另一實施方式之半導體裝置的剖面圖。
第3圖為本發明又一實施方式之半導體裝置的剖面圖。
第4圖為第1圖之半導體裝置的電路圖。
第5圖為第1圖之半導體裝置再一實施方式的電路圖。
第6圖為本發明另一實施方式之半導體裝置的電路圖。
第7圖為本發明又一實施方式之半導體裝置的剖面圖。
第8至11圖為第7圖之半導體裝置複數個實施方式的電路圖。
以下將以圖式揭露本發明的複數個實施方式,為明確說明起見,許多實務上的細節將在以下敘述中一併說明。然而,應瞭解到,這些實務上的細節不應用以限制本發明。也就是說,在本發明部分實施方式中,這些實務上的細節是非必要的。此外,為簡化圖式起見,一些習知慣用的結構與元件在圖式中將以簡單示意的方式繪示之。
應注意的是,在本文中之化學元素可由元素符號表示之。亦即,Al表示鋁,Ga表示鎵,以及N表示氮。
第1圖為本發明一實施方式之半導體裝置的剖面圖。半導體裝置包含基板100、第一氮化鎵(GaN)場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400。第一氮化鎵場效電晶體200置於基板100上。第一氮化鎵場效電晶體200為空乏型場效電晶體。第二氮化鎵場效電晶體300置於基板100上。第二氮化鎵場效電晶體300為增強型場效電晶體。氮化鎵二極體400置於基板100上。第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400皆置於基板100的同一側並互相電性連接。因第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400皆置於基板100的同一側,因此第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400之間的連接電阻可被降低。
如第1圖所示,第一氮化鎵場效電晶體200可包含異質結構層210、閘極220、源極230與汲極240。異質結構層210置於基板100上,且異質結構層210包含複數個氮化物半導體層212、213、214、215與216以及一二維電子氣(Two-Dimensional Electronic Gas, 2DEG)通道於其中。源極230與汲極240互相分離設置,且源極230與汲極240分別電性連接至二維電子氣通道。閘極220置於異質結構層210上方,且置於源極230與汲極240之間。
第二氮化鎵場效電晶體300可包含異質結構層310、p型摻雜層320、閘極330、源極340與汲極350。異質結構層310置於基板100上。異質結構層3 10包含複數個氮化物半導體層312、313、314、315與316以及二維 電子氣通道於其中。源極340與汲極350互相分離設置,且源極340與汲極350分別電性連接至二維電子氣通道。閘極330置於異質結構層310上方,且置於源極340與汲極350之間。p型摻雜層320置於異質結構層310與閘極330之間。
氮化鎵二極體400可包含異質結構層410、p型摻雜層420、陽極430與陰極440。異質結構層410置於基板100上,且異質結構層410包含複數個氮化物半導體層412、413、414、41 5與416 以及二維電子氣通道於其中。陽極430與陰極440互相分離設置,且陽極430與陰極440分別電性連接至異質結構層410。p型摻雜層420置於異質結構層410上,且置於陽極430與異質結構層410之間。
在本實施方式中,異質結構層210、異質結構層310與異質結構層410係共同的。也就是說,異質結構層210、異質結構層310與異質結構層410之結構與材質為相同的。在一或多個實施方式中,異質結構層210、異質結構層310與異質結構層410可包含堆疊之氮化物半導體層,例如互相堆疊之氮化鎵/氮化鎵鋁(GaN/AlGaN)層。在一或多個實施方式中,每一氮化物半導體層212、214、216、312、314、316、413、414與416均包含AlxGa1-xN (0 x 0.3),且每一氮化物半導體層213、215、313、315、413與415均包含AlyGa1-yN (0 y 0.5),其中x小於y。應注意的是,雖然在第1圖中,氮化物半導體層組合如212、213、214、215與216;組合如312、313、314、315與316;或組合如412、413、414、415與416等皆可為複數層態樣,但在其他的實施方式中,各氮化物半導體層之層數及/或數量可視實際情況而定,本發明並不以此為限。
在本實施方式中,p型摻雜層320之材質可為 p型氮化鎵或p型氮化鎵鋁。因存在於異質結構層310中之二維電子氣通道會因p型摻雜層320而中斷,因此第二氮化鎵場效電晶體300可為一常關型場效電晶體,即增強型場效電晶體。
更進一步地,p型摻雜層420之材質亦可為p型氮化鎵或p型氮化鎵鋁。在一或多個實施方式中,具有相同材質之p型摻雜層320與420可在同一製程步驟中形成。
第2圖為本發明另一實施方式之半導體裝置的剖面圖。本實施方式與第1圖之實施方式的不同處在於第二氮化鎵場效電晶體。如第2圖所示,第二氮化鎵場效電晶體500可包含異質結構層510、閘極520、源極530與汲極540。異質結構層510置於基板100上。異質結構層510具有傾斜部I-I。相似的,異質結構層510可包含複數個氮化物半導體層512/513/514/515/516以及二維電子氣通道於其中。源極530與汲極540互相分離設置,且源極530與汲極540分別電性連接至異質結構層510之二維電子氣通道。閘極520置於源極530與汲極540之間。至少部份之閘極520置於異質結構層510之傾斜部I-I上。因於傾斜部I-I之氮化物半導體層512的傾斜表面能夠有效地降低其附近之二維電子氣的濃度,因此二維電子氣通道係可在傾斜部I-I中被中斷。如此一來,第二氮化鎵場效電晶體500可為一常關型場效電晶體,即增強型場效電晶體。應注意的是,雖然在第2圖中,氮化物半導體層512、513、514、515與516之組合皆可為複數層,但在其他的實施方式中,氮化物半導體層512、513、514、515與516之數量及/或層數可視實際情況而定,本發明並不以此為限。
至於本發明之其他相關結構、材質與製程細節因與第1圖之實施方式相同,因此便不再贅述。
第3圖為本發明又一實施方式之半導體裝置的剖面圖。本實施方式與第1圖之實施方式的不同處在於第二氮化鎵場效電晶體。如第3圖所示,第二氮化鎵場效電晶體550可包含異質結構層560、閘極570、源極580與汲極590。異質結構層560置於基板100上,且異質結構層560具有凹槽566。相似的,異質結構層560可包含複數個氮化物半導體層561/562/563/564/565以及二維電子氣通道於其中。源極580與汲極590互相分離設置,且源極580與汲極590分別電性連接至異質結構層560之二維電子氣通道。閘極570置於源極580與汲極590之間,其中至少部份之閘極570置於異質結構層560之凹槽566上。因位於凹槽566下方之二維電子氣會被中斷,因此第二氮化鎵場效電晶體550可為一常關型場效電晶體,即增強型場效電晶體。應注意的是,雖然在第3圖中,氮化物半導體層561、562、563、564與565之組合可為複數層,但在其他的實施方式中,氮化物半導體層561、562、563、564與565之數量及/或層數可視實際情況而定,本發明並不以此為限。
至於本發明之其他相關結構、材質與製程細節因與第1圖之實施方式相同,因此便不再贅述。
在一或多個實施方式中,半導體裝置更包含氮化物層150,置於基板100與位於基板100上之裝置(即第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400)之間。氮化物層150可作為緩衝層,用以減少形成於其上之裝置的缺陷或晶格錯位;亦或者可作為形成於其上之裝置的成核層 。
第4圖為第1圖之半導體裝置的電路圖。在本實施方式中,第一氮化鎵場效電晶體 200可以共汲共閘形態電性連接第二氮化鎵場效電 晶體300,且氮化鎵二極體400可並聯地電性連接第二氮化鎵場效電晶體300。具體而言,第二氮化鎵場效電晶體300之汲極350電性連接至第一氮化鎵場效電晶體200之源極230與氮化鎵二極體400之陰極440,且第二氮化鎵場效電晶體300之源極340電性連接至氮化鎵二極體400之陽極430。
如此一來,第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400可共同組成一常關型場效電晶體裝置。正常而言,第一氮化鎵場效電晶體200通常具有高操作電壓,第二氮化鎵場效電晶體300通常具有高速開關。與第二氮化鎵場效電晶體300並聯之氮化鎵二極體400可作為本體二極體(Body Diode),用以進一步改善其開關性能。如此一來,第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400可等效於一具高操作電極與高速操作之常關型場效電晶體裝置。
雖然第4圖之第一氮化鎵場效電晶體200之閘極220電性連接至第二氮化鎵場效電晶體300之源極340,然而本發明不以此為限。在其他的實施方式中,如第5圖所示,第一氮化鎵場效電晶體200之閘極220與第二氮化鎵場效電晶體300之源極340可分別連接至其他元件以達成特定功能。
第6圖為本發明另一實施方式之半導體裝置的電路圖。半導體裝置可更包含一二極體450。在一或多個實施方式中,二極體450可為一功率因數修正(Power Factor Correction, PFC)二極體。二極體450可為任意形式之二極體,例如蕭特基二極體(Schottky diode)、超快速二極體(Ultra–Fast Diode)、碳化矽(Silicon Carbide)二極體、氮化鎵二極體或上述之任意組合。第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400皆置於基板100(如第1圖所示)的同一側。二極體450之陽極490電性連接至第一氮化鎵場效電晶體200之汲極240。在一實施方式中,二極體450可與第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300以及氮化鎵二極體400共同置於基板100上。在其他的實施方式中,二極體450可獨立製作並與第一氮化鎵場效電晶體200封裝在一起。
請回到第1圖。在一實施方式中,半導體裝置可更包含保護層,覆蓋第一氮化鎵場效電晶體200、第二氮化鎵場效電晶體300與氮化鎵二極體400。在一實施方式中,半導體裝置可更包含三個焊墊,分別電性連接至第一氮化鎵場效電晶體200之汲極240、第二氮化鎵場效電晶體300之閘極330與第二氮化鎵場效電晶體300之源極340。
在一實施方式中,半導體裝置可以覆晶方式設置於一金屬基板上,例如金屬導線架(Leadframe),使得上述之三焊墊皆面向金屬基板設置。在一實施方式中,金屬基板可包含第一導線、第二導線與第三導線,分別電性連接至半導體裝置之三焊墊。
第7圖為本發明又一實施方式之半導體裝置的剖面圖。半導體裝置包含基板100、異質結構層610、第一氮化鎵場效電晶體620、第二氮化鎵場效電晶體630、中間連接結構640與覆蓋層650。異質結構層610置於基板100上。異質結構層610包含第一區域II-II、第二區域III-III與中間連接區域IV-IV,中間連接區域IV-IV置於第一區域II-II與第二區域III-III之間,且異質結構層610產生二維電子氣通道616於其中。第一氮化鎵場效電晶體620包含第一區域II-II之部份異質結構層610。第二氮化鎵場效電晶體630包含第二區域III-III之部份異質結構層610。中間連接結構640置於中間連接區域IV-IV之異質結構層610上方,且電性連接第一氮化鎵場效電晶體620與第二氮化鎵場效電晶體630。覆蓋層650置於中間連接結構640與異質結構層610之間。覆蓋層650能夠實質中斷位於異質結構層610之中間連接區域IV-IV之二維電子氣通道616。
異質結構層610可包含第一半導體層612,即i型氮化鎵(i-GaN)層,以及第二半導體層614,即i型氮化鎵鋁(i-AlGaN)層,其中第二半導體層614置於第一半導體層612上。因此二維電子氣通道616可毗鄰第一半導體層612與第二半導體層614之間之界面存在。
在一或多個實施方式中,覆蓋層650可為p型摻雜層。其中p型摻雜層可中斷位於異質結構層610之中間連接區域IV-IV下方之二維電子氣通道616,而p型摻雜層之材質可為p型氮化鎵或p型氮化鎵鋁。
因覆蓋層650可中斷位於異質結構層610之中間連接區域IV-IV之二維電子氣通道616,因此異質結構層610之中間連接區域IV-IV可不需形成其他絕緣結構,即絕緣溝槽。更進一步地,第一氮化鎵場效電晶體620與第二氮化鎵場效電晶體630之間可以中間連接結構640作電性連接,因此也可不需再另外加入額外的導線製程。
在本實施方式中,第一氮化鎵場效電晶體620可為空乏型場效電晶體,而第二氮化鎵場效電晶體630可為增強型場效電晶體。具體而言,第二氮化鎵場效電晶體630可包含具p型摻雜材料之覆蓋層632,置於閘極結構與異質結構層610之第二區域III-III之間,因此位於異質結構層610之第二區域III-III之二維電子氣通道616可被覆蓋層632中斷。
在本實施方式中,中間連接結構640電性連接至第一氮化鎵場效電晶體620之源極622以及第二氮化鎵場效電晶體630之汲極634,其中第一氮化鎵場效電晶體620為空乏型場效電晶體,且第二氮化鎵場效電晶體630為增強型場效電晶體。中間連接結構640之上表面、第一氮化鎵場效電晶體620之源極622之上表面、與第二氮化鎵場效電晶體630之汲極634之上表面實質共平面。
上述之設計,即所有氮化鎵元件皆置於基板之同一側、以及覆蓋層置於中間連接結構與異質結構層之間,可被應用於不同的電路(例如第8至11圖之電路)中。如第8圖所示,半導體裝置可包含二增強型氮化鎵場效電晶體705與二氮化鎵二極體707。增強型氮化鎵場效電晶體705分別以共汲共閘形態並聯地電性連接氮化鎵二極體707。在第8圖中,增強型氮化鎵場效電晶體705與氮化鎵二極體707皆置於基板的同一側,且/或增強型氮化鎵場效電晶體705與氮化鎵二極體707之間的每一電性連接皆可應用如第7圖所繪示之覆蓋層650與中間連接結構640。如第9圖所示,半導體裝置可包含一增強型氮化鎵場效電晶體710與一氮化鎵二極體720。增強型氮化鎵場效電晶體710並聯地電性連接氮化鎵二極體720。在第9圖中,增強型氮化鎵場效電晶體710與氮化鎵二極體720皆置於基板的同一側,且/或增強型氮化鎵場效電晶體710與/或氮化鎵二極體720之間的每一電性連接皆可應用如第7圖所繪示之覆蓋層650與中間連接結構640。如第10圖所示,半導體裝置可包含一增強型氮化鎵場效電晶體730與一氮化鎵二極體740。氮化鎵二極體740之陽極742電性連接至增強型氮化鎵場效電晶體730之汲極732。在第10圖中,增強型氮化鎵場效電晶體730與氮化鎵二極體740皆置於基板的同一側,且/或增強型氮化鎵場效電晶體730與氮化鎵二極體740之間的每一電性連接皆可應用如第7圖所繪示之覆蓋層650與中間連接結構640。如第11圖所示,半導體裝置可包含一空乏型氮化鎵場效電晶體750與一氮化鎵二極體760。氮化鎵二極體760之陰極764電性連接至空乏型氮化鎵場效電晶體750之源極754,且氮化鎵二極體760之陽極762電性連接至空乏型氮化鎵場效電晶體750之閘極752。在第11圖中,空乏型氮化鎵場效電晶體750與氮化鎵二極體760皆置於基板的同一側,且/或空乏型氮化鎵場效電晶體750與氮化鎵二極體760之間的每一電性連接皆可應用如第7圖所繪示之覆蓋層650與中間連接結構640。
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100...基板
150...氮化物層
200...第一氮化鎵場效電晶體
210、310、410...異質結構層
212~216、312~316、412~416...氮化物半導體層
220、330...閘極
230、340...源極
240、350...汲極
300...第二氮化鎵場效電晶體
320、420...p型摻雜層
400...氮化鎵二極體
430...陽極
440...陰極
Claims (19)
- 一種半導體裝置,包含:
一基板;
一第一氮化鎵場效電晶體,置於該基板上,其中該第一氮化鎵場效電晶體為一空乏型場效電晶體;
一第二氮化鎵場效電晶體,置於該基板上,其中該第二氮化鎵場效電晶體為一增強型場效電晶體;以及
一氮化鎵二極體,置於該基板上,其中該第一氮化鎵場效電晶體、該第二氮化鎵場效電晶體與該氮化鎵二極體皆置於該基板的同一側並互相電性連接。 - 如請求項1所述之半導體裝置,其中該第一氮化鎵場效電晶體以共汲共閘形態電性連接該第二氮化鎵場效電晶體,且該氮化鎵二極體並聯地電性連接該第二氮化鎵場效電晶體。
- 如請求項1所述之半導體裝置,其中該第二氮化鎵場效電晶體之一汲極電性連接至該第一氮化鎵場效電晶體之一源極與該氮化鎵二極體之一陰極。
- 如請求項1所述之半導體裝置,其中該第一氮化鎵場效電晶體、該第二氮化鎵場效電晶體與該氮化鎵二極體共同組成一常關型場效電晶體裝置。
- 如請求項1所述之半導體裝置,更包含:
一功率因數修正二極體,其中該功率因數修正二極體之一陽極電性連接至該第一氮化鎵場效電晶體之一汲極。 - 如請求項1所述之半導體裝置,更包含:
一氮化物層,置於該基板上,其中該第一氮化鎵場效電晶體、該第二氮化鎵場效電晶體與該氮化鎵二極體皆置於該氮化物層上。 - 如請求項1所述之半導體裝置,其中該第一氮化鎵場效電晶體、該第二氮化鎵場效電晶體與該氮化鎵二極體共同包含至少一異質結構層,且該異質結構層至少包含氮化鎵鋁(AlxGa1-xN, 0<x<0.3 )。
- 如請求項1所述之半導體裝置,其中該第一氮化鎵場效電晶體包含:
一異質結構層,置於該基板上,該異質結構層包含複數個氮化物半導體層以及至少一二維電子氣通道於其中;
一源極與一汲極,互相分離設置,且分別電性連接至該二維電子氣通道;以及
一閘極,置於該異質結構層上方,且置於該源極與該汲極之間。 - 如請求項1所述之半導體裝置,其中該第二氮化鎵場效電晶體包含:
一異質結構層,置於該基板上,該異質結構層包含複數個氮化物半導體層以及至少一二維電子氣通道於其中;
一源極與一汲極,互相分離設置,且分別電性連接至該二維電子氣通道;
一閘極,置於該異質結構層上方,且置於該源極與該汲極之間;以及
一p型摻雜層,置於該異質結構層與該閘極之間。 - 如請求項9所述之半導體裝置,其中該p型摻雜層之材質為p型氮化鎵或p型氮化鎵鋁。
- 如請求項1所述之半導體裝置,其中該第二氮化鎵場效電晶體包含:
一異質結構層,置於該基板上,該異質結構層包含複數個氮化物半導體層以及至少一二維電子氣通道於其中,且該異質結構層具有一傾斜部;
一源極與一汲極,互相分離設置,且分別電性連接至該二維電子氣通道;以及
一閘極,置於該源極與該汲極之間,其中至少部份之該閘極置於該異質結構層之該傾斜部上。 - 如請求項1所述之半導體裝置,其中該第二氮化鎵場效電晶體包含:
一異質結構層,置於該基板上,該異質結構層包含複數個氮化物半導體層以及至少一二維電子氣通道於其中,且該異質結構層具有一凹槽;
一源極與一汲極,互相分離設置,且分別電性連接至該二維電子氣通道;以及
一閘極,置於該源極與該汲極之間,其中至少部份之該閘極置於該異質結構層之該凹槽上。 - 如請求項1所述之半導體裝置,其中該氮化鎵二極體包含:
一異質結構層,置於該基板上;
一陽極與一陰極,互相分離設置,且分別電性連接至該異質結構層;以及
一p型摻雜層,置於該異質結構層上,且置於該陽極與該異質結構層之間。 - 一種半導體裝置,包含:
一基板;
一異質結構層,置於該基板上,其中該異質結構層包含一第一區域、一第二區域與一中間連接區域,該中間連接區域置於該第一區域與該第二區域之間,且該異質結構層產生一二維電子氣通道於其中;
一第一氮化鎵場效電晶體,包含該第一區域之部份該異質結構層;
一第二氮化鎵場效電晶體,包含該第二區域之部份該異質結構層;
一中間連接結構置於該中間連接區域之該異質結構層上方,且電性連接該第一氮化鎵場效電晶體與該第二氮化鎵場效電晶體;以及
一覆蓋層,置於該中間連接結構與該異質結構層之間,其中位於該異質結構層之該中間連接區域之該二維電子氣通道於該覆蓋層下方實質中斷。 - 如請求項14所述之半導體裝置,其中該覆蓋層為一p型摻雜層。
- 如請求項14所述之半導體裝置,其中該第一氮化鎵場效電晶體為一空乏型場效電晶體,且該第二氮化鎵場效電晶體為一增強型場效電晶體。
- 如請求項16所述之半導體裝置,其中該中間連接結構電性連接該增強型場效電晶體之一汲極與該空乏型場效電晶體之一源極,且該中間連接結構之一上表面、該增強型場效電晶體之該汲極之一上表面、與該空乏型場效電晶體之該源極之一上表面實質共平面。
- 如請求項14所述之半導體裝置,其中該異質結構層包含一第一半導體層與一第二半導體層,該第二半導體層置於該第一半導體層上。
- 如請求項18所述之半導體裝置,其中該二維電子氣結構毗鄰該第一半導體層與該第二半導體層之間的一界面。
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9698141B2 (en) | 2015-09-04 | 2017-07-04 | Kabushiki Kaisha Toshiba | Semiconductor device |
TWI644432B (zh) * | 2017-12-11 | 2018-12-11 | 世界先進積體電路股份有限公司 | 半導體結構及其製造方法 |
TWI682515B (zh) * | 2014-08-20 | 2020-01-11 | 美商納維達斯半導體公司 | 具有分布閘極之功率電晶體 |
US10692857B2 (en) | 2018-05-08 | 2020-06-23 | Vanguard International Semiconductor Corporation | Semiconductor device combining passive components with HEMT |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102182016B1 (ko) * | 2013-12-02 | 2020-11-23 | 엘지이노텍 주식회사 | 반도체 소자 및 이를 포함하는 반도체 회로 |
US10290566B2 (en) * | 2014-09-23 | 2019-05-14 | Infineon Technologies Austria Ag | Electronic component |
JP2017005153A (ja) * | 2015-06-11 | 2017-01-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9871510B1 (en) | 2016-08-24 | 2018-01-16 | Power Integrations, Inc. | Clamp for a hybrid switch |
US11257811B2 (en) | 2017-07-14 | 2022-02-22 | Cambridge Enterprise Limited | Power semiconductor device with an auxiliary gate structure |
US11336279B2 (en) | 2017-07-14 | 2022-05-17 | Cambridge Enterprise Limited | Power semiconductor device with a series connection of two devices |
GB2564482B (en) | 2017-07-14 | 2021-02-10 | Cambridge Entpr Ltd | A power semiconductor device with a double gate structure |
US10840798B1 (en) | 2018-09-28 | 2020-11-17 | Dialog Semiconductor (Uk) Limited | Bidirectional signaling method for high-voltage floating circuits |
US11955478B2 (en) * | 2019-05-07 | 2024-04-09 | Cambridge Gan Devices Limited | Power semiconductor device with an auxiliary gate structure |
FR3097682B1 (fr) * | 2019-06-19 | 2023-01-13 | St Microelectronics Gmbh | Composant monolithique comportant un transistor de puissance au nitrure de gallium |
US11749656B2 (en) * | 2020-06-16 | 2023-09-05 | Transphorm Technology, Inc. | Module configurations for integrated III-Nitride devices |
US20230402549A1 (en) * | 2022-06-09 | 2023-12-14 | Macom Technology Solutions Holdings, Inc. | Monolithic pin and schottky diode integrated circuits |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5192987A (en) | 1991-05-17 | 1993-03-09 | Apa Optics, Inc. | High electron mobility transistor with GaN/Alx Ga1-x N heterojunctions |
US7298123B2 (en) | 2000-02-08 | 2007-11-20 | The Furukawa Electric Co., Ltd. | Apparatus and circuit for power supply, and apparatus for controlling large current load |
US6768146B2 (en) * | 2001-11-27 | 2004-07-27 | The Furukawa Electric Co., Ltd. | III-V nitride semiconductor device, and protection element and power conversion apparatus using the same |
US8089097B2 (en) * | 2002-12-27 | 2012-01-03 | Momentive Performance Materials Inc. | Homoepitaxial gallium-nitride-based electronic devices and method for producing same |
US7382001B2 (en) | 2004-01-23 | 2008-06-03 | International Rectifier Corporation | Enhancement mode III-nitride FET |
JP2007220895A (ja) * | 2006-02-16 | 2007-08-30 | Matsushita Electric Ind Co Ltd | 窒化物半導体装置およびその製造方法 |
US8017978B2 (en) | 2006-03-10 | 2011-09-13 | International Rectifier Corporation | Hybrid semiconductor device |
US8264003B2 (en) * | 2006-03-20 | 2012-09-11 | International Rectifier Corporation | Merged cascode transistor |
US9076852B2 (en) * | 2007-01-19 | 2015-07-07 | International Rectifier Corporation | III nitride power device with reduced QGD |
US8502323B2 (en) | 2007-08-03 | 2013-08-06 | The Hong Kong University Of Science And Technology | Reliable normally-off III-nitride active device structures, and related methods and systems |
US8659275B2 (en) | 2008-01-11 | 2014-02-25 | International Rectifier Corporation | Highly efficient III-nitride power conversion circuit |
US7965126B2 (en) | 2008-02-12 | 2011-06-21 | Transphorm Inc. | Bridge circuits and their components |
JP5566618B2 (ja) | 2008-03-07 | 2014-08-06 | 古河電気工業株式会社 | GaN系半導体素子 |
US8076699B2 (en) * | 2008-04-02 | 2011-12-13 | The Hong Kong Univ. Of Science And Technology | Integrated HEMT and lateral field-effect rectifier combinations, methods, and systems |
US8957642B2 (en) * | 2008-05-06 | 2015-02-17 | International Rectifier Corporation | Enhancement mode III-nitride switch with increased efficiency and operating frequency |
US7985986B2 (en) | 2008-07-31 | 2011-07-26 | Cree, Inc. | Normally-off semiconductor devices |
US8289065B2 (en) | 2008-09-23 | 2012-10-16 | Transphorm Inc. | Inductive load power switching circuits |
US8084783B2 (en) * | 2008-11-10 | 2011-12-27 | International Rectifier Corporation | GaN-based device cascoded with an integrated FET/Schottky diode device |
US7898004B2 (en) * | 2008-12-10 | 2011-03-01 | Transphorm Inc. | Semiconductor heterostructure diodes |
US7884394B2 (en) * | 2009-02-09 | 2011-02-08 | Transphorm Inc. | III-nitride devices and circuits |
US7915645B2 (en) | 2009-05-28 | 2011-03-29 | International Rectifier Corporation | Monolithic vertically integrated composite group III-V and group IV semiconductor device and method for fabricating same |
JP4700125B2 (ja) * | 2009-07-30 | 2011-06-15 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
JP2011071356A (ja) * | 2009-09-26 | 2011-04-07 | Sanken Electric Co Ltd | 半導体装置 |
US8816497B2 (en) * | 2010-01-08 | 2014-08-26 | Transphorm Inc. | Electronic devices and components for high efficiency power circuits |
US9219058B2 (en) * | 2010-03-01 | 2015-12-22 | Infineon Technologies Americas Corp. | Efficient high voltage switching circuits and monolithic integration of same |
US9263439B2 (en) * | 2010-05-24 | 2016-02-16 | Infineon Technologies Americas Corp. | III-nitride switching device with an emulated diode |
FR2967813B1 (fr) | 2010-11-18 | 2013-10-04 | Soitec Silicon On Insulator | Procédé de réalisation d'une structure a couche métallique enterrée |
US9076853B2 (en) * | 2011-03-18 | 2015-07-07 | International Rectifie Corporation | High voltage rectifier and switching circuits |
US9859882B2 (en) * | 2011-03-21 | 2018-01-02 | Infineon Technologies Americas Corp. | High voltage composite semiconductor device with protection for a low voltage device |
US9362905B2 (en) * | 2011-03-21 | 2016-06-07 | Infineon Technologies Americas Corp. | Composite semiconductor device with turn-on prevention control |
US20120241820A1 (en) * | 2011-03-21 | 2012-09-27 | International Rectifier Corporation | III-Nitride Transistor with Passive Oscillation Prevention |
KR20130004707A (ko) * | 2011-07-04 | 2013-01-14 | 삼성전기주식회사 | 질화물 반도체 소자, 질화물 반도체 소자의 제조방법 및 질화물 반도체 파워소자 |
US9147701B2 (en) * | 2011-09-22 | 2015-09-29 | Raytheon Company | Monolithic InGaN solar cell power generation with integrated efficient switching DC-DC voltage convertor |
US10122293B2 (en) * | 2012-01-17 | 2018-11-06 | Infineon Technologies Americas Corp. | Power module package having a multi-phase inverter and power factor correction |
TWI439841B (zh) * | 2012-03-15 | 2014-06-01 | Univ Nat Chiao Tung | 電流限制電路裝置 |
KR101922117B1 (ko) * | 2012-08-16 | 2018-11-26 | 삼성전자주식회사 | 트랜지스터를 포함하는 전자소자 및 그 동작방법 |
KR101919421B1 (ko) * | 2012-08-16 | 2018-11-19 | 삼성전자주식회사 | 반도체소자 및 그 제조방법 |
-
2013
- 2013-11-19 TW TW102141968A patent/TWI567930B/zh active
- 2013-11-19 CN CN201310585132.0A patent/CN103824845B/zh active Active
- 2013-11-19 US US14/083,777 patent/US9484418B2/en active Active
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI682515B (zh) * | 2014-08-20 | 2020-01-11 | 美商納維達斯半導體公司 | 具有分布閘極之功率電晶體 |
US10587194B2 (en) | 2014-08-20 | 2020-03-10 | Navitas Semiconductor, Inc. | Power transistor with distributed gate |
US11296601B2 (en) | 2014-08-20 | 2022-04-05 | Navitas Semiconductor Limited | Power transistor with distributed gate |
US9698141B2 (en) | 2015-09-04 | 2017-07-04 | Kabushiki Kaisha Toshiba | Semiconductor device |
TWI644432B (zh) * | 2017-12-11 | 2018-12-11 | 世界先進積體電路股份有限公司 | 半導體結構及其製造方法 |
US10692857B2 (en) | 2018-05-08 | 2020-06-23 | Vanguard International Semiconductor Corporation | Semiconductor device combining passive components with HEMT |
US10867993B2 (en) | 2018-05-08 | 2020-12-15 | Vanguard International Semiconductor Corporation | Touch sensing circuits and methods for detecting touch events |
Also Published As
Publication number | Publication date |
---|---|
CN103824845B (zh) | 2017-08-29 |
CN103824845A (zh) | 2014-05-28 |
US9484418B2 (en) | 2016-11-01 |
TWI567930B (zh) | 2017-01-21 |
US20140138701A1 (en) | 2014-05-22 |
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