JP6358664B2 - 回路アッセンブリ - Google Patents

回路アッセンブリ Download PDF

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Publication number
JP6358664B2
JP6358664B2 JP2015556123A JP2015556123A JP6358664B2 JP 6358664 B2 JP6358664 B2 JP 6358664B2 JP 2015556123 A JP2015556123 A JP 2015556123A JP 2015556123 A JP2015556123 A JP 2015556123A JP 6358664 B2 JP6358664 B2 JP 6358664B2
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JP
Japan
Prior art keywords
discrete component
circuit assembly
substrate
lead frame
flange
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2015556123A
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English (en)
Japanese (ja)
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JP2016510513A (ja
JP2016510513A5 (enExample
Inventor
アレン ガーバー マーク
アレン ガーバー マーク
Original Assignee
日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 日本テキサス・インスツルメンツ株式会社, テキサス インスツルメンツ インコーポレイテッド, テキサス インスツルメンツ インコーポレイテッド filed Critical 日本テキサス・インスツルメンツ株式会社
Publication of JP2016510513A publication Critical patent/JP2016510513A/ja
Publication of JP2016510513A5 publication Critical patent/JP2016510513A5/ja
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Publication of JP6358664B2 publication Critical patent/JP6358664B2/ja
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/02Arrangements of circuit components or wiring on supporting structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/146Mixed devices
    • H01L2924/1461MEMS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19102Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • H01L2924/19103Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09072Hole or recess under component or special relationship between hole and component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/1003Non-printed inductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/10515Stacked components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/1053Mounted components directly electrically connected to each other, i.e. not via the PCB
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49139Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Manufacturing & Machinery (AREA)
JP2015556123A 2013-01-30 2014-01-30 回路アッセンブリ Active JP6358664B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361758459P 2013-01-30 2013-01-30
US61/758,459 2013-01-30
US13/900,758 US9253910B2 (en) 2013-01-30 2013-05-23 Circuit assembly
US13/900,758 2013-05-23
PCT/US2014/013790 WO2014120894A1 (en) 2013-01-30 2014-01-30 Circuit assembly

Publications (3)

Publication Number Publication Date
JP2016510513A JP2016510513A (ja) 2016-04-07
JP2016510513A5 JP2016510513A5 (enExample) 2017-03-02
JP6358664B2 true JP6358664B2 (ja) 2018-07-18

Family

ID=51222731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015556123A Active JP6358664B2 (ja) 2013-01-30 2014-01-30 回路アッセンブリ

Country Status (4)

Country Link
US (2) US9253910B2 (enExample)
JP (1) JP6358664B2 (enExample)
CN (1) CN104937713B (enExample)
WO (2) WO2014120894A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102004794B1 (ko) * 2014-06-24 2019-07-29 삼성전기주식회사 복합 전자부품 및 그 실장 기판
DE102014118769B4 (de) * 2014-12-16 2017-11-23 Infineon Technologies Ag Drucksensor-Modul mit einem Sensor-Chip und passiven Bauelementen innerhalb eines gemeinsamen Gehäuses
WO2018146813A1 (ja) * 2017-02-13 2018-08-16 新電元工業株式会社 電子モジュール
CN110022643A (zh) * 2019-04-09 2019-07-16 业成科技(成都)有限公司 焊接固定组件结构
JP7677118B2 (ja) * 2021-10-29 2025-05-15 住友電装株式会社 回路構成体

Family Cites Families (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54110764U (enExample) * 1978-01-25 1979-08-03
JPS5824405Y2 (ja) * 1979-02-09 1983-05-25 株式会社村田製作所 中間周波トランスの取付構造
JPS6214714Y2 (enExample) * 1980-08-06 1987-04-15
JPS57175480U (enExample) * 1981-04-30 1982-11-05
JPS58105111U (ja) * 1982-01-12 1983-07-18 株式会社 光輪技研 高周波コイル
JPS6416619U (enExample) * 1987-07-18 1989-01-27
JPH0296766U (enExample) * 1989-01-20 1990-08-01
US5025114A (en) 1989-10-30 1991-06-18 Olin Corporation Multi-layer lead frames for integrated circuit packages
DE4416697A1 (de) * 1994-05-11 1995-11-16 Giesecke & Devrient Gmbh Datenträger mit integriertem Schaltkreis
DE4420698C2 (de) * 1994-06-14 1998-08-20 Schadow Rudolf Gmbh Adapter zur elektrischen Verbindung von optoelektronischen Bauelementen mit einer Leiterplatte
JPH08130125A (ja) * 1994-10-31 1996-05-21 Nec Corp トランス
JP4030028B2 (ja) * 1996-12-26 2008-01-09 シチズン電子株式会社 Smd型回路装置及びその製造方法
DE19710144C2 (de) * 1997-03-13 1999-10-14 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer Chipkarte und nach dem Verfahren hergestellte Chipkarte
US6285272B1 (en) * 1999-10-28 2001-09-04 Coilcraft, Incorporated Low profile inductive component
TW497126B (en) * 2001-05-03 2002-08-01 Comchip Technology Co Ltd Discrete circuit component and its manufacturing method
JP2003124428A (ja) * 2001-10-12 2003-04-25 Citizen Electronics Co Ltd 表面実装型elドライバー
JP2004006828A (ja) * 2002-04-26 2004-01-08 Ngk Spark Plug Co Ltd 配線基板
CN2598146Y (zh) * 2002-12-27 2004-01-07 胜开科技股份有限公司 影像感测器堆叠装置
US6914506B2 (en) * 2003-01-21 2005-07-05 Coilcraft, Incorporated Inductive component and method of manufacturing same
TW573887U (en) * 2003-05-13 2004-01-21 Ferrico Corp Base for electronic device
CN2636411Y (zh) * 2003-08-01 2004-08-25 威盛电子股份有限公司 多芯片封装结构
JP2005198051A (ja) * 2004-01-08 2005-07-21 Hitachi Ltd 高周波モジュール
CN1926646A (zh) * 2004-03-10 2007-03-07 Det国际控股有限公司 一种磁性件
JP2005302928A (ja) * 2004-04-09 2005-10-27 Renesas Technology Corp 半導体装置
US7564336B2 (en) * 2004-08-26 2009-07-21 Cooper Technologies Company Surface mount magnetic core with coil termination clip
TWI292617B (en) * 2006-02-03 2008-01-11 Siliconware Precision Industries Co Ltd Stacked semiconductor structure and fabrication method thereof
US7504283B2 (en) * 2006-12-18 2009-03-17 Texas Instruments Incorporated Stacked-flip-assembled semiconductor chips embedded in thin hybrid substrate
CN101271535B (zh) * 2007-03-22 2010-07-14 沈育浓 一种具有堆叠式元件结构的存储介质
TW200847301A (en) 2007-05-24 2008-12-01 Comchip Technology Co Ltd Process for making leadless package for discrete circuit components
US8115304B1 (en) * 2008-02-06 2012-02-14 Xilinx, Inc. Method of implementing a discrete element in an integrated circuit
DE112009001388T5 (de) * 2008-06-05 2011-04-28 Koa Corp., Ina-shi Chip-Induktionsspule und Herstellungsverfahren dafür
US8102237B2 (en) * 2008-06-12 2012-01-24 Power Integrations, Inc. Low profile coil-wound bobbin
US20100270580A1 (en) * 2009-04-22 2010-10-28 Jason Loomis Posselt Substrate based light source package with electrical leads
US9355962B2 (en) 2009-06-12 2016-05-31 Stats Chippac Ltd. Integrated circuit package stacking system with redistribution and method of manufacture thereof
US8304887B2 (en) * 2009-12-10 2012-11-06 Texas Instruments Incorporated Module package with embedded substrate and leadframe
JP2012005163A (ja) * 2010-06-14 2012-01-05 Shicoh Engineering Co Ltd 基板装置及びモバイル端末装置
FR2964487B1 (fr) * 2010-09-02 2013-07-12 Oberthur Technologies Carte a microcircuit comprenant un moyen lumineux
JP2012079847A (ja) * 2010-09-30 2012-04-19 Toshiba Lighting & Technology Corp 電気装置および照明装置

Also Published As

Publication number Publication date
US9253910B2 (en) 2016-02-02
US20140211444A1 (en) 2014-07-31
WO2014120896A1 (en) 2014-08-07
US20140211439A1 (en) 2014-07-31
JP2016510513A (ja) 2016-04-07
CN104937713B (zh) 2018-09-21
CN104937713A (zh) 2015-09-23
WO2014120894A1 (en) 2014-08-07

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