JP6295486B2 - Ｉ／ｏドライバ送信振幅制御 - Google Patents

Ｉ／ｏドライバ送信振幅制御 Download PDF

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Publication number
JP6295486B2
JP6295486B2 JP2016521826A JP2016521826A JP6295486B2 JP 6295486 B2 JP6295486 B2 JP 6295486B2 JP 2016521826 A JP2016521826 A JP 2016521826A JP 2016521826 A JP2016521826 A JP 2016521826A JP 6295486 B2 JP6295486 B2 JP 6295486B2
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JP
Japan
Prior art keywords
transmission line
interface circuit
line interface
voltage regulator
driver element
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Active
Application number
JP2016521826A
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English (en)
Japanese (ja)
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JP2016525302A (ja
Inventor
ピー． モザク、クリストファー
ピー． モザク、クリストファー
ビー． トリヴェディ、リテシュ
ビー． トリヴェディ、リテシュ
エイ． マックコール、ジェイムス
エイ． マックコール、ジェイムス
マーティン、アーロン
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Intel Corp
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Intel Corp
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Publication of JP2016525302A publication Critical patent/JP2016525302A/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/022—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0276—Arrangements for coupling common mode signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H04L25/029—Provision of high-impedance states
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/105—Aspects related to pads, pins or terminals
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • General Physics & Mathematics (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Sources (AREA)
JP2016521826A 2013-06-28 2014-06-19 Ｉ／ｏドライバ送信振幅制御 Active JP6295486B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/931,604 US9374004B2 (en) 2013-06-28 2013-06-28 I/O driver transmit swing control
US13/931,604 2013-06-28
PCT/US2014/043285 WO2014209765A1 (en) 2013-06-28 2014-06-19 I/o driver transmit swing control

Publications (2)

Publication Number Publication Date
JP2016525302A JP2016525302A (ja) 2016-08-22
JP6295486B2 true JP6295486B2 (ja) 2018-03-20

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JP2016521826A Active JP6295486B2 (ja) 2013-06-28 2014-06-19 Ｉ／ｏドライバ送信振幅制御

Country Status (8)

Country Link
US (1) US9374004B2 (https=)
EP (1) EP3014772B1 (https=)
JP (1) JP6295486B2 (https=)
KR (1) KR101852670B1 (https=)
CN (1) CN105247791B (https=)
BR (1) BR112015029866B1 (https=)
RU (1) RU2644536C2 (https=)
WO (1) WO2014209765A1 (https=)

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Also Published As

Publication number Publication date
BR112015029866A2 (https=) 2017-10-03
CN105247791B (zh) 2018-09-21
EP3014772A1 (en) 2016-05-04
US9374004B2 (en) 2016-06-21
US20150002408A1 (en) 2015-01-01
BR112015029866B1 (pt) 2022-04-26
RU2015151136A (ru) 2017-06-01
KR20150139925A (ko) 2015-12-14
RU2644536C2 (ru) 2018-02-12
EP3014772A4 (en) 2017-03-08
CN105247791A (zh) 2016-01-13
JP2016525302A (ja) 2016-08-22
WO2014209765A1 (en) 2014-12-31
KR101852670B1 (ko) 2018-04-26
EP3014772B1 (en) 2021-01-13

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