JP6282451B2 - 電子装置及び電子装置の製造方法 - Google Patents

電子装置及び電子装置の製造方法 Download PDF

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Publication number
JP6282451B2
JP6282451B2 JP2013250145A JP2013250145A JP6282451B2 JP 6282451 B2 JP6282451 B2 JP 6282451B2 JP 2013250145 A JP2013250145 A JP 2013250145A JP 2013250145 A JP2013250145 A JP 2013250145A JP 6282451 B2 JP6282451 B2 JP 6282451B2
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JP
Japan
Prior art keywords
magnetic thin
thin film
solder resist
sealing resin
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013250145A
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English (en)
Japanese (ja)
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JP2015109301A (ja
JP2015109301A5 (enExample
Inventor
小林 智樹
智樹 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2013250145A priority Critical patent/JP6282451B2/ja
Priority to US14/547,498 priority patent/US9456504B2/en
Publication of JP2015109301A publication Critical patent/JP2015109301A/ja
Publication of JP2015109301A5 publication Critical patent/JP2015109301A5/ja
Application granted granted Critical
Publication of JP6282451B2 publication Critical patent/JP6282451B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/042Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0715Shielding provided by an outer layer of PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08Magnetic details
    • H05K2201/083Magnetic materials
    • H05K2201/086Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10234Metallic balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Thin Magnetic Films (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
JP2013250145A 2013-12-03 2013-12-03 電子装置及び電子装置の製造方法 Active JP6282451B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013250145A JP6282451B2 (ja) 2013-12-03 2013-12-03 電子装置及び電子装置の製造方法
US14/547,498 US9456504B2 (en) 2013-12-03 2014-11-19 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013250145A JP6282451B2 (ja) 2013-12-03 2013-12-03 電子装置及び電子装置の製造方法

Publications (3)

Publication Number Publication Date
JP2015109301A JP2015109301A (ja) 2015-06-11
JP2015109301A5 JP2015109301A5 (enExample) 2016-10-20
JP6282451B2 true JP6282451B2 (ja) 2018-02-21

Family

ID=53266496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013250145A Active JP6282451B2 (ja) 2013-12-03 2013-12-03 電子装置及び電子装置の製造方法

Country Status (2)

Country Link
US (1) US9456504B2 (enExample)
JP (1) JP6282451B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203690294U (zh) * 2013-11-07 2014-07-02 新科实业有限公司 电子元件组件
US9899330B2 (en) * 2014-10-03 2018-02-20 Mc10, Inc. Flexible electronic circuits with embedded integrated circuit die
US9997468B2 (en) 2015-04-10 2018-06-12 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with shielding and method of manufacturing thereof
DE102016000264B4 (de) * 2016-01-08 2022-01-05 Infineon Technologies Ag Halbleiterchipgehäuse, das sich lateral erstreckende Anschlüsse umfasst, und Verfahren zur Herstellung desselben
US20190035744A1 (en) * 2016-03-31 2019-01-31 Tdk Corporation Electronic circuit package using composite magnetic sealing material
JP7039224B2 (ja) * 2016-10-13 2022-03-22 芝浦メカトロニクス株式会社 電子部品の製造装置及び電子部品の製造方法
JP2019016716A (ja) * 2017-07-07 2019-01-31 国立大学法人 鹿児島大学 積層基板及び金属ボールの実装方法
JP6905493B2 (ja) * 2018-08-24 2021-07-21 株式会社東芝 電子装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3432534B2 (ja) * 1992-09-29 2003-08-04 イビデン株式会社 プリント配線板
US7625640B2 (en) 2004-02-24 2009-12-01 Shin-Etsu Polymer Co., Ltd. Electromagnetic noise suppressor, structure with electromagnetic noise suppressing function, and method of manufacturing the same
KR100691160B1 (ko) * 2005-05-06 2007-03-09 삼성전기주식회사 적층형 표면탄성파 패키지 및 그 제조방법
CN101300911B (zh) * 2005-11-28 2010-10-27 株式会社村田制作所 电路模块以及制造电路模块的方法
JP2011124366A (ja) 2009-12-10 2011-06-23 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011198866A (ja) * 2010-03-18 2011-10-06 Renesas Electronics Corp 半導体装置およびその製造方法
KR101711045B1 (ko) * 2010-12-02 2017-03-02 삼성전자 주식회사 적층 패키지 구조물
JP6076653B2 (ja) * 2012-08-29 2017-02-08 新光電気工業株式会社 電子部品内蔵基板及び電子部品内蔵基板の製造方法

Also Published As

Publication number Publication date
US9456504B2 (en) 2016-09-27
JP2015109301A (ja) 2015-06-11
US20150156864A1 (en) 2015-06-04

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