JP6251629B2 - 配線基板及び配線基板の製造方法 - Google Patents

配線基板及び配線基板の製造方法 Download PDF

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Publication number
JP6251629B2
JP6251629B2 JP2014090406A JP2014090406A JP6251629B2 JP 6251629 B2 JP6251629 B2 JP 6251629B2 JP 2014090406 A JP2014090406 A JP 2014090406A JP 2014090406 A JP2014090406 A JP 2014090406A JP 6251629 B2 JP6251629 B2 JP 6251629B2
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Japan
Prior art keywords
metal layer
layer
hole
substrate body
metal
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JP2014090406A
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English (en)
Japanese (ja)
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JP2015211077A5 (https=
JP2015211077A (ja
Inventor
昌宏 春原
昌宏 春原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2014090406A priority Critical patent/JP6251629B2/ja
Priority to US14/687,126 priority patent/US9318351B2/en
Publication of JP2015211077A publication Critical patent/JP2015211077A/ja
Publication of JP2015211077A5 publication Critical patent/JP2015211077A5/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0261—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias characterised by the filling method or the material of the conductive fill
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/216—Through-semiconductor vias, e.g. TSVs characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/692—Ceramics or glasses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/695—Organic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2014090406A 2014-04-24 2014-04-24 配線基板及び配線基板の製造方法 Active JP6251629B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014090406A JP6251629B2 (ja) 2014-04-24 2014-04-24 配線基板及び配線基板の製造方法
US14/687,126 US9318351B2 (en) 2014-04-24 2015-04-15 Wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014090406A JP6251629B2 (ja) 2014-04-24 2014-04-24 配線基板及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2015211077A JP2015211077A (ja) 2015-11-24
JP2015211077A5 JP2015211077A5 (https=) 2017-02-16
JP6251629B2 true JP6251629B2 (ja) 2017-12-20

Family

ID=54335479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014090406A Active JP6251629B2 (ja) 2014-04-24 2014-04-24 配線基板及び配線基板の製造方法

Country Status (2)

Country Link
US (1) US9318351B2 (https=)
JP (1) JP6251629B2 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102382054B1 (ko) 2014-11-05 2022-04-01 코닝 인코포레이티드 상향식 전해 도금 방법
US9666507B2 (en) * 2014-11-30 2017-05-30 United Microelectronics Corp. Through-substrate structure and method for fabricating the same
JP7307898B2 (ja) * 2017-03-24 2023-07-13 大日本印刷株式会社 貫通電極基板及びその製造方法
US10917966B2 (en) * 2018-01-29 2021-02-09 Corning Incorporated Articles including metallized vias
US20190357364A1 (en) * 2018-05-17 2019-11-21 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component Carrier With Only Partially Filled Thermal Through-Hole
EP3905313A4 (en) * 2018-12-26 2022-11-02 Kyocera Corporation WIRING SUBSTRATE, ELECTRONIC DEVICE AND ELECTRONIC MODULE
KR102615059B1 (ko) * 2019-04-15 2023-12-19 다이니폰 인사츠 가부시키가이샤 관통 전극 기판, 전자 유닛, 관통 전극 기판의 제조 방법 및 전자 유닛의 제조 방법
JP2022147360A (ja) * 2021-03-23 2022-10-06 凸版印刷株式会社 多層配線基板およびその製造方法
JP7746684B2 (ja) * 2021-05-11 2025-10-01 大日本印刷株式会社 貫通電極基板
WO2025047765A1 (ja) * 2023-08-30 2025-03-06 京セラ株式会社 印刷配線板及びビルドアップ印刷配線板
CN120015732B (zh) * 2025-02-14 2025-11-14 无锡缶英微电子科技有限公司 一种硅电容器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3810659B2 (ja) * 2001-08-28 2006-08-16 日本メクトロン株式会社 ヴィアホールの充填方法
US6853046B2 (en) * 2002-09-24 2005-02-08 Hamamatsu Photonics, K.K. Photodiode array and method of making the same
JP4098673B2 (ja) 2003-06-19 2008-06-11 新光電気工業株式会社 半導体パッケージの製造方法
JP2007005404A (ja) * 2005-06-21 2007-01-11 Matsushita Electric Works Ltd 半導体基板への貫通配線の形成方法
JP4552770B2 (ja) * 2005-06-21 2010-09-29 パナソニック電工株式会社 半導体基板への貫通配線の形成方法
US8330256B2 (en) * 2008-11-18 2012-12-11 Seiko Epson Corporation Semiconductor device having through electrodes, a manufacturing method thereof, and an electronic apparatus
JP2013077807A (ja) * 2011-09-13 2013-04-25 Hoya Corp 基板製造方法および配線基板の製造方法

Also Published As

Publication number Publication date
US9318351B2 (en) 2016-04-19
US20150311154A1 (en) 2015-10-29
JP2015211077A (ja) 2015-11-24

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