JP6217870B2 - 構造体、配線基板および配線基板の製造方法 - Google Patents

構造体、配線基板および配線基板の製造方法 Download PDF

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Publication number
JP6217870B2
JP6217870B2 JP2016575253A JP2016575253A JP6217870B2 JP 6217870 B2 JP6217870 B2 JP 6217870B2 JP 2016575253 A JP2016575253 A JP 2016575253A JP 2016575253 A JP2016575253 A JP 2016575253A JP 6217870 B2 JP6217870 B2 JP 6217870B2
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Japan
Prior art keywords
resist layer
solder resist
core substrate
resin
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016575253A
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English (en)
Japanese (ja)
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JPWO2017057138A1 (ja
Inventor
宙 早井
宙 早井
大東　範行
範行 大東
猛 八月朔日
猛 八月朔日
元 山戸
元 山戸
悟 荒川
悟 荒川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Publication of JPWO2017057138A1 publication Critical patent/JPWO2017057138A1/ja
Application granted granted Critical
Publication of JP6217870B2 publication Critical patent/JP6217870B2/ja
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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2016575253A 2015-09-30 2016-09-21 構造体、配線基板および配線基板の製造方法 Active JP6217870B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015193744 2015-09-30
JP2015193744 2015-09-30
PCT/JP2016/077868 WO2017057138A1 (ja) 2015-09-30 2016-09-21 構造体、配線基板および配線基板の製造方法

Publications (2)

Publication Number Publication Date
JPWO2017057138A1 JPWO2017057138A1 (ja) 2017-10-05
JP6217870B2 true JP6217870B2 (ja) 2017-10-25

Family

ID=58423520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016575253A Active JP6217870B2 (ja) 2015-09-30 2016-09-21 構造体、配線基板および配線基板の製造方法

Country Status (3)

Country Link
JP (1) JP6217870B2 (zh)
TW (1) TW201726404A (zh)
WO (1) WO2017057138A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102645236B1 (ko) * 2017-12-14 2024-03-07 미츠비시 가스 가가쿠 가부시키가이샤 절연성 수지층이 형성된 동박

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278530A (ja) * 2005-03-28 2006-10-12 Sumitomo Bakelite Co Ltd ソルダーレジスト用熱硬化性樹脂組成物およびソルダーレジスト
CN100565848C (zh) * 2005-08-05 2009-12-02 株式会社村田制作所 电子组件制造方法和电子组件
JP5378106B2 (ja) * 2009-08-20 2013-12-25 日本シイエムケイ株式会社 プリント配線板の製造方法
US8528200B2 (en) * 2009-12-18 2013-09-10 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
JP5115645B2 (ja) * 2010-11-18 2013-01-09 住友ベークライト株式会社 絶縁性基板、金属張積層板、プリント配線板、及び半導体装置

Also Published As

Publication number Publication date
JPWO2017057138A1 (ja) 2017-10-05
WO2017057138A1 (ja) 2017-04-06
TW201726404A (zh) 2017-08-01

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