JP6002817B2 - 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子 - Google Patents

積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子 Download PDF

Info

Publication number
JP6002817B2
JP6002817B2 JP2015126213A JP2015126213A JP6002817B2 JP 6002817 B2 JP6002817 B2 JP 6002817B2 JP 2015126213 A JP2015126213 A JP 2015126213A JP 2015126213 A JP2015126213 A JP 2015126213A JP 6002817 B2 JP6002817 B2 JP 6002817B2
Authority
JP
Japan
Prior art keywords
conductive
electrode
insulating layer
convex portion
conductive convex
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2015126213A
Other languages
English (en)
Japanese (ja)
Other versions
JP2016027631A5 (enExample
JP2016027631A (ja
Inventor
周介 金澤
周介 金澤
近藤　浩史
浩史 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Idemitsu Kosan Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Idemitsu Kosan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd, Idemitsu Kosan Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP2015126213A priority Critical patent/JP6002817B2/ja
Publication of JP2016027631A publication Critical patent/JP2016027631A/ja
Publication of JP2016027631A5 publication Critical patent/JP2016027631A5/ja
Application granted granted Critical
Publication of JP6002817B2 publication Critical patent/JP6002817B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
JP2015126213A 2014-06-24 2015-06-24 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子 Expired - Fee Related JP6002817B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2015126213A JP6002817B2 (ja) 2014-06-24 2015-06-24 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014129635 2014-06-24
JP2014129635 2014-06-24
JP2015126213A JP6002817B2 (ja) 2014-06-24 2015-06-24 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子

Publications (3)

Publication Number Publication Date
JP2016027631A JP2016027631A (ja) 2016-02-18
JP2016027631A5 JP2016027631A5 (enExample) 2016-03-31
JP6002817B2 true JP6002817B2 (ja) 2016-10-05

Family

ID=54938199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015126213A Expired - Fee Related JP6002817B2 (ja) 2014-06-24 2015-06-24 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子

Country Status (3)

Country Link
JP (1) JP6002817B2 (enExample)
TW (1) TW201606894A (enExample)
WO (1) WO2015199120A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102191495B1 (ko) * 2019-08-27 2020-12-15 에스디코리아(주) 폴리실록산 계면활성제, 이의 제조 방법 그리고 폴리실록산 계면활성제를 포함하는 폴리우레탄 폼 조성물

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190068352A (ko) * 2017-12-08 2019-06-18 삼성에스디아이 주식회사 태양전지 셀

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010010609A1 (ja) * 2008-07-22 2010-01-28 パイオニア株式会社 コンタクトホールの形成方法、及び回路基板
JP2010257291A (ja) * 2009-04-27 2010-11-11 Seiko Epson Corp タッチパネルの製造方法及び表示装置製造方法並びに電子機器製造方法
JP2011044584A (ja) * 2009-08-21 2011-03-03 Seiko Epson Corp 回路基板の形成方法
JP5866783B2 (ja) * 2011-03-25 2016-02-17 セイコーエプソン株式会社 回路基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102191495B1 (ko) * 2019-08-27 2020-12-15 에스디코리아(주) 폴리실록산 계면활성제, 이의 제조 방법 그리고 폴리실록산 계면활성제를 포함하는 폴리우레탄 폼 조성물

Also Published As

Publication number Publication date
WO2015199120A1 (ja) 2015-12-30
TW201606894A (zh) 2016-02-16
JP2016027631A (ja) 2016-02-18

Similar Documents

Publication Publication Date Title
JP6491086B2 (ja) 導体組成物インク、積層配線部材、半導体素子および電子機器、並びに、積層配線部材の製造方法
US8097488B2 (en) Method for forming pattern, method for manufacturing semiconductor apparatus, and method for manufacturing display
JP6394096B2 (ja) 圧力センサ装置
JP6115008B2 (ja) 配線部材、および、電子素子の製造方法と、それを用いた配線部材、積層配線、電子素子、電子素子アレイ及び表示装置。
KR20100022110A (ko) 적층 구조체, 전자 소자, 및 표시 장치
KR20180017163A (ko) 플루오로폴리머 뱅크 구조들을 갖는 유기 전자 디바이스들
JP6002817B2 (ja) 積層配線部材の製造方法、半導体素子の製造方法、積層配線部材および半導体素子
JP6877345B2 (ja) 導体とその製造方法、及びそれを用いた積層回路及び積層配線部材
US10717889B2 (en) Conductor composition ink, conductor, laminate, laminated wiring board and electronic equipment
JP2015233044A (ja) 有機半導体素子の製造方法および有機半導体素子
JP2016103620A (ja) 積層配線部材、半導体素子およびこれらの製造方法、並びに電子機器
TW201539488A (zh) 功能性元件之製造方法及功能性元件
JP2017163085A (ja) 接合体の製造方法
JP5181586B2 (ja) 有機半導体素子、有機半導体素子の製造方法、有機トランジスタアレイ、およびディスプレイ
JP2017157835A (ja) 積層配線部材、積層配線部材の製造方法、半導体素子及び電子機器
JP2017199724A (ja) 積層体の製造方法
JP6435651B2 (ja) 有機半導体素子
JP2020177988A (ja) 薄膜トランジスタアレイ基板および電子装置用基板と薄膜トランジスタアレイ基板および電子装置用基板の製造方法
JP5811560B2 (ja) 回路基板の製造方法
JP2016018854A (ja) 有機半導体素子の製造方法
JP6612690B2 (ja) 積層配線部材、積層配線部材の製造方法、薄膜トランジスタ及び電子機器
JP2017117881A (ja) 積層体、その製造方法及び積層配線基板
JP2015213158A (ja) 配線基板の製造方法、配線基板および配線基板中間体
WO2020170925A1 (ja) 電界効果型トランジスタ、その製造方法およびそれを用いた無線通信装置
JP2009076792A (ja) 有機半導体素子、有機半導体素子の製造方法、有機トランジスタアレイ、およびディスプレイ

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160105

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160105

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20160105

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20160310

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160315

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160516

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20160809

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20160905

R150 Certificate of patent or registration of utility model

Ref document number: 6002817

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees