JP5980566B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP5980566B2 JP5980566B2 JP2012112990A JP2012112990A JP5980566B2 JP 5980566 B2 JP5980566 B2 JP 5980566B2 JP 2012112990 A JP2012112990 A JP 2012112990A JP 2012112990 A JP2012112990 A JP 2012112990A JP 5980566 B2 JP5980566 B2 JP 5980566B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- auxiliary member
- resin
- semiconductor device
- thermal expansion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012112990A JP5980566B2 (ja) | 2012-05-17 | 2012-05-17 | 半導体装置及びその製造方法 |
| KR1020130049749A KR101997548B1 (ko) | 2012-05-17 | 2013-05-03 | 반도체 장치 및 그 제조 방법 |
| US13/892,483 US9087781B2 (en) | 2012-05-17 | 2013-05-13 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012112990A JP5980566B2 (ja) | 2012-05-17 | 2012-05-17 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013239660A JP2013239660A (ja) | 2013-11-28 |
| JP2013239660A5 JP2013239660A5 (https=) | 2015-04-30 |
| JP5980566B2 true JP5980566B2 (ja) | 2016-08-31 |
Family
ID=49580690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012112990A Active JP5980566B2 (ja) | 2012-05-17 | 2012-05-17 | 半導体装置及びその製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9087781B2 (https=) |
| JP (1) | JP5980566B2 (https=) |
| KR (1) | KR101997548B1 (https=) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9559064B2 (en) | 2013-12-04 | 2017-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Warpage control in package-on-package structures |
| KR102250997B1 (ko) * | 2014-05-02 | 2021-05-12 | 삼성전자주식회사 | 반도체 패키지 |
| JP2016046469A (ja) * | 2014-08-26 | 2016-04-04 | 日東電工株式会社 | 半導体装置の製造方法及び封止用シート |
| CN106601629B (zh) * | 2015-10-15 | 2018-11-30 | 力成科技股份有限公司 | 保护片服贴于芯片感应面的芯片封装构造 |
| US10242927B2 (en) * | 2015-12-31 | 2019-03-26 | Mediatek Inc. | Semiconductor package, semiconductor device using the same and manufacturing method thereof |
| WO2018038134A1 (ja) * | 2016-08-23 | 2018-03-01 | 株式会社村田製作所 | 回路モジュール |
| US11264330B2 (en) | 2017-08-04 | 2022-03-01 | Nepes Co., Ltd. | Chip package with connection portion that passes through an encapsulation portion |
| KR102144933B1 (ko) * | 2017-08-04 | 2020-08-18 | 주식회사 네패스 | 칩 패키지 및 그 제조방법 |
| KR102790247B1 (ko) | 2020-06-25 | 2025-04-03 | 에스케이하이닉스 주식회사 | 보강층을 가진 반도체 패키지 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3057130B2 (ja) * | 1993-02-18 | 2000-06-26 | 三菱電機株式会社 | 樹脂封止型半導体パッケージおよびその製造方法 |
| MY112145A (en) * | 1994-07-11 | 2001-04-30 | Ibm | Direct attachment of heat sink attached directly to flip chip using flexible epoxy |
| US6104093A (en) * | 1997-04-24 | 2000-08-15 | International Business Machines Corporation | Thermally enhanced and mechanically balanced flip chip package and method of forming |
| JP3565319B2 (ja) | 1999-04-14 | 2004-09-15 | シャープ株式会社 | 半導体装置及びその製造方法 |
| JP3374812B2 (ja) * | 1999-11-10 | 2003-02-10 | 日本電気株式会社 | 半導体装置 |
| JP4390541B2 (ja) * | 2003-02-03 | 2009-12-24 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| JP2007149931A (ja) * | 2005-11-28 | 2007-06-14 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP4110189B2 (ja) * | 2006-12-13 | 2008-07-02 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体パッケージ |
| JP2009230619A (ja) * | 2008-03-25 | 2009-10-08 | Fujitsu Ltd | Icタグおよびその製造方法 |
| JP2011135749A (ja) * | 2009-12-25 | 2011-07-07 | Sony Corp | 電力供給装置、電力受電装置及び情報通知方法 |
| JP2012009655A (ja) | 2010-06-25 | 2012-01-12 | Shinko Electric Ind Co Ltd | 半導体パッケージおよび半導体パッケージの製造方法 |
| JP2012009713A (ja) * | 2010-06-25 | 2012-01-12 | Shinko Electric Ind Co Ltd | 半導体パッケージおよび半導体パッケージの製造方法 |
| KR101719636B1 (ko) | 2011-01-28 | 2017-04-05 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
-
2012
- 2012-05-17 JP JP2012112990A patent/JP5980566B2/ja active Active
-
2013
- 2013-05-03 KR KR1020130049749A patent/KR101997548B1/ko active Active
- 2013-05-13 US US13/892,483 patent/US9087781B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2013239660A (ja) | 2013-11-28 |
| KR101997548B1 (ko) | 2019-07-09 |
| KR20130129100A (ko) | 2013-11-27 |
| US9087781B2 (en) | 2015-07-21 |
| US20130307163A1 (en) | 2013-11-21 |
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