JP5895981B2 - 電子モジュール - Google Patents
電子モジュール Download PDFInfo
- Publication number
- JP5895981B2 JP5895981B2 JP2014150654A JP2014150654A JP5895981B2 JP 5895981 B2 JP5895981 B2 JP 5895981B2 JP 2014150654 A JP2014150654 A JP 2014150654A JP 2014150654 A JP2014150654 A JP 2014150654A JP 5895981 B2 JP5895981 B2 JP 5895981B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- electronic module
- composition system
- melting point
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
Claims (7)
- 第1の配線パターンと、
前記第1の配線パターンの面上に配置された電気/電子部品と、
前記電気/電子部品と前記第1の配線パターンとを電気的、機械的に接続する接続部材と、
前記電気/電子部品を埋設するように前記第1の配線パターンの前記電気/電子部品の接続された側の面上に積層され;前記電気/電子部品の前記第1の配線パターンに接続された側とは該電気/電子部品を介して反対の側の位置に、該電気/電子部品に対向して補強材を含有する絶縁層と、
前記絶縁層の前記第1の配線パターンが設けられた側の面上とは反対の側の面上に設けられた第2の配線パターンと、を具備し、
前記接続部材が、融点が260℃以上の複数元素系相により表面が覆われた第1の金属の粒子と、融点が190℃以上でかつ240℃以下の低融点金属とを含有し、前記複数元素系相が、前記低融点金属の一組成である、融点が240℃以下の第2の金属と前記第1の金属との組成系相であり;前記第1の金属の粒子の各表面の前記複数元素系相が互いに連接することにより導電性の骨格構造を形成し;該骨格構造の間隙を埋める樹脂部をさらに含有していること
を特徴とする電子モジュール。 - 前記絶縁層が、平面図位置として、前記電気/電子部品が埋め込まれた領域を除き該領域以外の領域に第2の補強材を含有することを特徴とする請求項1記載の電子モジュール。
- 前記絶縁層の前記補強材と前記第2の補強材との間に設けられた第3の配線パターンをさらに具備することを特徴とする請求項2記載の電子モジュール。
- 前記絶縁層の一部を貫通して前記第1の配線パターンの面と前記第3の配線パターンの面との間に挟設された、導電性組成物からなりかつ貫通方向に径が変化する柱状の層間接続体をさらに具備することを特徴とする請求項3記載の電子モジュール。
- 前記第1の配線パターンが、前記絶縁層の側に落ち込み位置していることを特徴とする請求項1記載の電子モジュール。
- 融点が190℃以上でかつ240℃以下の前記低融点金属が、Sn−Zn−Bi組成系、Sn−Ag−In組成系、Sn−Ag−Cu組成系、Sn−Ag組成系、Sn−Cu組成系、およびSn−Sb組成系、ならびにSnからなる群より選択された1種の組成系または金属であり、
前記接続部材が含有する前記第1の金属の粒子が、Ag、Au、Cu、Ni、およびFe、ならびにCu−Ni組成系、Cu−Sn組成系、Ag−Sn組成系、Cu−Zn組成系、およびCo−Sb組成系からなる群より選択された1種以上の金属または組成系の粒子であること
を特徴とする請求項1記載の電子モジュール。 - 前記接続部材の前記複数元素系相が、CuxSny、CoxSny 、Ag xSny、FexSny、AgxCuySnz、およびAuxSnyからなる群から選択された1種以上を含む相であることを特徴とする請求項1記載の電子モジュール。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014150654A JP5895981B2 (ja) | 2014-07-24 | 2014-07-24 | 電子モジュール |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014150654A JP5895981B2 (ja) | 2014-07-24 | 2014-07-24 | 電子モジュール |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009215588A Division JP5818296B2 (ja) | 2009-09-17 | 2009-09-17 | 電子モジュール、電子モジュールの製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2014232881A JP2014232881A (ja) | 2014-12-11 |
JP5895981B2 true JP5895981B2 (ja) | 2016-03-30 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2014150654A Expired - Fee Related JP5895981B2 (ja) | 2014-07-24 | 2014-07-24 | 電子モジュール |
Country Status (1)
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JP (1) | JP5895981B2 (ja) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4063271B2 (ja) * | 2004-11-30 | 2008-03-19 | 松下電器産業株式会社 | 半田ペーストおよび半田付け方法 |
JP4945974B2 (ja) * | 2005-09-09 | 2012-06-06 | 大日本印刷株式会社 | 部品内蔵配線板 |
JP5130661B2 (ja) * | 2006-06-07 | 2013-01-30 | 大日本印刷株式会社 | 部品内蔵配線板、部品内蔵配線板の製造方法。 |
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2014
- 2014-07-24 JP JP2014150654A patent/JP5895981B2/ja not_active Expired - Fee Related
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