JP5837697B2 - 太径ワイヤ又はストリップに接するための金属成形体を備えたパワー半導体チップ及びその製造方法 - Google Patents
太径ワイヤ又はストリップに接するための金属成形体を備えたパワー半導体チップ及びその製造方法 Download PDFInfo
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- JP5837697B2 JP5837697B2 JP2014533780A JP2014533780A JP5837697B2 JP 5837697 B2 JP5837697 B2 JP 5837697B2 JP 2014533780 A JP2014533780 A JP 2014533780A JP 2014533780 A JP2014533780 A JP 2014533780A JP 5837697 B2 JP5837697 B2 JP 5837697B2
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- power semiconductor
- semiconductor chip
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DE102011115887A DE102011115887A1 (de) | 2011-10-15 | 2011-10-15 | Leistungshalbleiterchip mit oberseitigen Potentialflächen |
DE102011115887.5 | 2011-10-15 | ||
PCT/EP2012/003787 WO2013053420A1 (fr) | 2011-10-15 | 2012-09-10 | Puce de semi-conducteur de puissance dotée de corps moulés métalliques pour la mise en contact électrique avec de gros fils ou des bandelettes, et procédé de production |
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EP (1) | EP2766922A1 (fr) |
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DE (1) | DE102011115887A1 (fr) |
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US11923270B2 (en) | 2020-09-24 | 2024-03-05 | Kabushiki Kaisha Toshiba | Semiconductor device |
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DE102011115886B4 (de) | 2011-10-15 | 2020-06-18 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer Verbindung eines Leistungshalbleiterchips mit oberseitigen Potentialflächen zu Dickdrähten |
DE102014221687B4 (de) * | 2014-10-24 | 2019-07-04 | Danfoss Silicon Power Gmbh | Leistungshalbleitermodul mit kurzschluss-ausfallmodus |
DE102014222818B4 (de) | 2014-11-07 | 2019-01-03 | Danfoss Silicon Power Gmbh | Elektronik-Sandwichstruktur mit zwei mittels einer Sinterschicht zusammengesinterten Fügepartnern |
DE102014222819B4 (de) | 2014-11-07 | 2019-01-03 | Danfoss Silicon Power Gmbh | Leistungshalbleiterkontaktstruktur mit Bondbuffer sowie Verfahren zu dessen Herstellung |
DE102015109856A1 (de) * | 2015-06-19 | 2016-12-22 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen einer für die Anbindung eines elektrischen Leiters geeigneten metallischen Kontaktfläche zur Kontaktierung eines Leistungshalbleiters, Leistungshalbleiter, Bond Buffer und Verfahren zur Herstellung eines Leistungshalbleiters |
DE102015113421B4 (de) | 2015-08-14 | 2019-02-21 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen von Halbleiterchips |
US9704832B1 (en) | 2016-02-29 | 2017-07-11 | Ixys Corporation | Die stack assembly using an edge separation structure for connectivity through a die of the stack |
DE102016108656A1 (de) * | 2016-05-11 | 2017-11-16 | Danfoss Silicon Power Gmbh | Leistungselektronische Baugruppe mit vibrationsfreier Kontaktierung |
EP3385983A1 (fr) * | 2017-04-04 | 2018-10-10 | Heraeus Deutschland GmbH & Co. KG | Système adaptateur destiné à agrandir la zone de contact d'au moins une surface de contact sur au moins un composant électronique et procédé d'agrandissement de zone de contact |
KR20210144677A (ko) | 2019-03-29 | 2021-11-30 | 미쓰이금속광업주식회사 | 접합 재료 및 접합 구조 |
DE102019132230B4 (de) * | 2019-11-28 | 2024-01-25 | Infineon Technologies Ag | Verfahren zur Herstellung einer Halbleitervorrichtung |
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DE102005047566C5 (de) * | 2005-10-05 | 2011-06-09 | Semikron Elektronik Gmbh & Co. Kg | Anordnung mit einem Leistungshalbleiterbauelement und mit einem Gehäuse sowie Herstellungsverfahren hierzu |
DE102005054872B4 (de) | 2005-11-15 | 2012-04-19 | Infineon Technologies Ag | Vertikales Leistungshalbleiterbauelement, Halbleiterbauteil und Verfahren zu deren Herstellung |
US8004075B2 (en) * | 2006-04-25 | 2011-08-23 | Hitachi, Ltd. | Semiconductor power module including epoxy resin coating |
JP5141076B2 (ja) | 2006-06-05 | 2013-02-13 | 株式会社デンソー | 半導体装置 |
JP4420001B2 (ja) * | 2006-09-11 | 2010-02-24 | 株式会社日立製作所 | パワー半導体モジュール |
JP5090088B2 (ja) * | 2007-07-05 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US9583413B2 (en) * | 2009-02-13 | 2017-02-28 | Infineon Technologies Ag | Semiconductor device |
DE102009045181B4 (de) | 2009-09-30 | 2020-07-09 | Infineon Technologies Ag | Leistungshalbleitermodul |
US8410600B2 (en) * | 2009-10-02 | 2013-04-02 | Arkansas Power Electronics International, Inc. | Semiconductor device with protecting film and method of fabricating the semiconductor device with protecting film |
DE102011115886B4 (de) | 2011-10-15 | 2020-06-18 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer Verbindung eines Leistungshalbleiterchips mit oberseitigen Potentialflächen zu Dickdrähten |
DE102014117246B4 (de) * | 2014-11-25 | 2018-11-15 | Heraeus Deutschland GmbH & Co. KG | Verfahren zum Herstellen eines Substratadapters, Substratadapter und Verfahren zum Kontaktieren eines Halbleiterelements |
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US11923270B2 (en) | 2020-09-24 | 2024-03-05 | Kabushiki Kaisha Toshiba | Semiconductor device |
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WO2013053420A1 (fr) | 2013-04-18 |
CN103890924A (zh) | 2014-06-25 |
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JP2014532308A (ja) | 2014-12-04 |
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