CN103890924A - 具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法 - Google Patents

具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法 Download PDF

Info

Publication number
CN103890924A
CN103890924A CN201280050678.XA CN201280050678A CN103890924A CN 103890924 A CN103890924 A CN 103890924A CN 201280050678 A CN201280050678 A CN 201280050678A CN 103890924 A CN103890924 A CN 103890924A
Authority
CN
China
Prior art keywords
formed body
semiconductor chip
power semiconductor
upside
potential surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201280050678.XA
Other languages
English (en)
Other versions
CN103890924B (zh
Inventor
马丁·贝克尔
罗纳德·艾西尔
弗兰克·奥斯特瓦尔德
杰克·鲁兹基
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danfoss Silicon Power GmbH
Original Assignee
Danfoss Silicon Power GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power GmbH filed Critical Danfoss Silicon Power GmbH
Publication of CN103890924A publication Critical patent/CN103890924A/zh
Application granted granted Critical
Publication of CN103890924B publication Critical patent/CN103890924B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • A—HUMAN NECESSITIES
    • A41—WEARING APPAREL
    • A41F—GARMENT FASTENINGS; SUSPENDERS
    • A41F1/00—Fastening devices specially adapted for garments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • A—HUMAN NECESSITIES
    • A41—WEARING APPAREL
    • A41F—GARMENT FASTENINGS; SUSPENDERS
    • A41F15/00—Shoulder or like straps
    • A41F15/02—Means for retaining the straps in position
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68372—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support a device or wafer when forming electrical connections thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/03011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/03013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the bonding area, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/031—Manufacture and pre-treatment of the bonding area preform
    • H01L2224/0311—Shaping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0343—Manufacturing methods by blanket deposition of the material of the bonding area in solid form
    • H01L2224/03436—Lamination of a preform, e.g. foil, sheet or layer
    • H01L2224/03438—Lamination of a preform, e.g. foil, sheet or layer the preform being at least partly pre-patterned
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05541—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05551—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05639—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0605—Shape
    • H01L2224/06051—Bonding areas having different shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4801—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48817—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48824—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48839—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48844—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48847—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H01L2224/49176—Wire connectors having the same loop shape and height
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/786—Means for supplying the connector to be connected in the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/8382—Diffusion bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10162—Shape being a cuboid with a square active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Textile Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

本发明涉及功率半导体芯片（10），其具有至少一个上侧电势面且接触厚布线（50）或条片，该功率半导体芯片包括：处于所述电势面上的结合层（1），以及处于所述结合层上的至少一个金属成型体（24、25），所述成型体的面对电势面的下方平坦侧基于结合工艺设有涂覆物以被涂覆至结合层（1），并且根据尺寸选择所述成型体的材料成分以及根据本方法用于接触的、布置在成型体上侧的相关厚布线（50）或条片的厚度。

Description

具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法
技术领域
本发明涉及具有至少一个上侧电势面的功率半导体芯片。功率模块通常包括例如二极管等多个半导体，负载电流横向流经其中一些半导体到芯片表面。
背景技术
为了开发使用寿命长并且耐用的功率模块，特别地，半导体的上部（上侧）连接和下部（下侧）连接有很高的热要求和电要求。通常，半导体的下侧通过焊接连接、或者还部分地通过烧结或扩散焊接连接。
通常，半导体的上侧具有最适于厚铝布线的粘结处理的金属喷镀或金属层。尽管半导体的上侧和下侧有极易变形的金属喷镀层，但为降低电损耗，半导体仍然越来越薄。当今，市面上的功率半导体总厚度为70μm。研究机构已经提出厚度仅为10μm的极薄的第一晶片。
现有技术的缺点
芯片的上侧连接对功率模块的寿命期限影响极大。芯片下侧的很稳定的烧结连接只能略微延长模块的寿命，而半导体上侧的铝布线连接不好则会成为致命因素。
许多年来，铝粘结已成为功率电子器件生产线中的确定技术。粘结处理的持续优化会使这种连接的预期寿命得以延长。然而，这样的高水准已接近铝焊接连接的应力的物理极限，因而预期寿命的大幅提高只能通过设计和粘结技术方面的新理念来实现。现在有关半导体下侧的烧结技术（相比于焊接技术）已经促成预期使用寿命的两位数增长，这也印证了上述观点。
而且，在工艺过程中，处理70μm薄的半导体会有许多困难（而对于更薄的半导体，这些困难会更大）。因而，对于加工和测试过程的参数化，以及对于想法的构成，极薄的硅层是加工过程中越来越大的利益风险。不但热机械应力会导致断裂的风险，加工过程中的轻负载也会导致断裂的风险（例如，晶圆级高电流测试时触针的安装）。
发明内容
现本发明的目的是：通过改善上侧电势面上的触点，增加功率模块的寿命，特别是增加功率半导体芯片的寿命。同时，利用更稳定并且断裂风险更低的设计将会提高收益。
对现有技术的改进
根据本发明，通过独立权利要求的技术方案可以实现该目的。从属权利要求参考优选实施例。为了实现该新技术对上侧连接的改变，下面先说明功率模块的设计所需要的改变。
这些改变使得与厚的铜布线粘结技术相关的上侧得以改变，并且对负载循环耐用性方面也有显著提高。而且，这些改变也降低了由半导体的热机械应力和加工过程的机械应力所致的断裂而带来的风险。
上述内容是这样实现的，通过将金属层或成型体布置在至少半导体上方，优选也布置在半导体下方，因而半导体以对称的方式热机械应变。
而且，这些薄层或成型体形成表面的机械保护，特别是遍及电势面，例如针对摩擦接触测试过程（晶圆级高电流测试）。这实现了在完成半导体的上侧连接之前进行半导体的安全的电学测试。对于电学测试，粘结到半导体的金属层的表面被专用的弹簧工具接触，不会有损坏半导体的精细表面结构的风险。
附图说明
参照附图，根据下面优选实施例的说明，可看出本发明进一步的优点和特点，在附图中：
图1是根据本发明的通过上侧进行连接的功率半导体芯片的示意性立体图以及细节的图；
图2是保持在载体层上的成型体的俯视图；
图3是沿图2中a-a线所得截面的示意图。
具体实施方式
根据本发明的具有上侧电势面的功率半导体芯片10，优选包括至少一个覆盖电势面的导电的成型体24、25。在图2中，成型体24图示为环形层，其环绕另一个成型体25。多个电势面可被布置在该层下以与该层结合，例如在拐角区域的四个面，或者两个相对布置的面，如剖面图所示。也不排除功率半导体芯片10的电势面近似环形层的情形。
功率半导体芯片10在上侧具有电势面，成型体固定于电势面上，优选以导电性、导热性好的方式（利用例如Cu、Ag、Au、Al、Mo、W及其合金）。成型体的厚度约为30μm～300μm。对于在约30μm范围内的薄半导体，适用30μm～40μm的成型体，而对于150μm至200μm的厚一点的半导体芯片，适用100μm～150μm的稍厚点的成型体。
这样的成型体通过低温烧结技术（或扩散焊接或胶合）中的结合层1固定于半导体的金属喷镀层10b上。在该连接中，成型体不遍及功率半导体芯片10的整个尺寸。
可选地，在优选实施例中，可将另外的成型体30固定于功率半导体芯片10的底侧。成型体30的层厚度与功率半导体芯片10上侧的成型体24、25的层厚度相同。底侧的成型体30和功率半导体芯片10之间的结合2与芯片和上侧的成型体24、25之间的结合技术相同。
在该连接中，表面上具有多个不同电势面的功率半导体芯片能够容纳与多个不同电势对应的多个成型体24、25。半导体的各电势面（例如发射极或栅极）经连接与成型体的底侧电结合。
然而，如果半导体在多个表面上呈现一个电势（例如被栅极梳分开的发射极表面），那么也可选择提供相应数目的单独的成型体。
由于成型体也可以部分地形成单独的岛形区域25（变形1和2），所以优选使用能够确保在组装过程中小板块结合的承载材料20a。
这样的承载材料为耐高温的合成材料，例如聚酰胺或聚酰亚胺，它们耐高温，而且是能防止电流在各电势面24、25间流动的绝缘体。电势面上的各成型体24、25例如由薄铜片（30μm～300μm）构成，薄铜片在面对芯片的一侧被氧化抑制保护层23（Ag或Au）覆盖。承载材料20a和成型体24、25形成共有的承载箔，具有结构化的导电面，即例如，如图2所示，通过蚀刻得到的环形导电面。
上侧承载箔20a也可包括同时覆盖电势相同的上侧电势面的多个成型体面，或者多个成型体，这些成型体反映半导体的电接触面11、12并且以精确的安装方式被稳固地烧结到这些面上。
在电学上，这些成型体优选通过各成型体24、25上侧的布线、条片、线束、布带或纤维带50形式的金属导体连接。在该连接中，优选的实施例为粗的铜布线结合（例如达到600μm直径）。
在图3中，可以看出金属成型体24、25在芯片电势面11、12、13上方是如何布置的。同样在芯片10的下面，成型体的面对芯片且具有承载箔的一侧也可与半导体底侧的整个表面结合。对于该结合，小板块的上表面可包括氧化抑制层。利用烧结或扩散焊接技术，最终可实现与半导体底侧的金属喷镀层10c的材料结合。
在半导体的底侧，成型体可另外具有这样的层厚度，该厚度使得与芯片上侧的成型体一起能产生平衡的机械应力。这意味着，底侧的板和上侧的成型体的加入仅会给半导体带来很小的形变。
优选的方法为使这两层厚度相同且材料相同。这就是，或者完全是铜，覆盖直到边缘的整个表面，或者，从图2可见，大的带框的环绕延伸的铜岛形区域，很窄（稍有100μm）的聚酰胺薄片。
然而，对于具有特定热膨胀系数和弹性模数的某种材料，也可以通过布置具有其它属性的不同材料来平衡其膨胀特性。例如，上侧为相对较厚的铜层，则可通过底侧的薄的钼层来平衡。
底侧成型体与基板表面之间的结合3（图1）技术（烧结、扩散焊接、胶合）对应于之前提到的与其它结合层的连接时所使用的。
通过各种结合，上侧的接触箔可接触到未分割的晶片组件的所有半导体元件。于是，实现了接触箔的所有导电面与半导体的电势面的极小公差重叠。成本划算的方法是与半导体元件的排列的组件和单个接触箔有关的。在利用低温烧结、焊接或胶合技术将晶片接触箔与半导体晶片结合之后，可通过例如切割进行常规的分离。
在晶片结合中，对于半导体元件底侧的晶片接触箔，可采用类似的工艺。于是，在上侧和底侧的箔接触之后，可利用例如切割等常规分离方法得到具有双侧涂覆的各半导体元件。
使用具有至少一个上侧电势面的功率半导体芯片，连接厚布线或条片，电势面上具有结合层，至少一个金属成型体处于结合层上，所述成型体的面对电势面的下平坦侧被涂覆成适于结合层的结合工艺，所述成型体的材料成分和厚度是根据成型体上侧的连接过程中所用的厚布线或条片的尺寸进行选择的，上述内容具有以下优点：
成型体实现了通过厚的铜布线和铜条片的上侧连接，同样也可与薄半导体元件连接。
成型体在厚的铜布线粘合过程中保护半导体（通常只有约3～4μm）的易损坏的薄金属喷镀表面。
成型体确保在芯片表面的整个截面上电流密度分布的改进。
成型体在利用弹簧触点的摩擦接触过程中保护半导体的易损坏表面结构。这简化了生产线上非破坏性电学品质测试。
利用机械应力的对称，底侧的箔和成型体层防止了凹陷效应（dishingeffect）（半导体元件的形变）。
上侧和底侧的承载箔承载能覆盖整个晶片的成型体区域，于是以经济且精密的方式通过成型体实现所有接触面的平行。
图1示出了根据本发明的功率半导体芯片10，上侧电势面11、12、13（参见图3）经结合层1通过仅两个成型体24、25电连接且物质连接。电势面11和13具有相同的电势，因而可通过共同的导电体连接，如图2所示，通过成型体24的环形导电面电连接，大致符合中央凹槽。对于图2所示的实施例，在成型体的整个上侧延伸部分下面，其它的表面也可以被连接。在涂覆结合层1之后，接着成型体24也结合于此。
分开的成型体25设于电势不同的电势面12上，例如栅极上。成型体24、25都保持在接触箔20a上，接触箔20a在其底侧的在成型体24、25的区域中具有通道。
成型体24、25由导电性和导热性好的金属制成，例如，成型体24、25的材料是Cu、Ag、Au、Al、Mo、W中的一种，或者是包括前述一种以上金属的合金。
成型体24、25的厚度为15μm～500μm，优选为30μm～300μm。更优选为75μm～150μm。对于薄的半导体（在30μm范围内），适用30μm～40μm的成型体，而对于150μm至200μm的厚一点的半导体芯片，适用100μm～150μm的成型体。在厚的布线结合的情况下，对于成型体而言，具有布线直径的四分之一的厚度即足以满足稳定功能。因此，建议成型体的厚度为布线直径的四分之一至二分之一。
如同上侧部分，另外的成型体30设于功率半导体芯片10的底侧（相对于上侧成型体24、25），该成型体30也通过低温烧结技术、扩散焊接或者胶合安装到功率半导体芯片10上。
对应于上侧的电势不同的电势面11、13、12的数目，可使用相同数目或更多数目的成型体24、25。在理想情况下，将一个成型体用于电势相同的所有电势面，或者，局部一致、小部分的电势面通过一个共同的成型体24、25接触和连接。
最简单的变形例是每个电势面使用一个成型体，而成型体的尺寸严格符合电势面的尺寸。优选地，在各成型体24、25下面进行的连接所具有的投影面比成型体24、25小，于是成型体的边缘仍固定于有机非导电承载箔20a上，而且在精确的安装之后可被固定于功率半导体芯片10上。
在该连接中，承载箔20a可以粘合剂的方式覆盖芯片表面的非结合区域。但是，不应在芯片的外部边缘上延伸。图3示出了这样的情形，即烧结材料的结合层1的尺寸略小于成型体和电势面的尺寸，而且承载箔20a还在电势面的边缘区域上延伸。这样在结合过程中可保护边缘区域。另一个变形例是，保留一些电势面（例如控制连接）没有直接接触这些连接的成型体。
最后，对于上侧成型体24、25的热膨胀特性，可通过在功率半导体芯片10的底侧选择不同材料或者不同厚度的另外的成型体30进行平衡，以实现最终总的膨胀较小。在该连接中，成型体不应达到功率半导体芯片的边缘。这将会需要昂贵的绝缘。
提出一种将成型体涂覆在功率半导体芯片上的方法：在结合过程中使用能够耐住热负载的电绝缘的承载片20a，且包括多个成型体24、25。然后，在连接之前，将这些承载片20a和成型体24、25同时涂覆到功率半导体芯片上，意味着，多个成型体24、25也可用于多个功率半导体芯片10的上侧的小公差重叠，在下侧，具有另外的承载片或者导电箔。
附图标记
1：结合层（低温结合或扩散焊接）
2：结合层（低温结合或扩散焊接）
3：结合层（低温结合或扩散焊接）
10：芯片
10a：硅
10b：上侧芯片金属喷镀
10c：下侧芯片金属喷镀
24、25：半导体上侧的成型体（具有多个导电面的接触箔）
20a：承载箔，例如聚酰胺
20b：成型体和承载箔之间的粘合剂
20c：承载箔和上芯片侧之间的粘合剂
23：导电铜面的下侧氧化抑制层
24：第一导电铜面（例如发射极）
25：第二导电铜面（例如栅极）
30：半导体下面的成型体
30a：聚酰胺
30b：粘合剂
30c：粘合剂
34a：薄铜片的铜岛形区域
34b：铜片
36：铜岛形区域/铜片的下侧氧化抑制层
37：铜岛形区域/铜片的上侧氧化抑制层
50：铜布线
60：基板表面

Claims (8)

1.一种功率半导体芯片（10），具有至少一个上侧电势面且连接厚布线（50）或条片，其特征在于包括：
处于所述电势面上的结合层（1），以及
处于所述结合层上的至少一个金属成型体（24、25），所述金属成型体的面对电势面的下方平坦侧被涂覆成适于结合层（1）的结合工艺，并且所述金属成型体的材料成分和厚度是根据成型体上侧的连接过程中所用的厚布线（50）或条片的尺寸进行选择的。
2.根据权利要求1所述的功率半导体芯片，其特征在于，在下方平坦侧被银或者镍/金覆盖的成型体（24、25）包括由Cu、Ag、Au、Al、Mo、W构成的组中的材料或它们的合金，所述合金包括前述组中的一种或多种金属。
3.根据上述权利要求中任一项所述的功率半导体芯片，其特征在于，在各成型体（24、25）下面用于结合的表面所具有的投影面比成型体（24、25）小，使得成型体（24、25）的边缘固定于有机非导电承载箔（20a）上。
4.根据上述权利要求中任一项所述的功率半导体芯片，其特征在于，所述承载箔（20a）粘附地覆盖所述芯片表面的未结合的区域。
5.根据上述权利要求中任一项所述的功率半导体芯片，其特征在于，所述承载箔（20a）不在所述芯片的外边缘上延伸。
6.根据上述权利要求中任一项所述的功率半导体芯片，其特征在于，除了上侧成型体（24、25），另外的成型体（30）设于功率半导体芯片（10）的底侧，利用低温烧结、扩散焊接或胶合，所述另外的成型体（30）通过用于结合的结合层被安装。
7.根据上述权利要求中任一项所述的功率半导体芯片，其特征在于，设有多个成型体（24、25），其数目对应于电势不同的所述上侧电势面的数目。
8.一种将成型体安装到功率半导体芯片上的方法，其特征在于，能够耐住结合的热负载的电绝缘承载箔（20a）用于成型体（24、25），使其被布置在未切割的晶片组件上以转移到所有成型体（24、25）的上侧电势面。
CN201280050678.XA 2011-10-15 2012-09-10 具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法 Active CN103890924B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102011115887A DE102011115887A1 (de) 2011-10-15 2011-10-15 Leistungshalbleiterchip mit oberseitigen Potentialflächen
DE102011115887.5 2011-10-15
PCT/EP2012/003787 WO2013053420A1 (de) 2011-10-15 2012-09-10 Leistungshalbleiterchip mit metallischen formkörpern zum kontaktieren mit dickdrähten oder bändchen sowie verfahren zu dessen herstellung

Publications (2)

Publication Number Publication Date
CN103890924A true CN103890924A (zh) 2014-06-25
CN103890924B CN103890924B (zh) 2017-02-15

Family

ID=47010475

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201280050678.XA Active CN103890924B (zh) 2011-10-15 2012-09-10 具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法

Country Status (6)

Country Link
US (2) US9318421B2 (zh)
EP (1) EP2766922A1 (zh)
JP (1) JP5837697B2 (zh)
CN (1) CN103890924B (zh)
DE (1) DE102011115887A1 (zh)
WO (1) WO2013053420A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011115886B4 (de) 2011-10-15 2020-06-18 Danfoss Silicon Power Gmbh Verfahren zur Schaffung einer Verbindung eines Leistungshalbleiterchips mit oberseitigen Potentialflächen zu Dickdrähten
DE102014221687B4 (de) * 2014-10-24 2019-07-04 Danfoss Silicon Power Gmbh Leistungshalbleitermodul mit kurzschluss-ausfallmodus
DE102014222818B4 (de) 2014-11-07 2019-01-03 Danfoss Silicon Power Gmbh Elektronik-Sandwichstruktur mit zwei mittels einer Sinterschicht zusammengesinterten Fügepartnern
DE102014222819B4 (de) 2014-11-07 2019-01-03 Danfoss Silicon Power Gmbh Leistungshalbleiterkontaktstruktur mit Bondbuffer sowie Verfahren zu dessen Herstellung
DE102015109856A1 (de) * 2015-06-19 2016-12-22 Danfoss Silicon Power Gmbh Verfahren zum Herstellen einer für die Anbindung eines elektrischen Leiters geeigneten metallischen Kontaktfläche zur Kontaktierung eines Leistungshalbleiters, Leistungshalbleiter, Bond Buffer und Verfahren zur Herstellung eines Leistungshalbleiters
DE102015113421B4 (de) 2015-08-14 2019-02-21 Danfoss Silicon Power Gmbh Verfahren zum Herstellen von Halbleiterchips
US9704832B1 (en) 2016-02-29 2017-07-11 Ixys Corporation Die stack assembly using an edge separation structure for connectivity through a die of the stack
DE102016108656A1 (de) * 2016-05-11 2017-11-16 Danfoss Silicon Power Gmbh Leistungselektronische Baugruppe mit vibrationsfreier Kontaktierung
SG11202109544SA (en) 2019-03-29 2021-10-28 Mitsui Mining & Smelting Co Bonding material and bonded structure
DE102019132230B4 (de) 2019-11-28 2024-01-25 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleitervorrichtung
JP7404208B2 (ja) 2020-09-24 2023-12-25 株式会社東芝 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1772900A2 (de) * 2005-10-05 2007-04-11 Semikron Elektronik GmbH & Co. KG Patentabteilung Anordnung mit mindestens einem Leistungshalbleiterbauelement und Herstellungsverfahren eines Leistungshalbleiterbauelements, welches einen Schritt Drucksintern beinhaltet
US20070246833A1 (en) * 2006-04-25 2007-10-25 Tasao Soga Semiconductor power module
US20070278550A1 (en) * 2006-06-05 2007-12-06 Denso Corporation Semiconductor device and method for manufacturing the same
CN101339934B (zh) * 2007-07-05 2011-04-27 瑞萨电子株式会社 具有焊接引线的半导体器件及其制造方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56101752A (en) * 1980-01-18 1981-08-14 Mitsubishi Electric Corp Semiconductor device
JPS61134035A (ja) * 1984-12-04 1986-06-21 Nec Corp 半導体装置
EP0520294B1 (de) * 1991-06-24 1998-08-26 Siemens Aktiengesellschaft Halbleiterbauelement und Verfahren zu seiner Herstellung
US5414299A (en) * 1993-09-24 1995-05-09 Vlsi Technology, Inc. Semi-conductor device interconnect package assembly for improved package performance
US5510650A (en) * 1994-09-02 1996-04-23 General Motors Corporation Low mechanical stress, high electrical and thermal conductance semiconductor die mount
JPH08288424A (ja) * 1995-04-18 1996-11-01 Nec Corp 半導体装置
JP3387282B2 (ja) 1995-08-03 2003-03-17 日産自動車株式会社 半導体装置の構造及びその製造方法
DE19612838A1 (de) * 1995-11-13 1997-05-15 Asea Brown Boveri Leistungshalbleiterbauelement sowie Verfahren zu dessen Herstellung
US6054337A (en) * 1996-12-13 2000-04-25 Tessera, Inc. Method of making a compliant multichip package
KR100632137B1 (ko) * 1997-07-19 2006-10-19 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 반도체 디바이스 어셈블리, 하프 브리지 구동 회로, 솔레노이드 구동 회로, 풀 브리지 구동 회로 및 전압 레벨 변환기 회로
JPH11251506A (ja) * 1998-02-27 1999-09-17 Hitachi Ltd 半導体装置およびその製造方法
US6100112A (en) * 1998-05-28 2000-08-08 The Furukawa Electric Co., Ltd. Method of manufacturing a tape carrier with bump
JP2001274528A (ja) 2000-01-21 2001-10-05 Fujitsu Ltd 薄膜デバイスの基板間転写方法
JP2003229527A (ja) * 2002-02-05 2003-08-15 Toyota Motor Corp 実装用電極板付パワー素子デバイス、実装用電極板付ｉｇｂｔ、パワー素子モジュール、パワー素子ウェーハ、実装用電極板付パワー素子デバイスの製造方法、およびパワー素子モジュールの製造方法
JP2003258178A (ja) * 2002-02-27 2003-09-12 Sanyo Electric Co Ltd 半導体装置
JP2004256788A (ja) 2002-11-29 2004-09-16 Sekisui Chem Co Ltd 加熱消滅性材料
US7315081B2 (en) * 2003-10-24 2008-01-01 International Rectifier Corporation Semiconductor device package utilizing proud interconnect material
DE102004036905A1 (de) 2004-07-29 2006-03-23 Infineon Technologies Ag Vertikales Leistungshalbleiterbauteil mit einem Halbleiterchip und Verfahren zur Herstellung desselben
US7755179B2 (en) * 2004-12-20 2010-07-13 Semiconductor Components Industries, Llc Semiconductor package structure having enhanced thermal dissipation characteristics
DE102005034485B4 (de) * 2005-07-20 2013-08-29 Infineon Technologies Ag Verbindungselement für ein Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterleistungsbauelements
DE102005054872B4 (de) 2005-11-15 2012-04-19 Infineon Technologies Ag Vertikales Leistungshalbleiterbauelement, Halbleiterbauteil und Verfahren zu deren Herstellung
JP4420001B2 (ja) * 2006-09-11 2010-02-24 株式会社日立製作所 パワー半導体モジュール
US9583413B2 (en) * 2009-02-13 2017-02-28 Infineon Technologies Ag Semiconductor device
DE102009045181B4 (de) 2009-09-30 2020-07-09 Infineon Technologies Ag Leistungshalbleitermodul
US8410600B2 (en) * 2009-10-02 2013-04-02 Arkansas Power Electronics International, Inc. Semiconductor device with protecting film and method of fabricating the semiconductor device with protecting film
DE102011115886B4 (de) 2011-10-15 2020-06-18 Danfoss Silicon Power Gmbh Verfahren zur Schaffung einer Verbindung eines Leistungshalbleiterchips mit oberseitigen Potentialflächen zu Dickdrähten

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1772900A2 (de) * 2005-10-05 2007-04-11 Semikron Elektronik GmbH & Co. KG Patentabteilung Anordnung mit mindestens einem Leistungshalbleiterbauelement und Herstellungsverfahren eines Leistungshalbleiterbauelements, welches einen Schritt Drucksintern beinhaltet
US20070246833A1 (en) * 2006-04-25 2007-10-25 Tasao Soga Semiconductor power module
US20070278550A1 (en) * 2006-06-05 2007-12-06 Denso Corporation Semiconductor device and method for manufacturing the same
CN101339934B (zh) * 2007-07-05 2011-04-27 瑞萨电子株式会社 具有焊接引线的半导体器件及其制造方法

Also Published As

Publication number Publication date
EP2766922A1 (de) 2014-08-20
DE102011115887A1 (de) 2013-04-18
US20140225247A1 (en) 2014-08-14
US9318421B2 (en) 2016-04-19
JP2014532308A (ja) 2014-12-04
WO2013053420A1 (de) 2013-04-18
US9613929B2 (en) 2017-04-04
JP5837697B2 (ja) 2015-12-24
US20160225738A1 (en) 2016-08-04
CN103890924B (zh) 2017-02-15

Similar Documents

Publication Publication Date Title
CN103890924A (zh) 具有用于接触厚布线或条片的金属成型体的功率半导体芯片及其制造方法
US9118126B2 (en) Power semiconductor package with conductive clip
US8593817B2 (en) Power semiconductor module and method for operating a power semiconductor module
CN103875067A (zh) 在金属成型体和结合到厚布线或条片用的功率半导体间形成连接的方法
JP2010525558A5 (zh)
CN101373761A (zh) 多芯片模块封装件
CN105448860B (zh) 半导体装置
US20080054418A1 (en) Chip carrier with signal collection tape and fabrication method thereof
CN111083937B (zh) 热电模块
US9224666B2 (en) Circuit arrangement for a thermally conductive chip assembly and a manufacturing method
CN102782875B (zh) 太阳能电池组件ii
US6621166B2 (en) Five layer adhesive/insulator/metal/insulator/adhesive tape for semiconductor die packaging
CN213366295U (zh) 双余度铂薄膜热敏电阻器
CN105762270B (zh) 热电发生器和装配热电发生器的方法
CN218887179U (zh) 芯片封装结构
US20120298202A1 (en) Solar cell assembly i
CN218677137U (zh) 芯片封装结构
KR102469313B1 (ko) 발열체 및 그 제조 방법
JP7026688B2 (ja) 半導体チップを接続する第１および第２接続要素を備えた半導体モジュールおよび製造方法
TW200511526A (en) Chip structure
CN116153870A (zh) 一种堆叠封装结构及其制造方法
CN203150538U (zh) 半导体封装构造
JP2005327755A (ja) 半導体装置及びその製造方法
CN202513146U (zh) 半导体芯片封装结构
CN116666336A (zh) 功率器件的封装结构及封装方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant