JP7026688B2 - 半導体チップを接続する第1および第2接続要素を備えた半導体モジュールおよび製造方法 - Google Patents
半導体チップを接続する第1および第2接続要素を備えた半導体モジュールおよび製造方法 Download PDFInfo
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- JP7026688B2 JP7026688B2 JP2019535345A JP2019535345A JP7026688B2 JP 7026688 B2 JP7026688 B2 JP 7026688B2 JP 2019535345 A JP2019535345 A JP 2019535345A JP 2019535345 A JP2019535345 A JP 2019535345A JP 7026688 B2 JP7026688 B2 JP 7026688B2
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- Wire Bonding (AREA)
Description
米国特許出願公開第2007/040252号明細書)には、半導体パワーチップを有する半導体パワーチップコンポーネントが開示されており、半導体パワーチップは、その上面に少なくとも1つの面積の大きな電極と、その背面に面積の大きな電極とを有する。上面の電極は、接続要素を介して平面導体フレームの内部平面導体に電気的に接続されている。接続要素は、上面の電極から内部平面導体に延在するボンディングストライプを有する。ボンディングストライプの上面には、付加的に、上面の電極から内部平面導体に至るボンディングワイヤが配置されている。
独国実用新案第9109295号明細書には、上面にコンタクト面を有するチップ構成要素を備えた電子回路装置が記載されている。コンタクト面は、導電性の接続要素によって、支持体の対応する接続面に、かつ/または別のチップ構成要素の対応するコンタクト面に導電的に接続されている。接続要素は、絶縁層に接着され、構造化された金属層によって形成可能である。
さらに独国特許出願公開第102008045338号明細書には、支持体と、支持体に被着された半導体チップとを有する半導体デバイスが記載されている。さらに半導体構成要素には、半導体チップおよび支持体にデポジットされた、第1の厚さを有する第1線路と、半導体チップおよび支持体にデポジットされた、第2の厚さを有する第2線路とが含まれており、第1の厚さは、第2の厚さよりも小さい。
好ましくは、第2接続要素は、半導体チップとは反対側の、第1接続要素の面に配置されている。すなわち、ワイヤは、第1接続要素の上方の並列な電流路として被着される。これにより、ボンディングワイヤの温度変動がより小さくなる。さらにワイヤは、第1接続要素に電気的に接続される。これにより、ワイヤのより良好な接触接続を実現することができる。第1接続要素なしにただ1つのワイヤが使用される場合、ワイヤは、一般に半導体チップに直接、接続される。この際に生じる比較的小さなコンタクト面により、損傷が発生することがある。したがって頑強な電気的な接続を形成することができる。
Claims (6)
- 基板(2)と、前記基板(2)に配置されている半導体チップ(6)と、前記半導体チップ(6)を半導体モジュール(1)の別の半導体チップに電気的に接続する第1接続要素(12)とを備えた半導体モジュール(1)であって、
前記第1接続要素(12)が、少なくとも一部の領域において、前記半導体チップ(6)と、前記基板(2)と、前記別の半導体チップとに平面的に接触しており、
前記第1接続要素(12)は、電気絶縁性のシートと、前記シートに被着された金属層とを有する、半導体モジュール(1)において、
前記半導体モジュール(1)は、前記半導体チップ(6)と、前記別の半導体チップとを電気的に接続する、ワイヤとして構成されている第2接続要素(13)を有し、
前記第2接続要素(13)は、前記半導体チップ(6)とは反対側の、前記第1接続要素(12)の面(14)に配置され、
前記第2接続要素(13)は、少なくとも一部の領域において、あらかじめ設定された湾曲部を有し、該領域は、前記半導体チップ(6)上に配置された前記第1接続要素(12)の部分と前記第2接続要素(13)との複数の電気的接続部の間の領域を含み、
前記第1接続要素(12)は、フレキシブルな、導電性のプレートで構成され、
前記半導体モジュール(1)は、制御回路を有し、前記制御回路は、前記第1接続要素(12)だけを電気的な接続に使用する、
ことを特徴とする、半導体モジュール(1)。 - 前記半導体モジュール(6)は、前記半導体チップ(6)と、前記第1接続要素(12)との間に配置されている少なくとも1つの絶縁要素(11)を有する、ことを特徴とする、請求項1記載の半導体モジュール(1)。
- 前記半導体モジュール(1)は、前記半導体チップ(6)とは反対側の、前記基板(2)の面(4)において、前記基板(2)に接続されている底部プレート(3)を有する、ことを特徴とする、請求項1または2記載の半導体モジュール(1)。
- 半導体モジュール(1)を製造する方法であって、基板(2)を形成し、前記基板(2)に半導体チップ(6)を配置し、前記半導体チップ(6)と、前記半導体モジュール(1)の別の半導体チップとを電気的に接続する第1接続要素(12)を形成し、これにより、前記第1接続要素(12)が、少なくとも一部の領域において、前記半導体チップ(6)と、前記基板(2)と、前記別の半導体チップとに平面的に接触するようにし、
前記第1接続要素(12)を形成するために、電気絶縁性のシートに金属層を被着する、半導体モジュール(1)を製造する方法において、
前記半導体チップ(6)と、前記別の半導体チップとを電気的に接続する、ワイヤとして構成された第2接続要素(13)を形成し、
前記第2接続要素(13)は、前記半導体チップ(6)とは反対側の、前記第1接続要素(12)の面(14)に配置され、
前記第2接続要素(13)は、少なくとも一部の領域において、あらかじめ設定された湾曲部を有し、該領域は、前記半導体チップ(6)上に配置された前記第1接続要素(12)の部分と前記第2接続要素(13)との複数の電気的接続部の間の領域を含み、
前記第1接続要素(12)は、フレキシブルな、導電性のプレートで構成され、
前記半導体モジュール(1)は、制御回路を有し、前記制御回路は、前記第1接続要素(12)だけを電気的な接続に使用する、
ことを特徴とする、半導体モジュール(1)を製造する方法。 - 最初に前記第1接続要素(12)を、少なくとも一部の領域において、前記半導体チップ(6)と、前記基板(2)と、前記別の半導体チップとに被着し、引き続いて前記第2接続要素(13)を、少なくとも一部の領域において、前記第1接続要素(12)に被着する、ことを特徴とする、請求項4記載の方法。
- 前記第1接続要素(12)を形成するために、焼結、はんだ付けおよび/または電気めっき法を用いて前記シートに前記金属層を被着する、ことを特徴とする、請求項4または5記載の方法。
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EP16207050.2 | 2016-12-28 | ||
PCT/EP2017/080640 WO2018121949A1 (de) | 2016-12-28 | 2017-11-28 | Halbleitermodul mit einem ersten und einem zweiten verbindungselement zum verbinden eines halbleiterchips sowie herstellungsverfahren |
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CN110168709B (zh) | 2023-10-20 |
US20190348390A1 (en) | 2019-11-14 |
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US11837571B2 (en) | 2023-12-05 |
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