JP5829926B2 - タングステン膜の成膜方法 - Google Patents

タングステン膜の成膜方法 Download PDF

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Publication number
JP5829926B2
JP5829926B2 JP2012009452A JP2012009452A JP5829926B2 JP 5829926 B2 JP5829926 B2 JP 5829926B2 JP 2012009452 A JP2012009452 A JP 2012009452A JP 2012009452 A JP2012009452 A JP 2012009452A JP 5829926 B2 JP5829926 B2 JP 5829926B2
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JP
Japan
Prior art keywords
gas
tungsten film
etching
forming
film
Prior art date
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Active
Application number
JP2012009452A
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English (en)
Japanese (ja)
Other versions
JP2013032575A (ja
Inventor
村上 誠志
誠志 村上
満雄 田中
満雄 田中
桐子 堀越
桐子 堀越
耕一 佐藤
耕一 佐藤
康 饗場
康 饗場
智也 浦野
智也 浦野
麻由子 石川
麻由子 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2012009452A priority Critical patent/JP5829926B2/ja
Priority to KR1020120071114A priority patent/KR101366947B1/ko
Priority to TW101124039A priority patent/TWI545692B/zh
Publication of JP2013032575A publication Critical patent/JP2013032575A/ja
Application granted granted Critical
Publication of JP5829926B2 publication Critical patent/JP5829926B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
JP2012009452A 2011-07-06 2012-01-19 タングステン膜の成膜方法 Active JP5829926B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2012009452A JP5829926B2 (ja) 2011-07-06 2012-01-19 タングステン膜の成膜方法
KR1020120071114A KR101366947B1 (ko) 2011-07-06 2012-06-29 텅스텐 막의 성막 방법
TW101124039A TWI545692B (zh) 2011-07-06 2012-07-04 Tungsten film forming method

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011149900 2011-07-06
JP2011149900 2011-07-06
JP2012009452A JP5829926B2 (ja) 2011-07-06 2012-01-19 タングステン膜の成膜方法

Publications (2)

Publication Number Publication Date
JP2013032575A JP2013032575A (ja) 2013-02-14
JP5829926B2 true JP5829926B2 (ja) 2015-12-09

Family

ID=47788659

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012009452A Active JP5829926B2 (ja) 2011-07-06 2012-01-19 タングステン膜の成膜方法

Country Status (3)

Country Link
JP (1) JP5829926B2 (ko)
KR (1) KR101366947B1 (ko)
TW (1) TWI545692B (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9082826B2 (en) * 2013-05-24 2015-07-14 Lam Research Corporation Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features
US9748105B2 (en) * 2013-08-16 2017-08-29 Applied Materials, Inc. Tungsten deposition with tungsten hexafluoride (WF6) etchback
JP6297884B2 (ja) 2014-03-28 2018-03-20 東京エレクトロン株式会社 タングステン膜の成膜方法
US10276393B2 (en) * 2015-01-26 2019-04-30 Kokusai Electric Corporation Method of manufacturing semiconductor device
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9978610B2 (en) 2015-08-21 2018-05-22 Lam Research Corporation Pulsing RF power in etch process to enhance tungsten gapfill performance
KR102365114B1 (ko) 2015-08-28 2022-02-21 삼성전자주식회사 반도체 장치 및 그 제조 방법
TWI720106B (zh) 2016-01-16 2021-03-01 美商應用材料股份有限公司 Pecvd含鎢硬遮罩膜及製造方法
JP6583081B2 (ja) * 2016-03-22 2019-10-02 東京エレクトロン株式会社 半導体装置の製造方法
US10566211B2 (en) 2016-08-30 2020-02-18 Lam Research Corporation Continuous and pulsed RF plasma for etching metals
CN112740364B (zh) * 2018-09-14 2024-02-27 株式会社国际电气 半导体装置的制造方法、基板处理装置和记录介质
JP7149788B2 (ja) * 2018-09-21 2022-10-07 東京エレクトロン株式会社 成膜方法及び成膜装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4027960B2 (ja) * 1991-10-24 2007-12-26 東京エレクトロン株式会社 成膜処理装置
JP3475666B2 (ja) * 1996-08-16 2003-12-08 ソニー株式会社 ドライエッチング方法
US5849092A (en) * 1997-02-25 1998-12-15 Applied Materials, Inc. Process for chlorine trifluoride chamber cleaning
JPH10321556A (ja) * 1997-05-17 1998-12-04 Tokyo Electron Ltd 成膜方法
KR100272523B1 (ko) * 1998-01-26 2000-12-01 김영환 반도체소자의배선형성방법
JP2000058643A (ja) * 1998-08-10 2000-02-25 Sony Corp プラグの形成方法
JP2002009017A (ja) * 2000-06-22 2002-01-11 Mitsubishi Electric Corp 半導体装置の製造方法
KR20090098073A (ko) * 2008-03-13 2009-09-17 주식회사 하이닉스반도체 반도체 소자의 제조방법
JP5550843B2 (ja) * 2009-03-19 2014-07-16 ラピスセミコンダクタ株式会社 半導体装置の製造方法
US8119527B1 (en) * 2009-08-04 2012-02-21 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features

Also Published As

Publication number Publication date
KR101366947B1 (ko) 2014-02-24
KR20130006314A (ko) 2013-01-16
TWI545692B (zh) 2016-08-11
JP2013032575A (ja) 2013-02-14
TW201308516A (zh) 2013-02-16

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