JP5790387B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5790387B2 JP5790387B2 JP2011221519A JP2011221519A JP5790387B2 JP 5790387 B2 JP5790387 B2 JP 5790387B2 JP 2011221519 A JP2011221519 A JP 2011221519A JP 2011221519 A JP2011221519 A JP 2011221519A JP 5790387 B2 JP5790387 B2 JP 5790387B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- gate electrode
- type well
- well region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
Landscapes
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011221519A JP5790387B2 (ja) | 2011-10-06 | 2011-10-06 | 半導体装置 |
| US13/644,036 US8675383B2 (en) | 2011-10-06 | 2012-10-03 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011221519A JP5790387B2 (ja) | 2011-10-06 | 2011-10-06 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013084644A JP2013084644A (ja) | 2013-05-09 |
| JP2013084644A5 JP2013084644A5 (enExample) | 2014-08-21 |
| JP5790387B2 true JP5790387B2 (ja) | 2015-10-07 |
Family
ID=48041972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011221519A Expired - Fee Related JP5790387B2 (ja) | 2011-10-06 | 2011-10-06 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8675383B2 (enExample) |
| JP (1) | JP5790387B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102399465B1 (ko) * | 2015-10-23 | 2022-05-18 | 삼성전자주식회사 | 로직 반도체 소자 |
| JP6501695B2 (ja) * | 2015-11-13 | 2019-04-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| TWI698873B (zh) * | 2017-03-28 | 2020-07-11 | 聯華電子股份有限公司 | 半導體記憶元件 |
| US11737253B2 (en) | 2017-06-22 | 2023-08-22 | Intel Corporation | Uniform layouts for SRAM and register file bit cells |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3560480B2 (ja) | 1998-10-05 | 2004-09-02 | シャープ株式会社 | スタティック・ランダム・アクセスメモリ |
| JP3981798B2 (ja) * | 1999-04-16 | 2007-09-26 | セイコーエプソン株式会社 | 半導体記憶装置及びその製造方法 |
| JP4038351B2 (ja) | 2001-05-29 | 2008-01-23 | 株式会社東芝 | 半導体記憶装置 |
| US7532501B2 (en) * | 2005-06-02 | 2009-05-12 | International Business Machines Corporation | Semiconductor device including back-gated transistors and method of fabricating the device |
| JP2009110594A (ja) * | 2007-10-30 | 2009-05-21 | Kobe Univ | 半導体記憶装置 |
| JP6025316B2 (ja) * | 2011-10-07 | 2016-11-16 | キヤノン株式会社 | 光電変換装置 |
-
2011
- 2011-10-06 JP JP2011221519A patent/JP5790387B2/ja not_active Expired - Fee Related
-
2012
- 2012-10-03 US US13/644,036 patent/US8675383B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20130088908A1 (en) | 2013-04-11 |
| US8675383B2 (en) | 2014-03-18 |
| JP2013084644A (ja) | 2013-05-09 |
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