JP5656010B2 - ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 - Google Patents

ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 Download PDF

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JP5656010B2
JP5656010B2 JP2010256165A JP2010256165A JP5656010B2 JP 5656010 B2 JP5656010 B2 JP 5656010B2 JP 2010256165 A JP2010256165 A JP 2010256165A JP 2010256165 A JP2010256165 A JP 2010256165A JP 5656010 B2 JP5656010 B2 JP 5656010B2
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film
hard mask
plasma
forming
silicon carbide
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Expired - Fee Related
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Japanese (ja)
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JP2011139033A5 (https=
JP2011139033A (ja
Inventor
ランガラジャン、ヴィシュワナサン
アンドリュー アントネリ、ジョージ
アンドリュー アントネリ、ジョージ
バナージ、アナンダ
ヴァン シュラヴェンディジク バート
ヴァン シュラヴェンディジク バート
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Novellus Systems Inc
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Novellus Systems Inc
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Priority claimed from US12/631,709 external-priority patent/US8178443B2/en
Priority claimed from US12/631,691 external-priority patent/US8247332B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/087—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving multiple stacked pre-patterned masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6923—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/088—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving partial etching of via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
JP2010256165A 2009-12-04 2010-11-16 ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 Expired - Fee Related JP5656010B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US12/631,691 2009-12-04
US12/631,709 2009-12-04
US12/631,709 US8178443B2 (en) 2009-12-04 2009-12-04 Hardmask materials
US12/631,691 US8247332B2 (en) 2009-12-04 2009-12-04 Hardmask materials

Publications (3)

Publication Number Publication Date
JP2011139033A JP2011139033A (ja) 2011-07-14
JP2011139033A5 JP2011139033A5 (https=) 2013-12-26
JP5656010B2 true JP5656010B2 (ja) 2015-01-21

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JP2010256165A Expired - Fee Related JP5656010B2 (ja) 2009-12-04 2010-11-16 ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置

Country Status (4)

Country Link
JP (1) JP5656010B2 (https=)
KR (2) KR101798235B1 (https=)
CN (2) CN102097364B (https=)
TW (2) TWI547997B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180069705A (ko) 2016-12-15 2018-06-25 도쿄엘렉트론가부시키가이샤 성막 방법, 붕소 막 및 성막 장치

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5723243B2 (ja) * 2011-08-11 2015-05-27 東京エレクトロン株式会社 成膜方法、これを含む半導体装置の製造方法、成膜装置、及び半導体装置
CN103258779B (zh) * 2012-02-17 2015-05-20 中芯国际集成电路制造(上海)有限公司 铜互连结构及其制造方法
JP5860734B2 (ja) * 2012-03-13 2016-02-16 株式会社ライテック研究所 硬質皮膜被覆部材およびその製造方法
US9234276B2 (en) 2013-05-31 2016-01-12 Novellus Systems, Inc. Method to obtain SiC class of films of desired composition and film properties
US10325773B2 (en) 2012-06-12 2019-06-18 Novellus Systems, Inc. Conformal deposition of silicon carbide films
US12334332B2 (en) 2012-06-12 2025-06-17 Lam Research Corporation Remote plasma based deposition of silicon carbide films using silicon-containing and carbon-containing precursors
US10832904B2 (en) 2012-06-12 2020-11-10 Lam Research Corporation Remote plasma based deposition of oxygen doped silicon carbide films
US20180347035A1 (en) 2012-06-12 2018-12-06 Lam Research Corporation Conformal deposition of silicon carbide films using heterogeneous precursor interaction
JP6007031B2 (ja) * 2012-08-23 2016-10-12 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
JP2014078579A (ja) * 2012-10-10 2014-05-01 Renesas Electronics Corp 半導体装置の製造方法
KR102178326B1 (ko) * 2012-12-18 2020-11-13 램 리써치 코포레이션 산소-함유 세라믹 하드 마스크들 및 관련 습식-세정들
JP6111097B2 (ja) * 2013-03-12 2017-04-05 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
JP6111106B2 (ja) * 2013-03-19 2017-04-05 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
US20150024152A1 (en) * 2013-07-19 2015-01-22 Agilent Technologies, Inc. Metal components with inert vapor phase coating on internal surfaces
US10767259B2 (en) 2013-07-19 2020-09-08 Agilent Technologies, Inc. Components with an atomic layer deposition coating and methods of producing the same
CN104947085B (zh) * 2014-03-31 2017-12-19 中芯国际集成电路制造(上海)有限公司 掩膜的沉积方法、掩膜及半导体器件的刻蚀方法
US20160314964A1 (en) 2015-04-21 2016-10-27 Lam Research Corporation Gap fill using carbon-based films
US10535558B2 (en) 2016-02-09 2020-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming trenches
WO2017149604A1 (ja) * 2016-02-29 2017-09-08 株式会社日立国際電気 半導体装置の製造方法、基板処理装置、および記録媒体
US9870915B1 (en) * 2016-10-01 2018-01-16 Applied Materials, Inc. Chemical modification of hardmask films for enhanced etching and selective removal
US9837270B1 (en) * 2016-12-16 2017-12-05 Lam Research Corporation Densification of silicon carbide film using remote plasma treatment
JP6914143B2 (ja) * 2016-12-26 2021-08-04 東京エレクトロン株式会社 基板処理方法、基板処理装置、基板処理システム、基板処理システムの制御装置および半導体基板の製造方法
KR102020211B1 (ko) * 2017-01-09 2019-11-04 주식회사 테스 탄소 및/또는 보론를 포함하는 비정질 실리콘막의 형성 방법
JP7229929B2 (ja) * 2017-02-01 2023-02-28 アプライド マテリアルズ インコーポレイテッド ハードマスク応用向けのホウ素がドープされた炭化タングステン
JP6914107B2 (ja) * 2017-06-05 2021-08-04 東京エレクトロン株式会社 ボロン膜の除去方法
CN107742607B (zh) * 2017-08-31 2021-05-11 重庆中科渝芯电子有限公司 一种用icp干法刻蚀制作薄膜电阻的方法
US10474027B2 (en) * 2017-11-13 2019-11-12 Macronix International Co., Ltd. Method for forming an aligned mask
JP7049883B2 (ja) * 2018-03-28 2022-04-07 東京エレクトロン株式会社 ボロン系膜の成膜方法および成膜装置
GB201813467D0 (en) * 2018-08-17 2018-10-03 Spts Technologies Ltd Method of depositing silicon nitride
US11848199B2 (en) 2018-10-19 2023-12-19 Lam Research Corporation Doped or undoped silicon carbide deposition and remote hydrogen plasma exposure for gapfill
TWI853993B (zh) * 2019-08-12 2024-09-01 美商應用材料股份有限公司 低k介電膜
US11276573B2 (en) * 2019-12-04 2022-03-15 Applied Materials, Inc. Methods of forming high boron-content hard mask materials
US11508573B2 (en) 2019-12-31 2022-11-22 Micron Technology, Inc. Plasma doping of gap fill materials
US20230112746A1 (en) * 2020-02-24 2023-04-13 Lam Research Corporation High modulus boron-based ceramics for semiconductor applications
US11404263B2 (en) * 2020-08-07 2022-08-02 Applied Materials, Inc. Deposition of low-stress carbon-containing layers
US11676813B2 (en) * 2020-09-18 2023-06-13 Applied Materials, Inc. Doping semiconductor films
US11961739B2 (en) * 2020-10-05 2024-04-16 Applied Materials, Inc. Boron concentration tunability in boron-silicon films
CN114664649B (zh) * 2022-05-19 2022-09-20 浙江大学杭州国际科创中心 碳化硅高深宽比槽刻蚀工艺优化方法
CN115241126B (zh) * 2022-09-21 2022-12-30 广州粤芯半导体技术有限公司 通孔刻蚀方法以及金属互连结构的制作方法
JP2025133138A (ja) * 2024-03-01 2025-09-11 東京エレクトロン株式会社 成膜方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA868641A (en) * 1971-04-13 L. Cuomo Jerome Method for etching silicon nitride films with sharp edge definition
US4895789A (en) * 1988-03-29 1990-01-23 Seiko Instruments Inc. Method of manufacturing non-linear resistive element array
KR100219550B1 (ko) * 1996-08-21 1999-09-01 윤종용 반사방지막 및 이를 이용한 패턴형성방법
US6875687B1 (en) * 1999-10-18 2005-04-05 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
JP3430091B2 (ja) * 1999-12-01 2003-07-28 Ｎｅｃエレクトロニクス株式会社 エッチングマスク及びエッチングマスクを用いたコンタクトホールの形成方法並びにその方法で形成した半導体装置
US6794311B2 (en) * 2000-07-14 2004-09-21 Applied Materials Inc. Method and apparatus for treating low k dielectric layers to reduce diffusion
TW535253B (en) * 2000-09-08 2003-06-01 Applied Materials Inc Plasma treatment of silicon carbide films
US6803313B2 (en) * 2002-09-27 2004-10-12 Advanced Micro Devices, Inc. Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes
US7238393B2 (en) * 2003-02-13 2007-07-03 Asm Japan K.K. Method of forming silicon carbide films
WO2005064403A1 (ja) * 2003-12-26 2005-07-14 Nissan Chemical Industries, Ltd. ハードマスク用塗布型窒化膜形成組成物
US7132374B2 (en) * 2004-08-17 2006-11-07 Cecilia Y. Mak Method for depositing porous films
TW200631095A (en) * 2005-01-27 2006-09-01 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
JP4837370B2 (ja) * 2005-12-05 2011-12-14 東京エレクトロン株式会社 成膜方法
WO2007075369A1 (en) * 2005-12-16 2007-07-05 Asm International N.V. Low temperature doped silicon layer formation
JP5040913B2 (ja) * 2006-03-31 2012-10-03 富士通セミコンダクター株式会社 半導体装置の製造方法
US7744746B2 (en) * 2006-03-31 2010-06-29 Exxonmobil Research And Engineering Company FCC catalyst stripper configuration
US7528078B2 (en) * 2006-05-12 2009-05-05 Freescale Semiconductor, Inc. Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer
US7550758B2 (en) * 2006-10-31 2009-06-23 Atmel Corporation Method for providing a nanoscale, high electron mobility transistor (HEMT) on insulator
US20100327413A1 (en) * 2007-05-03 2010-12-30 Lam Research Corporation Hardmask open and etch profile control with hardmask open

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180069705A (ko) 2016-12-15 2018-06-25 도쿄엘렉트론가부시키가이샤 성막 방법, 붕소 막 및 성막 장치
US10388524B2 (en) 2016-12-15 2019-08-20 Tokyo Electron Limited Film forming method, boron film, and film forming apparatus

Also Published As

Publication number Publication date
CN105185707A (zh) 2015-12-23
CN102097364A (zh) 2011-06-15
TWI505364B (zh) 2015-10-21
JP2011139033A (ja) 2011-07-14
TW201543574A (zh) 2015-11-16
TWI547997B (zh) 2016-09-01
CN102097364B (zh) 2015-10-14
KR20170126827A (ko) 2017-11-20
CN105185707B (zh) 2018-06-01
KR101907802B1 (ko) 2018-12-05
KR101798235B1 (ko) 2017-11-15
KR20110063386A (ko) 2011-06-10
TW201130050A (en) 2011-09-01

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