JP5655277B2 - Thin film transistor and active matrix display - Google Patents

Description

The present invention relates to a thin film transistor and an active matrix display that can be used for driving elements of various image display devices, logic elements of various logic circuits, and the like.

At present, a general flat panel display (FPD) is mainly an active matrix type driven by a field effect thin film transistor using amorphous silicon or polycrystalline silicon as a semiconductor. .

On the other hand, attempts have been made in recent years to use a plastic substrate instead of a glass substrate for the purpose of further reducing the thickness and weight of the FPD, and improving impact resistance and flexibility.

However, the manufacture of the above-described thin film transistor using silicon as a semiconductor layer requires a high-temperature heat process and is difficult to apply to a plastic substrate with low heat resistance.

Therefore, development of a thin film transistor using an oxide that can be formed at a low temperature as a semiconductor layer has been actively performed (Non-patent Document 1).

In addition, in order to realize a thin film transistor with high reliability and capable of multi-gradation display, a thin film transistor using a conventional oxide as a semiconductor has a problem that an on / off ratio is not sufficient. Research has been conducted to obtain a thin film transistor having a higher on / off ratio.

Ito Manabu, Applied Physics 77 [7] (2008) 809-812

Therefore, an object of the present invention is to provide a transistor having a high on / off ratio among bottom-gate thin film transistors in order to solve the above-described requirements.

The present invention has been made in order to achieve the above object, the invention according to claim 1, at least a gate electrode on an insulating substrate is laminated gate insulating layer are sequentially an oxide on the gate insulating layer A bottom-gate thin film transistor provided with a semiconductor layer, a source electrode, and a drain electrode , wherein the source electrode and the drain electrode are formed so as to cover a part of the surface of the semiconductor layer; After the electrode is formed , oxygen is injected by irradiating the region of the semiconductor layer surface not covered with the source electrode and the drain electrode with N ₂ O plasma at an input power of 100 W to 200 W for 1 minute to 3 minutes. This is a thin film transistor.

The invention according to claim 2 is the thin film transistor according to claim 1, wherein the semiconductor layer containing the oxide contains at least one of In, Ga, and Zn.

The invention according a third aspect, a thin film transistor according to claim 1 or 2, characterized in that it has a protective layer on the source electrode and the semiconductor layer not covered with the drain electrode.

According to a fourth aspect of the present invention, in the thin film transistor according to the third aspect, the protective layer is made of an inorganic material.

The invention according to claim 5 is the thin film transistor according to claim 3 , wherein the protective layer is an organic material.

The invention according to claim 6 is a step of forming a gate electrode on an insulating substrate, a step of forming a gate insulating layer on the gate electrode, and a step of forming a semiconductor containing an oxide on the gate insulating layer. And forming a source electrode and a drain electrode on the semiconductor layer, and irradiating the surface of the semiconductor layer with N ₂ O plasma at an input power of 100 W to 200 W for 1 minute to 3 minutes. This is a method for manufacturing a thin film transistor.

The invention according to claim 7 is a step of forming a gate electrode on an insulating substrate, a step of forming a gate insulating layer on the gate electrode, and a step of forming a source electrode and a drain electrode on the gate insulating layer. A step of forming a semiconductor layer containing an oxide so as to cover part of the source electrode and the drain electrode, and N ₂ O plasma is applied to the surface of the semiconductor layer at a power of 100 W or more and 200 W or less for 1 minute or more 3 And a step of irradiating less than or equal to minutes .

The invention according the claim 8, after the irradiation with the N _{2 O} plasma to the surface of the semiconductor layer, according to claim 6 or 7 characterized by having a step of forming a protective layer on the semiconductor layer It is a manufacturing method of a thin film transistor.

According to a ninth aspect of the present invention, there is provided an array of the thin film transistor according to any one of the first to fifth aspects, a pixel electrode connected to a source electrode or a drain electrode of the array, and the pixel electrode disposed on the pixel electrode. And an image display medium.

The invention according to claim 10 is the image display device according to claim 9 , wherein the image display medium is of an electrophoretic type.

According to the thin film transistor of the present invention, the oxygen density of the gate side surface of the semiconductor layer is lower than the oxygen density of the opposite surface, in other words, by increasing the oxygen density of the surface opposite to the gate side of the semiconductor layer, The on / off ratio of the thin film transistor can be improved.
A semiconductor layer containing an oxide has a feature that the lower the oxygen density, in other words, the more oxygen vacancies, the lower the electrical resistance. The thin film transistor of the present invention having the above structure means that the electrical resistance is low near the interface of the gate insulating layer and the electrical resistance of a layer away from the interface is high. In this case, the resistance of the so-called channel portion of the transistor remains low, and only the electrical resistance of the semiconductor layer near the source and drain electrodes away from the channel layer is high. When the gate voltage is high, the off-current flowing around the channel layer is small. Therefore, the on / off ratio can be improved as compared with the case where the semiconductor layer does not have an oxygen density gradient.

Further, excellent transistor characteristics can be obtained by using an oxide containing any one of In, Zn, and Ga for the semiconductor layer.

Further, by providing the protective layer over the semiconductor layer, a change in oxygen density of the semiconductor layer due to the influence from the external environment can be prevented.

In the case where an inorganic material is used for the protective layer, a change in the oxygen density of the semiconductor layer due to the influence from the external environment can be prevented. For example, it is known that a SiOx thin film as an example of an inorganic material has a very high gas / water vapor barrier property.

In addition, since the protective film of organic material can be easily formed by a coating method such as spin coating, there is no plasma damage to the semiconductor layer, which is a concern when forming a protective layer made of an inorganic material by sputtering or the like. There is.

As control of the oxygen density, the oxygen density of the semiconductor layer can be increased by irradiating oxygen-containing plasma. In the case of a top contact type thin film transistor, after providing a source electrode and a drain electrode, the surface of the semiconductor layer is irradiated with oxygen-containing plasma, so that the oxygen density does not increase in the electrode connection portion, and the low resistivity Therefore, the oxygen density on the surface of the semiconductor layer can be increased without impairing the ohmic contact between the source and drain electrodes and the semiconductor layer.

By making the oxygen-containing plasma a plasma using O ₂ or N ₂ O, the oxygen density on the surface of the semiconductor layer can be improved particularly efficiently.

1 is a schematic diagram illustrating a structure of a thin film transistor according to an embodiment of the present invention. FIG. 6 is a schematic diagram illustrating the structure of another thin film transistor showing an embodiment of the present invention. FIG. 6 is a schematic diagram illustrating the structure of another thin film transistor showing an embodiment of the present invention. Schematic diagram showing the structure of an image display device showing an embodiment of the present invention The graph which shows the element characteristic of each Example and each comparative example of this invention

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the embodiments, the same components are denoted by the same reference numerals, and redundant description among the embodiments is omitted.

1 and 2 are schematic views of a bottom-gate thin film transistor showing an example of an embodiment of the present invention. A gate electrode 102 and a gate insulating layer 103 formed so as to cover the gate electrode are formed over the insulating substrate 101, a semiconductor layer 104, and a source electrode 105 and a drain electrode connected to the semiconductor layer are formed over the gate insulating film. 106 is formed. Furthermore, the oxide of the present invention is included.

FIG. 1 shows a top-contact thin film transistor, in which a semiconductor layer 104 is formed over a gate insulating film, and a source electrode 105 and a drain electrode 106 are connected to the semiconductor layer so as to cover part of the surface of the semiconductor layer 104. FIG. 2 illustrates a bottom contact thin film transistor in which a source electrode 105 and a drain electrode 106 are formed over a gate insulating film, and a semiconductor layer 104 is formed so as to cover part of the source electrode 105 and the drain electrode 106. Connected.

As long as there is no hindrance to the present invention other than each layer, a functional layer and a protective layer may be added separately. For example, a protective layer 107 may be added over the semiconductor layer 104 as in the thin film transistor of the present invention illustrated in FIG. By providing the protective layer over the semiconductor layer, changes in characteristics of the semiconductor layer due to the influence from the external environment can be prevented. In particular, a change in oxygen density in the semiconductor can be prevented.

In the thin film transistor of the present invention, the oxygen density on the surface opposite to the gate side of the semiconductor layer is high, and oxygen vacancies in the semiconductor layer are reduced. That is, the oxygen density of the semiconductor layer 104 has a gradient in the vertical direction from the gate electrode side, and the oxygen density of the semiconductor layer is the lowest on the gate electrode side. Such an element is realized by irradiating the surface of the semiconductor layer opposite to the gate side with plasma (oxygen-containing plasma) using a gas containing oxygen atoms as described later.

A semiconductor including an oxide has a feature that the lower the oxygen density, in other words, the greater the number of oxygen vacancies, the lower the electrical resistance. Therefore, the oxygen density of the semiconductor layer 106 has a gradient in the vertical direction from the gate electrode side, and the oxygen density is the lowest on the gate electrode side. This means that the electrical resistance is low in the vicinity of the interface of the gate insulating layer and is far from the interface. This means that the electric resistance in the region is high. In this case, the resistance of the so-called channel portion of the transistor remains low, and only the electric resistance of the high oxygen density region 104b in the vicinity between the source and drain electrodes away from the channel layer is increased. Therefore, when the gate voltage is positive, the channel portion is The flowing current (on-current) is high, and the off-current flowing around the channel layer is small when the gate voltage is negative. Therefore, the on / off ratio can be improved as compared with a conventional thin film transistor having a semiconductor layer thickness of the same level in which the semiconductor layer does not have an oxygen density gradient.

Hereinafter, the thin film transistor of the present invention will be described in detail.
As the insulating substrate 101, for example, a glass or plastic substrate can be used. Examples of the plastic substrate include polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate (PEN), cycloolefin polymer, polyethersulfene (PES), triphenyl. Acetyl cellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluorine resin, cyclic polyolefin resin Etc. can be used. These substrates can be used alone, or a composite substrate in which two or more kinds are laminated can be used.

A flexible substrate such as a plastic substrate is preferable because a thin, light, and flexible thin film transistor can be obtained. When the manufacturing process includes a heat treatment such as a drying process, PES or PEN is preferable for a plastic substrate in addition to a glass substrate such as quartz having high thermal stability.

When the insulating substrate is a plastic substrate, it is also preferable to form a gas barrier layer in order to increase the durability of the element. Examples of the gas barrier layer include, but are not limited to, Al ₂ O ₃ , SiO ₂ , SiN, SiON, SiC, and diamond like carbon (DLC). These gas barrier layers can also be used by laminating two or more layers. Further, the gas barrier layer may be provided on only one side of the plastic substrate or on both sides. The gas barrier layer is formed by a vapor deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD (Chemical Vapor Deposition) method, a hot wire CVD method, a sol-gel method, or the like, but is not limited thereto. A base material in which a color filter is formed on a glass or plastic substrate can also be used.

The gate electrode 102, the source electrode 105, and the drain electrode 106 of the present invention include indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), cadmium oxide (CdO), and indium cadmium oxide (CdIn An oxide material such as ₂ O ₄ ), cadmium tin oxide (Cd ₂ SnO ₂ ), zinc tin oxide (Zn ₂ SnO ₄ ), and indium zinc oxide (In—Zn—O) is preferably used. It is also preferable to add impurities to this oxide material in order to increase conductivity. For example, indium oxide is doped with tin, molybdenum, or titanium, tin oxide is doped with antimony or fluorine, and zinc oxide is doped with indium, aluminum, or gallium. Among these, indium tin oxide (commonly referred to as ITO) obtained by doping tin into indium oxide is particularly preferably used because of its low resistivity. In addition, low resistance metal materials such as Au, Ag, Cu, Cr, Al, Mg, and Li are also preferably used. In addition, a laminate of a plurality of conductive oxide materials and low resistance metal materials can be used. In this case, a three-layer structure in which a conductive oxide thin film / metal thin film / conductive oxide thin film is laminated in order in order to prevent oxidation or deterioration with time of the metal material is particularly preferably used. An organic conductive material such as PEDOT (polyethylenedioxythiophene) can also be suitably used. The gate electrode, the source electrode, and the drain electrode may all be the same material, or may be all different materials. However, in order to reduce the number of steps, it is more desirable that the source electrode and the drain electrode are made of the same material. These electrodes are formed by vacuum deposition, ion plating, sputtering, laser ablation, plasma CVD (Chemical Vapor Deposition), photo CVD, hot wire CVD, or the above conductive materials in ink or paste. Although what was made can apply | coat by screen printing, letterpress printing, the inkjet method, etc., it can form by baking, It is not limited to these.

The material used for the gate insulating layer 103 is an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconia oxide, titanium oxide, or PMMA. Polyacrylates such as (polymethylmethacrylate), PVA (polyvinyl alcohol), PS (polystyrene), transparent polyimide, polyester, epoxy, polyvinylphenol, polyvinyl alcohol, and the like are exemplified, but not limited thereto. In order to suppress the gate leakage current, the resistivity of the insulating material is preferably 10 ¹¹ Ωcm or more, particularly 10 ¹⁴ Ωcm or more. The gate insulating layer 103 is formed using a method such as vacuum deposition, ion plating, sputtering, laser ablation, plasma CVD, photo CVD, hot wire CVD, spin coating, dip coating, or screen printing. . As these gate insulating layers 103, those whose composition is inclined toward the film growth direction are also preferably used.

As the semiconductor layer 104 of the thin film transistor used in the present invention, for example, an oxide containing one or more elements of zinc, indium, tin, tungsten, magnesium, and gallium can be given. Well-known materials such as zinc oxide, indium oxide, indium zinc oxide, tin oxide, tungsten oxide, and zinc gallium indium oxide (In—Ga—Zn—O) may be used, but the material is not limited to these. The structure of these materials may be single crystal, polycrystal, microcrystal, crystal / amorphous mixed crystal, nanocrystal scattered amorphous, or amorphous. The thickness of the semiconductor layer is desirably at least 10 nm. If the thickness is smaller than 10 nm, the film is formed in an island shape, and a portion in which no semiconductor is formed tends to occur in the film.

The semiconductor layer is formed using a sputtering method, a pulse laser deposition method, a vacuum evaporation method, a CVD method, a sol-gel method, or the like, preferably a sputtering method, a pulse laser deposition method, a vacuum evaporation method, or a CVD method. Examples of sputtering include RF magnetron sputtering, DC sputtering, vacuum deposition includes heating deposition, electron beam deposition, ion plating, and CVD includes hot wire CVD and plasma CVD. Absent.

After the semiconductor layer 104 is formed, the surface of the semiconductor layer opposite to the side where the gate electrode is formed is irradiated with oxygen-containing plasma. In the case of a top-contact thin film transistor as shown in FIGS. 1 and 3, it is preferable to irradiate after the source electrode 105 and the drain electrode 106 are formed. By irradiating oxygen-containing plasma after forming the electrode, oxygen is injected only into the surface of the semiconductor layer not covered with the electrode, so that the oxygen-enriched region 104b is formed. For this reason, since the contact region between each electrode and the semiconductor layer in the semiconductor layer is kept at a low resistance, the contact resistance can be kept low.

When irradiating an oxygen-containing plasma in the semiconductor _layer, O _{2, O 3,} N 2 O, NO ₂ or mixtures plasma or the like thereof and an inert gas and the like, in particular _{O 2} or _{N 2} O plasma semiconductor layer 6 It is desirable to be able to inject oxygen effectively. However, it is not limited to these.

As shown in FIG. 3, by forming the protective layer 107 over the semiconductor layer 106, it is possible to prevent a change in characteristics of the semiconductor layer due to the influence from the external environment. The protective layer 107 preferably covers at least the exposed semiconductor layer. As described below, either an organic material or an inorganic material may be used, a single layer may be used, or a plurality of layers may be stacked.

When the protective layer 107 is formed of an inorganic material, silicon oxide, silicon nitride, silicon oxynitride (SiN _x O _y ), aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconia oxide, titanium oxide, etc. Is mentioned. If such an inorganic material is used, a protective layer having a low barrier property against gas and water vapor and a very high barrier property can be formed.

When the protective layer 6 is formed of an organic material, polyacrylate such as PMMA (polymethyl methacrylate), PVA (polyvinyl alcohol), PS (polystyrene), transparent polyimide, polyester, epoxy, polyvinylphenol, polyvinyl alcohol Fluorine resins and the like, and photoresists obtained by adding a photosensitizer to these organic materials, but are not limited thereto. Since the protective film of an organic material can be easily formed by a coating method such as spin coating, there is an advantage that there is no plasma damage to the semiconductor layer, which is a concern when a protective layer made of an inorganic material is formed by a sputtering method or the like. .

4 and 5 show an example of an image display device using the thin film transistor of the present invention.
The image display device of the present invention is a thin film transistor array in which at least one thin film transistor is arranged for each pixel, and is connected to the image display medium 303. Examples of the image display medium include an electrophoretic display medium (electronic paper), a liquid crystal display medium, an organic EL, an inorganic EL, and the like.

In the example of the image display device of the present invention shown in FIG. 4, an interlayer insulating film 301 is formed on a substrate on which a thin film transistor is formed, the source electrode 105 or the drain electrode 106 and the pixel electrode 302 are connected, and the pixel electrode and the counter electrode 304 are connected. Thus, the image display medium 303 is sandwiched. Since the thin film transistor of the present invention can be made transparent by selecting a material, it may be visible from either the counter electrode side or the thin film transistor side. Note that as the interlayer insulating film, the same materials as those described for the gate insulating film 103 and the protective film 107 can be used. In the example of the image display device of FIG. 4, the pixel electrode can be arranged on the entire surface by being flattened by an interlayer insulating film. An image display device can be manufactured by attaching an electrophoretic display medium having a counter electrode formed thereon, for example.

As another example of the image display device of the present invention, a partition for partitioning pixels may be formed on a thin film transistor, and an image display medium may be formed on the pixel electrode 302 extended from the source electrode 105 or the drain electrode 106. good. For example, an organic EL formed using an inkjet method or a printing method can be used as a display medium.

Hereinafter, the present invention will be described using Examples 1 to 5 and Comparative Examples 1 to 4.

Example 1
In Example 1, a thin film transistor of the present invention as shown in FIG. 1 was produced.

As the insulating substrate 101, a PEN base material (Q65 manufactured by Teijin DuPont Co., Ltd., thickness: 125 μm) was used, and ITO was formed on the insulating substrate 101 to a film thickness of 100 nm by DC magnetron sputtering. Further, the deposited ITO was patterned into a desired shape by etching to form a gate electrode 102.

Next, a silicon nitride (Si ₃ N ₄ ) target was used to cover the gate electrode 102, and an SiON film having a thickness of 500 nm was formed by an RF sputtering method to form the gate insulating layer 103.

Next, an InGaZnO ₄ target is used as the semiconductor layer 104 over the gate insulating layer 103 to form amorphous In—Ga—Zn—O with a film thickness of 15 nm by an RF sputtering method and patterned into a desired shape by etching. A semiconductor layer 104 was formed.

Next, after applying a resist on the semiconductor layer 104, drying and developing, an ITO film is formed to a thickness of 50 nm by DC magnetron sputtering, lift-off is performed, and the source electrode 105 and the drain electrode 106 are formed. Thus, a thin film transistor element was obtained. The film formation conditions in the film formation process of each layer are shown in Table 1 below. The channel length between the source / drain electrodes of the fabricated device was 20 μm, and the channel width was 5 μm.

Next, using an RF plasma irradiation apparatus, the produced element was irradiated with O ₂ plasma for 1 minute at an input power of 100 W, a pressure in the chamber of 1.0 Pa, and a flow rate of oxygen (O ₂ ) of 50 SCCM.

The transistor characteristics of the thin film transistor device of Example 1 measured using a semiconductor parameter analyzer (Keithley SCS4200) are as follows: mobility is 10 cm ² / Vs, and ON / OFF when a voltage of 10 V is applied between the source / drain electrodes. The ratio was 8 digits and showed good transistor characteristics.

Note that when an amorphous In—Ga—Zn—O thin film having a thickness of 300 nm formed on a glass substrate is irradiated with O ₂ plasma for 3 minutes with an input power of 200 W, a chamber internal pressure of 1.0 Pa, and an O ₂ flow rate of 50 SCCM. The electrical resistivity of the single film decreased from 1.0 × 10 ⁻⁴ Ω · cm to 9.1 × 10 ⁻⁷ Ω · cm.

(Comparative Example 1)
In Comparative Example 1, a thin film transistor was manufactured in the same process as in Example 1 except that the surface of the semiconductor layer 104 was not irradiated with O ₂ plasma.

The transistor characteristics of the thin film transistor element of Comparative Example 1 measured using a semiconductor parameter analyzer (Keithley SCS4200) are ON / OFF when the mobility is 8 cm ² / Vs and a voltage of 10 V is applied between the source / drain electrodes. The ratio was 6 digits. Compared with the result of Example 1, the OFF current was high and the ON / OFF ratio was a small value.

(Example 2)
In Example 2, a thin film transistor of the present invention was manufactured in the same process as Example 1 except that a mixed plasma of argon (Ar) and oxygen (O ₂ ) was used for the irradiation of oxygen-containing plasma.

In the oxygen-containing plasma irradiation step, using an RF plasma irradiation apparatus, Ar—O ₂ for 1 minute with an input power of 100 W, a chamber internal pressure of 1.0 Pa, an Ar flow rate of 10 SCCM, and an O ₂ flow rate of 50 SCCM. Irradiated with mixed plasma.

The transistor characteristics of the thin film transistor device of Example 2 measured using a semiconductor parameter analyzer (Keithlay SCS4200) are 10 cm ₂ / Vs in mobility and ON / OFF when a voltage of 10 V is applied between the source / drain electrodes. The ratio was 7 digits, which was better than that of Comparative Example 1.

Note that an amorphous In—Ga—Zn—O thin film with a thickness of 300 nm formed on a glass substrate was subjected to Ar—O for 3 minutes with an input power of 200 W, a chamber pressure of 1.0 Pa, an Ar flow rate of 10 SCCM, and an O ₂ flow rate of 50 SCCM. _{When two} mixed plasmas were irradiated, the electrical resistivity of the single film decreased from 1.0 × 10 ⁻⁴ Ω · cm to 9.1 × 10 ⁻⁷ Ω · cm.

Example 3
In Example 3, the thin film transistor of the present invention was manufactured in the same process as in Example 1 except that N ₂ O plasma was used in the irradiation process of the oxygen-containing plasma.

In the oxygen-containing plasma irradiation step, the produced element was irradiated with oxygen plasma for 1 minute using an RF plasma irradiation apparatus with an input power of 100 W, a chamber internal pressure of 1.0 Pa, and an N ₂ O flow rate of 50 SCCM.

The transistor characteristics of the thin film transistor element of Example 3 measured using a semiconductor parameter analyzer (Keithlay SCS4200) are as follows: mobility is 9 cm ² / Vs, and ON / OFF when a voltage of 10 V is applied between the source / drain electrodes. The ratio was 8 digits and showed good device characteristics.

Note that an amorphous In—Ga—Zn—O thin film having a thickness of 300 nm formed on a glass substrate was irradiated with N ₂ O plasma for 3 minutes at an input power of 200 W, a chamber internal pressure of 0.6 Pa, and an N ₂ O flow rate of 50 SCCM. In some cases, the electrical resistivity of the single film decreased from 1.1 × 10 ⁻⁴ Ω · cm to 2.1 × 10 ⁻⁶ Ω · cm.

(Comparative Example 2)
In Comparative Example 2, a thin film transistor of the present invention was manufactured in the same process as Example 1 except that nitrogen (N ₂ ) plasma containing no oxygen was used for plasma irradiation.

In the plasma irradiation step, an RF plasma irradiation apparatus was used to irradiate the fabricated element with N ₂ plasma for 1 minute with an input power of 100 W, a chamber internal pressure of 1.0 Pa, and an N ₂ flow rate of 50 SCCM.

The transistor characteristics of the thin film transistor element measured using a semiconductor parameter analyzer (SCS4200 manufactured by Keithley) are as follows: the mobility is 9 cm ² / Vs, and the ON / OFF ratio when a voltage of 10 V is applied between the source / drain electrodes is 6 digits. Compared with the result of Example 1, the OFF current was high and the ON / OFF ratio was a small value.

Note that when an amorphous In—Ga—Zn—O thin film with a thickness of 300 nm formed on a glass substrate was irradiated with plasma for 1 minute at an input power of 200 W, a chamber internal pressure of 0.6 Pa, and an N ₂ flow rate of 50 SCCM, The electrical resistivity of the film increased from 1.1 × 10 ⁻⁴ Ω · cm to 1.3 × 10 ⁻¹ Ω · cm.

Example 4
In Example 4, a thin film transistor of the present invention as shown in FIG. 3 was produced.

A PEN base material (Q65 thickness 125 μm, manufactured by Teijin DuPont) was used as the insulating substrate 101, and ITO was formed on the insulating base material 101 to a film thickness of 100 nm by DC magnetron sputtering. Further, the deposited ITO was patterned into a desired shape by etching to form a gate electrode 102.

Next, a silicon nitride (Si ₃ N ₄ ) target was used to cover the gate electrode 102, and an SiON film having a thickness of 500 nm was formed by an RF sputtering method to form the gate insulating layer 103.

Next, an InGaZnO ₄ target is used as the semiconductor layer 104 over the gate insulating layer 103 to form amorphous In—Ga—Zn—O with a film thickness of 15 nm by an RF sputtering method and patterned into a desired shape by etching. A semiconductor layer 104 was formed.

Next, after applying a resist on the substrate formed up to the semiconductor layer 104, drying and developing, an ITO film is formed to a thickness of 50 nm by a DC magnetron sputtering method, lift-off is performed, and the source electrode 105 and A drain electrode 106 was formed. The channel length between the source / drain electrodes of the fabricated device was 20 μm, and the channel width was 5 μm.

Next, using an RF plasma irradiation apparatus, the produced element was irradiated with O ₂ plasma for 1 minute at an input power of 150 W, a chamber internal pressure of 1.0 Pa, and an O ₂ flow rate of 50 SCCM.

Next, after applying a resist on the substrate irradiated with O ₂ plasma, drying and developing, a SiON film is formed to a film thickness of 100 nm by RF magnetron sputtering, and lift-off is performed to form the protective layer 107. Thus, a thin film transistor element of Example 4 was obtained. Table 2 shows the film forming conditions in the film forming process of each layer.

The transistor characteristics of the thin film transistor device of Example 4 measured using a semiconductor parameter analyzer (Keithlay SCS4200) are as follows: mobility is 9 cm ² / Vs, and ON / OFF when a voltage of 10 V is applied between the source / drain electrodes. The ratio was 8 digits and showed good transistor characteristics.

(Comparative Example 3)
In Comparative Example 3, a thin film transistor was manufactured in the same process as in Example 4 except that the surface of the semiconductor layer 104 was not irradiated with O ₂ plasma.

The transistor characteristics of the thin film transistor element of Comparative Example 3 measured using a semiconductor parameter analyzer (Keithray SCS4200) are ON / OFF when a mobility of 8 cm ² / Vs and a voltage of 10 V are applied between the source / drain electrodes. The ratio was 6 digits, and the ON / OFF ratio was a small value compared to Example 4.

(Example 5)
In Example 5, a thin film transistor element was manufactured in the same manner as in Example 4 except that a photoresist was formed to a thickness of 3 μm by spin coating on a substrate irradiated with O ₂ plasma, and the protective layer 6 was formed by patterning. Was made. Each film forming process is shown in Table 3.

The transistor characteristics of the thin film transistor element of Example 5 measured using a semiconductor parameter analyzer (Keithlay SCS4200) are as follows: mobility is 9 cm ² / Vs, and ON / OFF when a voltage of 10 V is applied between the source / drain electrodes. The ratio was 8 digits and showed good transistor characteristics.

(Comparative Example 4)
In Comparative Example 4, a thin film transistor was manufactured in the same process as in Example 5 except that the surface of the semiconductor layer 104 was not irradiated with O ₂ plasma.

The transistor characteristics of the thin film transistor element of Comparative Example 4 measured using a semiconductor parameter analyzer (Keithley SCS4200) are ON / OFF when a mobility of 8 cm ² / Vs and a voltage of 10 V are applied between the source / drain electrodes. The ratio was 6 digits, and the ON / OFF ratio was smaller than that in Example 5.

Table 4 shows the plasma irradiation conditions and the presence or absence of the protective layer 107 in Examples 1 to 5 and Comparative Examples 1 to 4. Moreover, the graph which showed the carrier mobility and ON / OFF ratio as an element characteristic of each Example and a comparative example was shown in FIG. From FIG. 5, it can be seen that by irradiating the surface of the semiconductor layer 104 opposite to the gate side with the oxygen-containing plasma, the OFF current can be suppressed and the device characteristics are improved.

In a bottom gate type thin film transistor, a semiconductor having a gradient in the vertical direction so that the oxygen density of the region sandwiched between the source electrode and the drain electrode is lowest on the gate electrode side by irradiating the surface of the semiconductor layer with oxygen-containing plasma By providing the layer, a thin film transistor with a low off-state current and a high on-off ratio can be realized. Such a field effect transistor can be used as a switching element for electronic paper, LCD, organic EL display and the like. In particular, the present invention can be widely applied to flexible displays, IC cards, IC tags, etc. using a flexible substrate as a substrate.

101 Insulating substrate 102 Gate electrode 103 Gate insulating layer 104 Semiconductor layer 104b High oxygen density region (plasma irradiation region)
105 Source electrode 106 Drain electrode 107 Protective layer 301 Interlayer insulating layer 302 Pixel electrode 303 Image display medium 304 Counter electrode

Claims (10)

And at least a gate electrode on an insulating substrate is laminated gate insulating layer are sequentially semiconductor layer and the source electrode and the drain electrode comprising an oxide comprising a bottom gate thin film transistor provided in the gate insulating layer,
The source electrode and the drain electrode are formed so as to cover a part of the surface of the semiconductor layer, and the region of the surface of the semiconductor layer that is not covered with the source electrode and the drain electrode after forming the source electrode and the drain electrode In addition, a thin film transistor is characterized in that oxygen is injected by irradiating N ₂ O plasma with an input power of 100 W to 200 W for 1 minute to 3 minutes .   The thin film transistor according to claim 1, wherein the semiconductor layer containing an oxide contains at least one of In, Ga, and Zn. The thin film transistor according to claim 1 or 2, characterized in that it has a protective layer on the source electrode and the semiconductor layer not covered with the drain electrode. The thin film transistor according to claim 3 , wherein the protective layer is an inorganic material. The thin film transistor according to claim 3 , wherein the protective layer is an organic material. Forming a gate electrode on an insulating substrate;
Forming a gate insulating layer on the gate electrode;
Forming a semiconductor containing an oxide over the gate insulating layer;
Forming a source electrode and a drain electrode on the semiconductor layer;
Irradiating the surface of the semiconductor layer with N ₂ O plasma at an input power of 100 W to 200 W for 1 minute to 3 minutes ;
A method for producing a thin film transistor, comprising: Forming a gate electrode on an insulating substrate;
Forming a gate insulating layer on the gate electrode;
Forming a source electrode and a drain electrode on the gate insulating layer;
Forming a semiconductor layer containing an oxide so as to cover part of the source electrode and the drain electrode;
Irradiating the surface of the semiconductor layer with N ₂ O plasma at an input power of 100 W to 200 W for 1 minute to 3 minutes ;
A method for producing a thin film transistor, comprising: Wherein after irradiating the N _{2 O} plasma on the surface of the semiconductor layer, a thin film transistor manufacturing method according to claim 6 or 7 characterized by having a step of forming a protective layer on the semiconductor layer. Image display comprising an array of thin film transistor according to any one of claims 1 to 5, a pixel electrode connected to the source electrode or the drain electrode of the array, and an image display medium disposed on the pixel electrode apparatus. The image display device according to claim 9 , wherein the image display medium is an electrophoretic type.

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