JP5645737B2 - Thin film transistor structure and display device - Google Patents

Description

  The present invention relates to a thin film transistor including an oxide for a semiconductor layer of a thin film transistor (TFT) used in a display device such as a liquid crystal display or an organic EL display, and a display device.

  Amorphous (amorphous) oxide semiconductors have high carrier mobility compared to general-purpose amorphous silicon (a-Si), a large optical band gap, and can be deposited at low temperatures, resulting in large size, high resolution, and high speed. It is expected to be applied to next-generation displays that require driving and resin substrates with low heat resistance.

  Among oxide semiconductors, an amorphous oxide (In-Ga-Zn-O, hereinafter sometimes referred to as "IGZO") made of indium, gallium, zinc, and oxygen has a very high carrier mobility. Therefore, it is preferably used. For example, Non-Patent Documents 1 and 2 use an IGZO semiconductor thin film of In: Ga: Zn = 1.1: 1.1: 0.9 (atomic% ratio) as a semiconductor layer (active layer) of a thin film transistor (TFT). What has been disclosed. On the other hand, in order to further improve the performance of TFTs, there is an urgent need to provide an oxide semiconductor having extremely high mobility exceeding IGZO. For example, in the amorphous oxide (In-Zn-Sn-O, which may be referred to as “InZTO” hereinafter) composed of indium, zinc, tin, and oxygen described in Non-Patent Documents 3 and 4, the movement is higher than that of IGZO. The degree characteristic is shown.

Solid Physics, VOL44, P621 (2009) Nature, VOL432, P488 (2004) Applied Physics Letters, Vol. 95, 072104 (2009) The Proceedings of The 17th International Display Works (IDW'10), AMD5 / OLED6-2, p631 (2010) J. et al. Park et al., Appl. Phys. Lett. , 1993, 053505 (2008).

  In the case where an oxide semiconductor is used as a semiconductor layer of a thin film transistor (TFT), it is required not only to have a high carrier concentration but also to have excellent TFT switching characteristics (transistor characteristics). Specifically, in addition to high mobility, (1) on-current (maximum drain current when a positive voltage is applied to the gate electrode and drain electrode) is high, and (2) off-current (negative on the gate electrode). (3) SS (Subthreshold Swing, subthreshold swing, gate voltage required to increase the drain current by one digit) is low, and (3) The drain current when the positive voltage is applied to the drain voltage is low. 4) When a voltage or light irradiation load is applied for a long time, a threshold value (a voltage at which a positive voltage is applied to the drain electrode and a positive or negative voltage is applied to the gate voltage, the drain current starts to flow. Called) is stable and does not change (meaning that it is uniform within the substrate surface).

  Further, when an oxide semiconductor is used as a semiconductor layer, the surface of the oxide semiconductor is greatly damaged in the TFT manufacturing process, and defects such as oxygen desorption occur, resulting in a significant shift in threshold voltage and a decrease in switching characteristics. For this reason, improvement in damage resistance of the oxide semiconductor surface during film formation is also required. Such damage is seen, for example, when a protective film or source / drain electrodes are formed on the top of an oxide semiconductor. Hereinafter, damage that the surface of the oxide semiconductor suffers when the protective film is formed will be described in detail.

The protective film is formed on the surface (upper part) of the oxide semiconductor in order to stably obtain TFT characteristics. In general, an insulator oxide film such as SiO _x , SiN _x , SiON, or AlO _x is often used as the protective film.

For the formation of the protective film, a plasma CVD method or a sputtering method is usually used. For example, as a method for forming a protective film of SiO _x by plasma CVD, a mixed gas of SiH ₄ and N ₂ O is reacted in high-frequency plasma with an industrial frequency of 13.56 MHz to form SiO _x , and an oxide semiconductor film Methods such as depositing on top are performed.

  However, when a protective film is formed by a plasma CVD method, radicals and molecules accelerated by the plasma collide with the surface of the oxide semiconductor, so that a defect (typically, an oxygen Desorption etc.) may be formed. Such a defect on the surface of the oxide semiconductor is similarly seen when a sputtering method is used. Specifically, gas components used when forming a protective film by plasma CVD or sputtering, or molecules that are sputtered and accelerated at high speed collide with the surface of the oxide semiconductor, and oxygen in the oxide semiconductor is desorbed. The phenomenon of separation occurs. As a result, there arises a problem that the surface of the oxide semiconductor layer becomes conductive. This is probably because oxygen vacancies generated on the surface of the oxide semiconductor become electron donors. Defects on the surface of the oxide semiconductor typified by oxygen desorption cause excessive increase of carriers in the oxide semiconductor film, the oxide film becomes a conductor and does not show switching characteristics, or the threshold voltage is large and negative. The TFT characteristics are seriously affected.

Therefore, in order to prevent deterioration of TFT characteristics due to defects (damage) on the surface of the oxide semiconductor during the formation of the protective film, Non-Patent Document 5 discloses that N ₂ O plasma is applied to the surface of the oxide semiconductor immediately before the protective film is formed. Has been proposed in which the surface of the oxide semiconductor is excessively oxidized in advance. However, in this method, it is difficult to adjust the N ₂ O plasma processing conditions (input power, time, substrate temperature, etc.) and the film forming conditions of the protective film, the film quality of the oxide semiconductor thin film, and the film quality of the oxide semiconductor However, since the N ₂ O plasma treatment conditions change, tuning is very difficult. In addition, since the process margin is not wide, when manufacturing TFTs with a large substrate, the yield decreases due to non-uniform distribution (in-plane variation) in the substrate surface or characteristics changing from batch to batch. There is a fear. Furthermore, in the above method, since it is necessary to add an N ₂ O plasma processing step before forming the protective film, there are problems such as newly installing a chamber for N ₂ O plasma processing, a decrease in productivity, and an increase in production cost.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to easily and reliably prevent deterioration of TFT characteristics due to defects (damage) on the surface of an oxide semiconductor when a protective film is formed on the oxide semiconductor. It is an object of the present invention to provide a novel technique that can reduce the manufacturing cost, improve the productivity, and improve the yield.

The thin film transistor structure of the present invention that has solved the above problems is used for a semiconductor layer of a thin film transistor, and includes an In—Zn—Sn oxide containing a metal element of In, Zn, and Sn; and the In—Zn—Sn oxidation. The surface layer is formed on the top of the object, and the surface layer before forming the protective film is detected by X-ray photoelectron spectroscopy (XPS), and the peak energy intensity attributed to 1s electrons (O1s) of oxygen is peaked. When obtained by separation, it has a gist where it satisfies the relationship of the following formula (1).
B / (A + B) ≧ 0.33 (1)
Where
A is the intensity of the peak energy of O1s bonded to the metal element,
B means the intensity of the peak energy of O1s bonded to the nonmetallic element of C and / or H.

  In a preferred embodiment of the present invention, when the Zn and Sn contents (atomic%) contained in the In—Zn—Sn oxide are [Zn] and [Sn], respectively, [Zn] / ([Zn ] + [Sn]) is 0.6 or more.

  In a preferred embodiment of the present invention, when the In content (atomic%) in the In—Zn—Sn oxide is [In], [Zn] / ([Zn] + [Sn] + [In ]) Is 0.83 or less.

  In a preferred embodiment of the present invention, when the contents (atomic%) of In, Zn, and Sn contained in the In—Zn—Sn oxide are [In], [Zn], and [Sn], respectively. The ratio of [In] / ([In] + [Zn] + [Sn]) is 0.05 or more and 0.3 or less.

  In a preferred embodiment of the present invention, the surface layer has a thickness of 10 nm or less.

  The present invention includes a display device including any of the thin film transistor structures described above.

According to the present invention, degradation of TFT characteristics due to defects (damage) on the surface of an oxide semiconductor that occurs when a protective film, a source-drain electrode, or the like is formed on the top of an oxide semiconductor during the manufacturing process of the TFT is reduced. It was possible to provide a TFT including an InZTO semiconductor. Specifically, after the oxide semiconductor is formed, a simple process such as heating and holding the surface of the oxide semiconductor for a predetermined time, for example, immediately before a process to be protected (for example, immediately before forming a protective film, a source-drain electrode, or the like) is performed. A predetermined surface layer (which further contains O, C, and H in addition to In, Zn, and Sn) that can effectively prevent the above damage could be easily produced simply by carrying out the above process. When the thin film transistor of the present invention is used, damage to the surface of the oxide semiconductor is reduced, so that a display device that is excellent in TFT switching characteristics (TFT characteristics), stable and highly reliable can be obtained. Further, even if a pretreatment (N ₂ O plasma treatment or the like) before forming a protective film is performed as in the prior art, variations in the substrate surface due to N ₂ O plasma irradiation can be reduced.

FIG. 1 is a schematic cross-sectional view for explaining the configuration of a thin film transistor in the manufacturing process of the embodiment. FIG. 2 is a diagram showing the results (O1s peak energy intensities A and B) of XPS for each sample having InZTO films with different [Zn] / ([Zn] + [Sn]) ratios. FIG. 3 shows the result of performing XPS before and after the surface layer formation on the sample having an InZTO film with a ratio of [Zn] / ([Zn] + [Sn]) of 0.75 by changing the O1s photoelectron extraction angle. FIG. FIG. 4A shows the TFT characteristics after forming a protective film depending on the presence or absence of a surface layer for each sample having an InZTO film with a ratio of [Zn] / ([Zn] + [Sn]) of 0.5 or 0.6. It is a figure which shows how it changes. FIG. 4B shows the TFT characteristics after formation of the protective film for each sample having an InZTO film with a ratio of [Zn] / ([Zn] + [Sn]) of 0.75 or 0.8 depending on the presence or absence of a surface layer. It is a figure which shows how it changes.

  When the present inventors used an In—Zn—Sn oxide containing In, Zn, and Sn (hereinafter sometimes represented by “InZTO”) as an active layer (semiconductor layer) of a TFT, In order to provide a technology that can easily and reliably reduce degradation of TFT characteristics due to defects (damage) on the surface of an oxide semiconductor that occurs when a protective film, source-drain electrodes, etc. are formed on top of a physical semiconductor. It has been repeated. As a result, in the manufacturing process of the TFT, a protective film containing a predetermined surface layer, specifically, a metal element of In, Zn, and Sn and a non-metal element of O, C, and H is formed on the top of InZTO. When the surface layer before formation was detected by X-ray photoelectron spectroscopy (XPS) and the intensity of peak energy attributed to 1s electrons (O1s) of oxygen was determined by peak separation, the following formula (1 It was found that the intended purpose can be achieved if a surface layer is provided. Such a surface layer is formed by, for example, heating and holding the surface of InZTO in an appropriate atmosphere immediately after forming InZTO and immediately before a process to be protected (for example, immediately before forming a protective film, a source-drain electrode, or the like). The surface layer is formed by appropriately controlling the composition of the metal element contained in InZTO disposed under the surface layer, preferably by a simple process such as applying an appropriate solvent. As a result, the present invention has been completed.

  The present invention will be described in detail below.

  The thin film transistor structure of the present invention includes (A) In—Zn—Sn oxide and (B) a surface layer in order from the substrate side. The characteristic part of the present invention is that (B) satisfying a predetermined requirement is provided.

Specifically, the thin film transistor structure of the present invention includes (A) an In—Zn—Sn oxide containing a metal element of In, Zn, and Sn, which is used for a semiconductor layer of a thin film transistor, and the In—Zn—Sn oxide. It has (B) surface layer in the upper part, the surface layer before protective film formation is detected by X-ray photoelectron spectroscopy (XPS), and the peak energy intensity attributed to 1s electrons (O1s) of oxygen is separated into peaks The peak energy intensity attributed to 1s electrons (O1s) of oxygen satisfies the relationship of the following formula (1).
B / (A + B) ≧ 0.33 (1)
Where
A is the intensity of the peak energy of O1s bonded to the metal element,
B means the intensity of the peak energy of O1s bonded to the nonmetallic element of C and / or H.

  In this specification, the contents (atomic%) of In, Zn, and Sn contained in the In—Zn—Sn oxide are [In], [Zn], and [Sn], respectively. The Zn ratio represented by [Zn] / ([Zn] + [Sn]) is simply referred to as “Zn ratio”, while the ratio of Zn contained in all metal elements ([Zn] / ([Zn] + [Sn] + [In])) is particularly referred to as “Zn ratio in all metal elements”, which may be distinguished from each other. In addition, the ratio of In contained in all metal elements ([In] / ([Zn] + [Sn] + [In]) ratio) may be particularly referred to as “In ratio in all metal elements”.

  Further, in this specification, “excellent damage resistance of the oxide semiconductor surface” means that the surface of the oxide semiconductor generated when a protective film, a source-drain electrode, or the like is formed on the top of the oxide semiconductor in the TFT manufacturing process. This means that the TFT characteristics are prevented from deteriorating due to the defects (damage), and the TFT characteristics (switching characteristics) are good even after the protective film or the like is formed. Here, “having good TFT characteristics” means having good characteristics when the threshold voltage, mobility, and SS value are measured by the method described in Examples described later.

  Hereinafter, each requirement will be described in detail.

(A) About In—Zn—Sn Oxide The In—Zn—Sn oxide is used for a semiconductor layer of a transistor and contains a metal element of In, Zn, and Sn. Regarding the metal elements (In, Zn, Sn) constituting the In-Zn-Sn oxide, the ratio between the metals is within a range in which the oxide containing these metals has an amorphous phase and exhibits semiconductor characteristics. Although there is no particular limitation as long as it is present, it is preferable that the composition ratio of each metal element is appropriately controlled in order to form a predetermined surface layer.

  That is, the present inventors have conducted detailed studies on how the metal elements constituting InZTO affect the TFT characteristics, the oxide semiconductor surface damage, and the like. As a result, (a) the Zn ratio greatly contributes to the formation of a surface layer (details will be described later) useful for improving the damage resistance of the oxide semiconductor surface by mitigating the damage and the like that the oxide semiconductor surface suffers during film formation. (B) On the other hand, it has been found that when the Zn ratio in all the metal elements increases, the etching rate increases and control of wet etching becomes difficult. In addition, (c) In is an element that contributes to improving the mobility. However, if added in a large amount, the switching characteristics are remarkably reduced. To prevent this decrease, there is a problem that the sputtering rate is reduced if the oxygen partial pressure is increased. Thus, it has been found that it is effective to appropriately control the In ratio in all the metal elements in order to satisfactorily exhibit both the TFT characteristics and the sputtering rate.

  First, the ratio (Zn ratio) of [Zn] / ([Zn] + [Sn]) is preferably 0.6 or more. Thereby, since a desired surface layer is formed, the damage resistance of the oxide semiconductor surface is improved, and good TFT characteristics are obtained. A more preferable Zn ratio is 0.63 or more, and further preferably 0.65 or more. In addition, it is preferable to control appropriately the upper limit of Zn ratio by relationship with Zn ratio in all the metal elements mentioned later.

  The ratio of [Zn] / ([Zn] + [Sn] + [In]) (Zn ratio in all metal elements) is preferably 0.83 or less. Thereby, good wet etching property is obtained. From the viewpoint of wet etching property, the smaller the Zn ratio in all metal elements, the better. For example, it is more preferably 0.8 or less, and further preferably 0.75 or less. In addition, it is preferable to control appropriately the minimum of Zn ratio in all the metal elements in relation to Zn ratio mentioned above.

  The ratio [In] / ([In] + [Zn] + [Sn]) (In ratio in all metal elements) is preferably 0.05 or more and 0.3 or less. In is an element that contributes to the improvement of mobility, and high mobility can be secured by setting the preferable In ratio in all metal elements to 0.05 or more. A more preferable In ratio in all metal elements is 0.1 or more, and further preferably 0.15 or more. However, when the In ratio in all metal elements increases, the threshold voltage becomes a large negative value. Therefore, it is necessary to increase the oxygen partial pressure to increase the threshold voltage. However, as the oxygen partial pressure increases, the sputtering rate is increased. descend. In order to switch the TFT and secure a high sputter rate, it is preferable that the In ratio in all metal elements is 0.3 or less. The In ratio in all metal elements is more preferably 0.28 or less, and still more preferably 0.25 or less.

(B) About surface layer The surface layer is formed in the surface (outermost surface) of InZTO mentioned above. The thickness of the surface layer is preferably about 10 nm or less with respect to the InZTO (thickness is about 30 to 200 nm). When the thickness of the surface layer exceeds 10 nm, problems such as an increase in contact resistance between the source-drain electrode and the semiconductor occur. In order to effectively exhibit the above-described action by forming the surface layer, the thickness of the surface layer is preferably 1 nm or more. The thickness of the surface layer is more preferably 1 nm or more and 5 nm or less.

When the surface layer is detected by X-ray photoelectron spectroscopy (XPS) and the peak energy intensity attributed to 1s electrons (O1s) of oxygen is determined by peak separation, It satisfies the relationship 1).
B / (A + B) ≧ 0.33 (1)
Where
A is the intensity of the peak energy of O1s bonded to the metal element,
B means the intensity of the peak energy of O1s bonded to the nonmetallic element of C and / or H.

  XPS is known as a method that can measure the energy distribution of photoelectrons emitted by X-ray irradiation and detect the type, abundance, chemical bonding, etc. of the elements on the sample surface (depth of several nanometers) nondestructively. ing. According to the experiment results of the present inventors, the bonding state of oxygen (O) when the surface layer before the protective film formation is detected by XPS has a close correlation with the damage resistance of the oxide semiconductor surface. Turned out to be. Specifically, with respect to the peak energy (O1s) attributed to the oxygen 1s electron (O1s photoelectron), the peak energy A of the O1s photoelectron combined with the metal component of InZTO and the peak of the O1s photoelectron combined with the nonmetallic component of the surface layer. Numerous basic experiments by the present inventors have revealed that the energy B and the Q value [B / (A + B)] represented by can be an extremely useful index for improving the damage resistance of the oxide semiconductor surface. .

  In the above formula (1), A is the intensity of the peak energy of O1s combined with the metal element constituting the surface layer before forming the protective film. O1s bonded to a metal element includes those bonded only to the metal element [for example, an oxide of metal element (oxidized In, Zn oxide, Sn oxide)]. Therefore, a metal element and a non-metal element other than O (C, H, etc.) [for example, a metal element hydroxide (In hydroxide, Zn hydroxide, Sn hydroxide), etc.] will be described later. include. The above A is detected approximately in the vicinity of 530 eV. The exact detection position differs depending on the bonding state with the metal element, the XPS measurement conditions, and the like, but is generally within the range of 530 eV ± 0.5 eV.

  B is the intensity of the peak energy of O1s bonded to the nonmetallic element contained in the surface layer before forming the protective film. The nonmetallic element includes O and C and / or H. Specifically, the surface layer may contain all of O, C, and H, or may contain O and C or O and H. For example, CO, COH, COOH, OH and the like are exemplified. In addition, B includes a metal element and a non-metal element other than O (such as C and H) [for example, metal element hydroxide (In hydroxide, Zn hydroxide, Sn hydroxide, etc.)] It is. O1s bonded to nonmetallic elements does not include those bonded only to metallic elements, and this is included in A described above. The above B is generally detected in the vicinity of 531.5 eV. The exact detection position varies depending on the bonding state with the metal element, the XPS measurement conditions, and the like, but is generally within the range of 531.5 eV ± 0.5 eV.

  As described repeatedly, the ratio (Q value) of “B / (A + B)” expressed by the above formula (1) is a parameter closely related to the improvement of damage resistance on the surface of the oxide semiconductor. It was derived from many basic experiments. It has been demonstrated that the above characteristics are improved when the Q value is 0.33 or more (see Examples described later). The higher the Q value, the better, for example, preferably 0.35 or more, and more preferably 0.4 or more. However, when the Q value is increased, problems such as an increase in contact resistance between the source and drain and the semiconductor occur. The Q value is more preferably 2.3 or less, and even more preferably 2.0 or less.

Here, the measurement conditions of XPS used in the present invention are as follows.
X-ray source: Al Kα (1486.6 eV)
Photoelectron extraction angle: 45 °

  The determination of the Q value has two major influences: the type of X-ray source and the photoelectron extraction angle. As the photoelectron take-off angle becomes smaller, the energy distribution of photoelectrons existing in the vicinity of the outermost surface is detected more, so that the Q value changes greatly depending on the photoelectron take-out angle. In measuring the Q value, the photoelectron take-off angle is 45 °, but it is not strictly required to be 45 °, and is acceptable within a range of 45 ° ± 10 °.

  The Q value is hardly affected by the measuring device or the like. In the examples to be described later, Quantera SXM manufactured by ULVAC PHI was used as a measurement device. However, the present invention is not limited to this, and the Q value is obtained even when another detection device is used. By setting it to 0.33 or more, damage resistance of the oxide semiconductor surface is improved.

  The surface layer further contains (A) nonmetallic elements of O, C, and H in addition to the metallic elements of In, Zn, and Sn derived from InZTO. This nonmetallic element is introduced into the outermost surface of (A) InZTO in the process of forming the surface layer (details will be described later). Here, the non-metallic element includes at least O, and any one of C and H may be included. Further, the composition of the metal element in the surface layer may be the same as or slightly different from the preferred composition of (A) InZTO described above. This is because the ratio of the metal element in the surface layer may slightly vary depending on the formation conditions of the surface layer.

  When such a surface layer is provided on the surface of InZTO, damage due to plasma or the like during formation of a protective film or source / drain electrodes is reduced, so that damage resistance of the oxide semiconductor surface is improved. That is, when a protective film or the like is formed by plasma CVD or sputtering, radicals and molecules accelerated by plasma collide with the surface of the oxide semiconductor, so that oxygen defects are formed on the surface and TFT characteristics deteriorate. Invite. In the present invention, by using InZTO preferably having an appropriate composition ratio for the semiconductor layer of the TFT, a desired surface layer (in addition to the base metal components Zn, Sn, In, O, C, H) and oxygen defects on the oxide surface formed by damage such as plasma can be suppressed.

In order to form the surface layer, after forming the oxide semiconductor, immediately before the process to be protected (for example, immediately before forming a protective film, a source-drain electrode, or the like), the surface of the oxide semiconductor is subjected to an appropriate atmosphere. (Temperature, humidity, etc.) are held for a predetermined time or an appropriate solvent is applied. In the present invention, variation in the substrate surface due to N ₂ O plasma irradiation can be reduced even if a pre-treatment (N ₂ O plasma treatment or the like) before forming a protective film is performed as in the prior art.

(C) Protective film The protective film is formed on the surface (upper part) of the oxide semiconductor in order to ensure the TFT characteristics stably. The type of the protective film used in the present invention is not particularly limited, and those commonly used in display devices can be used. For example, it is preferable to use SiOx, SiNx, SiON, or the like.

  The thin film transistor of the present invention has been described above.

  The oxide (InZTO) used in the present invention is formed by sputtering using a sputtering target (hereinafter also referred to as “target”). Although an oxide can be formed by a chemical film formation method such as a coating method, a thin film excellent in in-plane uniformity of components and film thickness can be easily formed by a sputtering method.

  As a target used in the sputtering method, it is preferable to use a sputtering target containing the above-mentioned elements and having the same composition as the desired oxide, thereby forming a thin film having a desired component composition without fear of composition deviation. Can do.

Alternatively, a film may be formed using a co-sputtering method (Co-Sputter method) in which two targets having different compositions are discharged at the same time, and the desired power density can be adjusted by adjusting the input power density applied to each target at the time of discharging. An oxide semiconductor film having the composition can be formed. For example, an InZTO film can be obtained by simultaneously discharging a target such as In ₂ O ₃ , ZnO, SnO ₂ or a mixture thereof.

  The target can be manufactured by, for example, a powder sintering method.

  Sputtering using the above target is preferably performed by setting the substrate temperature to room temperature and appropriately controlling the amount of oxygen (oxygen partial pressure) added to the total atmospheric gas. The amount of oxygen can be controlled, for example, by adjusting the amount of oxygen added in the process gas during sputtering film formation.

Specifically, it may be appropriately controlled according to the configuration of the sputtering apparatus, the target composition, and the like, but the oxygen partial pressure during sputtering is approximately 10 ¹⁵ to 10 ¹⁶ cm ⁻³ of the carrier density of the oxide semiconductor. It is preferable to control the oxygen amount. In the examples described later, the oxygen addition amount was O ₂ / (Ar + O ₂ ) = 2% in terms of the addition flow rate ratio.

  A preferable thickness of the oxide formed as described above is 30 nm to 200 nm, and more preferably 30 nm to 150 nm.

  The present invention includes a TFT including the above oxide as a semiconductor layer of the TFT. The TFT is not particularly limited as long as it has at least a gate electrode, a gate insulating film, the above-described oxide semiconductor layer, a source electrode, and a drain electrode on a substrate.

  Hereinafter, an embodiment of the TFT manufacturing method will be described with reference to FIG. The TFT shown in FIG. 1 shows the TFT configuration (stacking order) in the manufacturing process of the following embodiment, and does not correctly reflect the layer configuration of the TFT finally obtained. Although FIG. 1 shows a configuration in which the protective film 6 is formed on the surface layer 9, the surface layer 9 may not exist in the positional relationship shown in FIG. 1 due to subsequent thermal history or the like. obtain.

  1 and the following manufacturing method show an example of a preferred embodiment of the present invention, and are not intended to limit the present invention. For example, in the following, a method for forming a surface layer immediately after the formation of the oxide film after forming the oxide semiconductor with the aim of reducing damage due to the formation of the protective film is shown, but the present invention is not limited to this. The time for forming the surface layer can be appropriately changed depending on the purpose. For example, when reducing damage due to the formation of the source-drain electrodes, it is preferable to form a surface layer immediately after the formation of the oxide semiconductor and immediately before the formation of the source-drain electrodes, and then the source-drain electrodes and the protective film May be formed sequentially. 1 illustrates a bottom-gate TFT, the present invention is not limited thereto, and a top-gate TFT including a gate insulating film and a gate electrode in this order over an oxide semiconductor layer may be used.

  As shown in FIG. 1, a gate electrode 2 and a gate insulating film 3 are formed on a substrate 1, and an oxide semiconductor layer 4 is formed thereon. A source / drain electrode 5 is formed on the oxide semiconductor layer 4, a protective film (insulating film) 6 is formed thereon, and the transparent conductive film 8 is electrically connected to the drain electrode 5 through the contact hole 7. Has been.

The method for forming the gate electrode 2 and the gate insulating film 3 on the substrate 1 is not particularly limited, and a commonly used method can be employed. Further, the types of the gate electrode and the gate insulating film 3 are not particularly limited, and those commonly used can be used. For example, as the gate electrode 2, an Al or Cu metal having a low electrical resistivity or an alloy thereof can be preferably used. The gate insulating film 3 is typically exemplified by a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and the like. In addition, a metal oxide such as Al ₂ O ₃ or Y ₂ O ₃ or a laminate of these can be used.

  Next, the oxide semiconductor layer 4 is formed. As described above, the oxide semiconductor layer 4 is preferably formed by a DC sputtering method or an RF sputtering method using a sputtering target having the same composition as the thin film. Alternatively, the film may be formed by co-sputtering.

  Next, the oxide semiconductor layer 4 is subjected to wet etching and then patterned. Immediately after the patterning, it is preferable to perform heat treatment (pre-annealing) for improving the film quality of the oxide semiconductor layer 4 so that the on-state current and field-effect mobility of the transistor characteristics are increased and the transistor performance is improved. Become.

  After pre-annealing, source / drain electrodes 5 are formed. The type of the source / drain electrode 5 is not particularly limited, and a commonly used one can be used. For example, a metal or an alloy such as Al, Ti, or Cu may be used similarly to the gate electrode 2, or pure Mo may be used as in the examples described later.

  As a method for forming the source / drain electrodes 5, for example, a metal thin film can be formed by a magnetron sputtering method and then formed by a lift-off method. Alternatively, instead of forming the electrode by the lift-off method as described above, there is a method in which a predetermined metal thin film is formed in advance by a sputtering method and then the electrode is formed by patterning. In this method, the electrode is etched. Since the oxide semiconductor layer is damaged, transistor characteristics are deteriorated. Therefore, in order to avoid such a problem, a method of forming a protective film on the oxide semiconductor layer in advance and then forming an electrode and patterning is also employed, and this method is employed in the examples described later. did.

  After the source / drain electrode 5 is formed as described above, a predetermined surface layer 9 is formed on the upper portion (outermost surface). The surface layer 9 is heated and held (for example, held at a temperature of about 25 to 100 ° C. for about 50 to 200 hours) in an appropriate atmosphere (in the atmosphere, such as an atmosphere of humidity 40 to 80%), or appropriate It can be formed by applying a suitable solvent.

Next, a protective film (insulating film) 6 is formed on the surface layer 9 by a CVD (Chemical Vapor Deposition) method. In Examples described later, as described in Non-Patent Document 5, N ₂ O plasma irradiation was performed before the formation of the protective film. Note that in the present invention, since the surface layer 9 is provided on the oxide semiconductor layer 4, defects (such as variations in the substrate surface) due to N ₂ O plasma irradiation can be reduced.

  Next, based on a conventional method, the transparent conductive film 8 is electrically connected to the drain electrode 5 through the contact hole 7. The types of the transparent conductive film and the drain electrode are not particularly limited, and commonly used ones can be used. As the drain electrode, for example, those exemplified for the source / drain electrodes described above can be used.

  Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited by the following examples, and can be implemented with modifications within a range that can meet the purpose described above and below. They are all included in the technical scope of the present invention.

Example 1
In this example, when XPS was performed on samples having various InZTOs with different [Zn] / ([Zn] + [Sn]) ratios (Zn ratios) and the surface state of the samples was analyzed, the sample was bonded to metal elements. It was investigated how the intensity A of the peak energy of O1s that changes and the intensity B of the peak energy of O1s that binds to the nonmetallic element change.

First, on a glass substrate (Corning Eagle 2000, diameter 100 mm × thickness 0.7 mm), various InZTO thin films having different Zn ratios [Zn ratio = 0.5, 0.6, 0, as shown in FIG. .75, 0.8, and the In ratio in all metal elements is 0.2]] was formed by a sputtering method using a sputtering target. The details of the sputtering conditions are as follows.
Equipment: “CS-200” manufactured by ULVAC, Inc.
Substrate temperature: room temperature Gas pressure: 5 mTorr
Oxygen partial pressure: O ₂ / (Ar + O ₂ ) = 2%
Film thickness: 50nm
Use φ4 inch x 5mm as sputtering target

  After the InZTO film was formed as described above, a pre-annealing process was performed to improve the film quality. Pre-annealing was performed at 350 ° C. for 1 hour under atmospheric pressure.

  Furthermore, in order to form a surface layer on the outermost surface of the InZTO film, it was kept at 25 ° C. for 200 hours in an air atmosphere with a humidity of 50%. As a result, a sample having a surface layer with a thickness of about 2 nm on the outermost surface of the InZTO film was obtained.

About each sample obtained in this way, each content of the metal element in an InZTO film | membrane and the surface state of the surface layer formed in the outermost surface of an InZTO film | membrane were analyzed by XPS method. All of these were measured under the same conditions. The measurement conditions are shown below.
X-ray source: Al Kα (1486.6 eV)
Photoelectron extraction angle: 45 °
Apparatus: Quantera SXM manufactured by ULVAC PHI

  FIG. 2 collectively shows the O1s spectrum of each sample. For reference, for each spectrum, the position of the peak energy of O1s bonded to the metal element (Peak A) and the position of the peak energy of O1s bonded to the nonmetallic element of C and / or H contained in the surface layer (Peak A). B) is shown respectively.

As shown in FIG. 2, Peak A is observed in the vicinity of 530 eV and Peak B is observed in the vicinity of 531.5 eV in each sample with the Zn ratio = 0.6, 0.75, and 0.8, and a predetermined surface layer is formed. It was confirmed that it was formed. The intensity of each peak was determined by spectral peak separation. The Q value [A / (A + B)] of each sample is as follows.
Q value of Zn ratio = 0.6: 0.33
Q value of Zn ratio = 0.75: 0.41
Q value of Zn ratio = 0.8: 0.59

  In contrast, Peak A was observed in the sample having a Zn ratio of 0.5, but Peak B (near 531.5 eV) bonded to a nonmetallic element was not confirmed, and a predetermined surface layer was not formed. (Q value at this time = 0.26)

  From the above results, it can be seen that it is useful to set the Zn ratio to 0.6 or more in order to obtain a predetermined surface layer.

  Further, in order to investigate how the bonding state of O1s changes depending on the position in the depth direction from the sample, the photoelectron extraction angles are set to 20 °, 45 °, and 90 ° for the above sample having a Zn ratio = 0.75. The XPS before and after the formation of the surface layer was performed under the conditions described above except that the change was made in each of the above ranges, and the spectrum of O1s was examined. In XPS, since the penetration depth of X-rays can be changed by changing the taking-out angle of photoelectrons, information with different depth positions from the surface can be obtained. For example, when the photoelectron take-off angle is 90 °, since X-rays are irradiated from the sample normal (directly above), information from the surface to the deepest position can be obtained, while the photoelectron take-off angle is made small. The more the information is obtained, the information only near the surface can be obtained.

  These results are shown in FIG.

  According to FIG. 3, the intensity of the peak energy in the vicinity of 531.5 eV corresponding to the intensity B was hardly confirmed before the formation of the surface layer (that is, the bonding of O1s depending on the depth direction). On the other hand, after the formation of the surface layer, the intensity of the peak energy in the vicinity of 531.5 eV increases at 20 ° and 45 ° after the surface layer is formed. Was confirmed. The intensity of each peak was determined by spectral peak separation.

For reference, the Q value [B / (A + B)] of each extraction angle is shown below. Here, the Q value of the photoelectron take-off angle = 90 ° is also shown, but it is difficult to say that this Q value correctly reflects the measured value. This is because Peak B is buried in Peak A and Peak B cannot be clearly detected because relatively little information on the vicinity of the surface is relatively obtained at the take-off angle = 90 ° as described above. However, from the following results, it can be read that the peak shape is clearly different between the extraction angle of 20 ° and 90 °, so that the bonding state of O1s is different between the vicinity of the surface of InZTO and the deep region, It was confirmed that a predetermined surface layer was present near the outermost surface of InZTO.
Photoelectron take-off angle = Q value of 20 °: 0.42
Photoelectron take-off angle = Q value of 45 °: 0.38
Photoelectron take-off angle = 90 ° Q factor: 0.28

  Further, when looking at the spectrum after the surface layer is formed, the smaller the photoelectron extraction angle, the greater the intensity of the peak energy in the vicinity of 531.5 eV corresponding to the intensity B. Therefore, the surface layer is composed of an InZTO film (thickness). 50 nm) is presumed to be formed only in the vicinity of the outermost surface (approximately 10 nm or less).

Example 2
In this example, how the TFT characteristics after forming the protective film change depending on the presence or absence of the surface layer used in the present invention was examined using the thin film transistor (TFT) shown in FIG. Here, as in Example 1 described above, the [Zn] / ([Zn] + [Sn]) ratio (Zn ratio) = 0.5, 0.6, 0.75, 0.8 InZTO film ( Experiments were conducted using samples having an In ratio of 0.2) in all metal elements.

First, an Mo thin film of 100 nm and a gate insulating film SiO ₂ (250 nm) were sequentially formed as a gate electrode on a glass substrate (Corning Eagle 2000, diameter 100 mm × thickness 0.7 mm). As the gate electrode, a pure Mo sputtering target was used, and a film was formed by DC sputtering at a film forming temperature: room temperature, a film forming power: 300 W, a carrier gas: Ar, and a gas pressure: 2 mTorr. The gate insulating film was formed by plasma CVD using a carrier gas: a mixed gas of SiH ₄ and N ₂ , film formation power: 100 W, and film formation temperature: 300 ° C.

Next, as shown in FIGS. 4A and 4B, InZTO films having various compositions with different Zn ratios were formed by a sputtering method using a sputtering target (described later). The apparatus used for sputtering is “CS-200” manufactured by ULVAC, Inc., and the sputtering conditions are as follows.
Substrate temperature: room temperature Gas pressure: 5 mTorr
Oxygen partial pressure: O ₂ / (Ar + O ₂ ) = 2%
Film thickness: 50nm

  After various InZTO films were formed as described above, patterning was performed by photolithography and wet etching. As the wet etchant liquid, “ITO-07N” manufactured by Kanto Chemical Co., Ltd. was used, and the liquid temperature was set to 40 ° C. After the wet etching, the presence or absence of the residue was confirmed by visual observation and optical microscope observation (magnification 50 times). As a result, no residue due to the wet etching was observed in all the InZTO films, and it was confirmed that the etching was appropriately performed.

  After patterning the InZTO film as described above, a pre-annealing process was performed in order to improve the film quality. Pre-annealing was performed at 350 ° C. for 1 hour under atmospheric pressure.

  Next, pure Mo was used to form source / drain electrodes by a lift-off method. Specifically, after patterning using a photoresist, a Mo thin film was formed by DC sputtering (film thickness was 100 nm). The method for forming the Mo thin film for the source / drain electrodes is the same as that for the gate electrode described above. Next, it was immersed in acetone, and unnecessary photoresist was removed by applying an ultrasonic cleaner, so that the channel length of the TFT was 10 μm and the channel width was 200 μm.

  Subsequently, in order to form a surface layer on the outermost surface of the InZTO film, it was kept at 25 ° C. for 200 hours in an air atmosphere with a humidity of 50%. As a result, a sample having a surface layer with a thickness of about 2 nm on the outermost surface of the InZTO film was obtained.

Next, a protective film for protecting the InZTO film was formed. As the protective film, a laminated film (total film thickness 400 nm) of SiO ₂ (film thickness 200 nm) and SiN (film thickness 200 nm) was used. The formation of SiO ₂ and SiN was performed using “PD-220NL” manufactured by Samco and using the plasma CVD method. In this example, after performing plasma treatment with N ₂ O gas, SiO ₂ and SiN films were sequentially formed. A mixed gas of N ₂ O and SiH ₄ was used for forming the SiO ₂ film, and a mixed gas of SiH ₄ , N ₂ , and NH ₃ was used for forming the SiN film. In any case, the film formation power was 100 W and the film formation temperature was 150 ° C.

  Next, contact holes for probing for transistor characteristic evaluation were formed in the protective film by photolithography and dry etching. Next, an ITO film (film thickness: 80 nm) is formed by DC sputtering using a carrier gas: a mixed gas of argon and oxygen gas, film formation power: 200 W, gas pressure: 5 mTorr, and the TFT of FIG. 1 is manufactured. did.

  In this example, in order to investigate the influence of the surface layer on the TFT characteristics, for the purpose of comparison, the TFT of FIG. 1 was fabricated in the same manner as described above except that the above surface layer formation treatment was not performed.

  The following characteristics were evaluated for each TFT thus obtained.

(1) For measurement of transistor characteristics, a semiconductor parameter analyzer “4156C” manufactured by National Instruments was used. Detailed measurement conditions are as follows.
Source voltage: 0V
Drain voltage: 10V
Gate voltage: -30 to 30V (measurement interval: 0.25V)

(2) Threshold voltage (Vth)
The threshold voltage is roughly a value of a gate voltage when the transistor shifts from an off state (a state where the drain current is low) to an on state (a state where the drain current is high). In this example, the voltage when the drain current is around 1 nA between the on-current and the off-current is defined as the threshold voltage, and the threshold voltage of each TFT is measured.

(3) S value The S value is the minimum value of the gate voltage required to increase the drain current by one digit.

(4) Field Effect Mobility Field effect mobility (carrier mobility) was derived from a TFT characteristic in a saturation region where gate voltage V _g > V _d −V _th . In the saturation region, the field effect mobility μ _SAT is derived from the following plot.
I _d = (W / 2L) × μ × C _i × (V _g −V _th ) ²
Where I _d is the drain current, W is the channel width of the TFT element,
L is the channel length of the TFT element,
μ is saturation mobility, C _i is the capacitance of the gate insulating film,
V _g is a gate voltage, and V _th is a threshold voltage.

  These results are shown in FIGS. 4A and 4B. In these drawings, both the first measurement result and the second measurement result are shown together for the series of characteristics described above. Regarding the two characteristic curves shown in each figure, the left curve means the first measurement result, and the right curve means the second measurement result [left figure in FIG. 4A (Zn ratio = 0.5). )].

  4A and 4B, in the sample in which the protective film is directly formed on the InZTO film without forming the surface layer, the absolute value of the threshold voltage is the same regardless of the Zn ratio. As a result, the switching characteristics deteriorated and the SS value increased. Further, in any case, a hump phenomenon was observed in the vicinity of the rising edge of the current, which causes a great decrease in the stability and reliability of the TFT. The reason why the TFT characteristics of the above sample deteriorated is presumed to be that the surface of the oxide semiconductor was damaged by the plasma irradiation at the time of forming the protective film.

  In contrast, in the sample in which a predetermined surface layer was formed on the InZTO film and then a protective film was formed, the absolute value of the threshold voltage decreased as shown in FIGS. 4A and 4B. Switching characteristics. In particular, the above-described hump phenomenon was not observed in a sample in which the Zn ratio satisfied the preferred range of the present invention (0.6 or more). Therefore, it can be seen that by forming the surface layer on the outermost surface of the InZTO film, the TFT characteristics can be effectively prevented from being deteriorated even in the process of forming the protective film on which the surface of the InZTO film is most easily damaged.

  Furthermore, when the first measurement result and the second measurement result are compared, it is understood that the hysteresis is improved in the sample in which the predetermined surface layer is formed on the InZTO film as compared with the sample having no surface area. . Therefore, also from this result, it was confirmed that the damage to the surface of the InZTO film due to the formation of the protective film could be reduced by forming the predetermined surface layer.

  From the above experimental results, it is preferable to use a sample having an In—Zn—Sn oxide semiconductor that satisfies the composition defined in the present invention and having a predetermined surface layer on the In-Zn—Sn oxide semiconductor. -It has been demonstrated that high-performance TFT characteristics can be obtained without adversely affecting the surface of the oxide semiconductor when forming the drain electrode.

DESCRIPTION OF SYMBOLS 1 Substrate 2 Gate electrode 3 Gate insulating film 4 Oxide semiconductor layer 5 Source / drain electrode 6 Protective film (insulating film)
7 Contact hole 8 Transparent conductive film 9 Surface layer

Claims (6)

An In—Zn—Sn oxide containing a metal element of In, Zn, and Sn used for a semiconductor layer of a thin film transistor; a surface layer on the In—Zn—Sn oxide, and a protection on the surface layer And a membrane ,
When the surface layer before forming the protective film is detected by X-ray photoelectron spectroscopy (XPS), and the intensity of peak energy attributed to 1s electrons (O1s) of oxygen is determined by peak separation, the relationship of the following formula (1) A thin film transistor structure characterized by satisfying
B / (A + B) ≧ 0.33 (1)
Where
A is the intensity of the peak energy of O1s bonded to the metal element,
B means the intensity of the peak energy of O1s bonded to the nonmetallic element of C and / or H. When the contents (atomic%) of Zn and Sn contained in the In—Zn—Sn oxide are [Zn] and [Sn], respectively.
The thin film transistor structure according to claim 1, wherein a ratio of [Zn] / ([Zn] + [Sn]) is 0.6 or more.   When the In content (atomic%) in the In—Zn—Sn oxide is [In], the ratio of [Zn] / ([Zn] + [Sn] + [In]) is 0.83. The thin film transistor structure according to claim 1 or 2, wherein: When the contents (atomic%) of In, Zn, and Sn contained in the In—Zn—Sn oxide are [In], [Zn], and [Sn], respectively.
4. The thin film transistor structure according to claim 1, wherein a ratio of [In] / ([In] + [Zn] + [Sn]) is 0.05 or more and 0.3 or less.   The thin film transistor structure according to claim 1, wherein the surface layer has a thickness of 10 nm or less.   A display device comprising the thin film transistor structure according to claim 1.