JP5606268B2 - 多層配線基板の製造方法 - Google Patents
多層配線基板の製造方法 Download PDFInfo
- Publication number
- JP5606268B2 JP5606268B2 JP2010240610A JP2010240610A JP5606268B2 JP 5606268 B2 JP5606268 B2 JP 5606268B2 JP 2010240610 A JP2010240610 A JP 2010240610A JP 2010240610 A JP2010240610 A JP 2010240610A JP 5606268 B2 JP5606268 B2 JP 5606268B2
- Authority
- JP
- Japan
- Prior art keywords
- metal foil
- resin insulating
- wiring board
- copper foil
- multilayer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0358—Resin coated copper [RCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0228—Cutting, sawing, milling or shearing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
Description
21〜24…樹脂絶縁層
26…導体層
30…配線積層部
45…外部端子としての母基板接続端子
51,71…下側金属箔としての銅箔
52,70…支持基材としての支持基板
53…金属箔付き支持基材としての銅箔付き支持基板
54,72…上側金属箔としての銅箔
55,73…樹脂絶縁材
56…金属箔付き樹脂絶縁基材としての銅箔付きビルドアップ材
60…積層構造体
61…周囲部
Claims (3)
- 複数の樹脂絶縁層と複数の導体層とを交互に積層して多層化した構造を有する多層配線基板の製造方法であって、
下側金属箔を支持基材の表面側に有する金属箔付き支持基材と上側金属箔を樹脂絶縁材の表面側に有する金属箔付き樹脂絶縁材とを準備する準備工程と、
前記金属箔付き樹脂絶縁材における前記上側金属箔の外縁部分を除去する金属箔除去工程と、
前記金属箔付き樹脂絶縁材の前記上側金属箔を前記金属箔付き支持基材の前記下側金属箔に接触させるべく、前記金属箔付き樹脂絶縁材及び前記金属箔付き支持基材を互いに重ね合わせて配置し、前記上側金属箔の外縁部分の除去により露出する前記樹脂絶縁材の外縁部分を前記金属箔付き支持基材の前記下側金属箔に密着させることで、後に前記樹脂絶縁層となるべき前記樹脂絶縁材を前記支持基材上に固定する絶縁層固定工程と、
複数の前記導体層及び複数の前記樹脂絶縁層を積層して、前記多層配線基板となるべき配線積層部を前記金属箔上に有する積層構造体を得る積層工程と、
前記積層工程後、前記配線積層部と該配線積層部よりも外周側に位置する周囲部との境界に沿って前記積層構造体を切断して該周囲部を除去する除去工程と、
前記配線積層部と前記支持基材とを前記2枚の金属箔の界面にて分離する分離工程と
を含むことを特徴とする多層配線基板の製造方法。 - 前記準備工程において、前記樹脂絶縁層と略同じ熱膨張係数の材料を用いて前記支持基材が形成されることを特徴とする請求項1に記載の多層配線基板の製造方法。
- 前記金属箔は銅箔であり、前記分離工程後に前記配線積層部の表面に露出する前記銅箔をパターニングして外部端子を形成する端子形成工程をさらに含むことを特徴とする請求項1または2に記載の多層配線基板の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010240610A JP5606268B2 (ja) | 2010-10-27 | 2010-10-27 | 多層配線基板の製造方法 |
TW100138574A TWI492688B (zh) | 2010-10-27 | 2011-10-25 | 多層配線基板的製造方法 |
US13/281,735 US8826526B2 (en) | 2010-10-27 | 2011-10-26 | Method of manufacturing multilayer wiring substrate |
KR1020110109853A KR101580343B1 (ko) | 2010-10-27 | 2011-10-26 | 다층 배선기판의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010240610A JP5606268B2 (ja) | 2010-10-27 | 2010-10-27 | 多層配線基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012094682A JP2012094682A (ja) | 2012-05-17 |
JP5606268B2 true JP5606268B2 (ja) | 2014-10-15 |
Family
ID=45995079
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010240610A Expired - Fee Related JP5606268B2 (ja) | 2010-10-27 | 2010-10-27 | 多層配線基板の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8826526B2 (ja) |
JP (1) | JP5606268B2 (ja) |
KR (1) | KR101580343B1 (ja) |
TW (1) | TWI492688B (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5606268B2 (ja) * | 2010-10-27 | 2014-10-15 | 日本特殊陶業株式会社 | 多層配線基板の製造方法 |
JP6063183B2 (ja) * | 2012-08-31 | 2017-01-18 | パナソニックIpマネジメント株式会社 | 剥離可能銅箔付き基板及び回路基板の製造方法 |
JP2014130856A (ja) | 2012-12-28 | 2014-07-10 | Kyocer Slc Technologies Corp | 配線基板の製造方法 |
JP2014154794A (ja) * | 2013-02-13 | 2014-08-25 | Ngk Spark Plug Co Ltd | 多層配線基板製造用の支持基板、多層配線基板の製造方法 |
US9147662B1 (en) * | 2013-12-20 | 2015-09-29 | Stats Chippac Ltd. | Integrated circuit packaging system with fiber-less substrate and method of manufacture thereof |
JP2015144150A (ja) * | 2014-01-31 | 2015-08-06 | 京セラサーキットソリューションズ株式会社 | 配線基板の製造方法 |
WO2015118951A1 (ja) * | 2014-02-07 | 2015-08-13 | 株式会社村田製作所 | 樹脂多層基板および部品モジュール |
TWI543685B (zh) * | 2014-04-28 | 2016-07-21 | 旭德科技股份有限公司 | 基板結構及其製作方法 |
CN104540326A (zh) * | 2014-12-31 | 2015-04-22 | 广州兴森快捷电路科技有限公司 | 无芯板制造构件以及无芯板制作方法 |
TWI571994B (zh) * | 2015-06-30 | 2017-02-21 | 旭德科技股份有限公司 | 封裝基板及其製作方法 |
WO2017149811A1 (ja) * | 2016-02-29 | 2017-09-08 | 三井金属鉱業株式会社 | キャリア付銅箔、並びに配線層付コアレス支持体及びプリント配線板の製造方法 |
CN111010797A (zh) * | 2018-10-08 | 2020-04-14 | 中兴通讯股份有限公司 | 电路板、设备及过孔形成方法 |
CN109743840B (zh) * | 2018-12-28 | 2021-05-25 | 广州兴森快捷电路科技有限公司 | 无芯基板及其封装方法 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6495394B1 (en) * | 1999-02-16 | 2002-12-17 | Sumitomo Metal (Smi) Electronics Devices Inc. | Chip package and method for manufacturing the same |
US6736988B1 (en) * | 1999-11-04 | 2004-05-18 | Mitsubishi Gas Chemical Company, Inc. | Copper-clad board suitable for making hole with carbon dioxide laser, method of making hole in said copper-clad board and printed wiring board comprising said copper-clad board |
JP4186756B2 (ja) * | 2003-08-29 | 2008-11-26 | 松下電器産業株式会社 | 回路基板及びその製造方法 |
TW532050B (en) * | 2000-11-09 | 2003-05-11 | Matsushita Electric Ind Co Ltd | Circuit board and method for manufacturing the same |
US6768064B2 (en) * | 2001-07-10 | 2004-07-27 | Fujikura Ltd. | Multilayer wiring board assembly, multilayer wiring board assembly component and method of manufacture thereof |
TWI312166B (en) * | 2001-09-28 | 2009-07-11 | Toppan Printing Co Ltd | Multi-layer circuit board, integrated circuit package, and manufacturing method for multi-layer circuit board |
JP3811680B2 (ja) * | 2003-01-29 | 2006-08-23 | 富士通株式会社 | 配線基板の製造方法 |
US7894203B2 (en) * | 2003-02-26 | 2011-02-22 | Ibiden Co., Ltd. | Multilayer printed wiring board |
JPWO2005048667A1 (ja) * | 2003-11-14 | 2007-11-29 | 株式会社村田製作所 | 導電性ペーストおよび多層セラミック基板 |
JP2005243911A (ja) * | 2004-02-26 | 2005-09-08 | Mitsui Mining & Smelting Co Ltd | 多層積層配線板 |
US7543376B2 (en) * | 2004-10-20 | 2009-06-09 | Panasonic Corporation | Manufacturing method of flexible printed wiring board |
JP2006278774A (ja) * | 2005-03-29 | 2006-10-12 | Hitachi Cable Ltd | 両面配線基板の製造方法、両面配線基板、およびそのベース基板 |
US7381587B2 (en) * | 2006-01-04 | 2008-06-03 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate |
JP2007214427A (ja) * | 2006-02-10 | 2007-08-23 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
JP2009004664A (ja) * | 2007-06-25 | 2009-01-08 | Panasonic Corp | 部品内蔵基板の製造方法 |
JP4994988B2 (ja) * | 2007-07-31 | 2012-08-08 | 京セラSlcテクノロジー株式会社 | 配線基板の製造方法 |
KR100929839B1 (ko) * | 2007-09-28 | 2009-12-04 | 삼성전기주식회사 | 기판제조방법 |
JP5092662B2 (ja) * | 2007-10-03 | 2012-12-05 | 凸版印刷株式会社 | 印刷配線板の製造方法 |
JP4975581B2 (ja) | 2007-10-11 | 2012-07-11 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP5172404B2 (ja) * | 2008-03-13 | 2013-03-27 | 日本特殊陶業株式会社 | 多層配線基板の製造方法、及び多層配線基板の中間製品 |
JP2010004028A (ja) * | 2008-05-23 | 2010-01-07 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法、及び半導体装置 |
JP5328281B2 (ja) * | 2008-10-03 | 2013-10-30 | 三井金属鉱業株式会社 | 多層プリント配線板の製造方法及びその方法を用いて得られる多層プリント配線板 |
JP5606268B2 (ja) * | 2010-10-27 | 2014-10-15 | 日本特殊陶業株式会社 | 多層配線基板の製造方法 |
-
2010
- 2010-10-27 JP JP2010240610A patent/JP5606268B2/ja not_active Expired - Fee Related
-
2011
- 2011-10-25 TW TW100138574A patent/TWI492688B/zh not_active IP Right Cessation
- 2011-10-26 US US13/281,735 patent/US8826526B2/en not_active Expired - Fee Related
- 2011-10-26 KR KR1020110109853A patent/KR101580343B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI492688B (zh) | 2015-07-11 |
KR20120044262A (ko) | 2012-05-07 |
KR101580343B1 (ko) | 2015-12-23 |
US20120102732A1 (en) | 2012-05-03 |
JP2012094682A (ja) | 2012-05-17 |
TW201244578A (en) | 2012-11-01 |
US8826526B2 (en) | 2014-09-09 |
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