JP5554014B2 - 半導体基板の作製方法 - Google Patents

半導体基板の作製方法 Download PDF

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Publication number
JP5554014B2
JP5554014B2 JP2009126714A JP2009126714A JP5554014B2 JP 5554014 B2 JP5554014 B2 JP 5554014B2 JP 2009126714 A JP2009126714 A JP 2009126714A JP 2009126714 A JP2009126714 A JP 2009126714A JP 5554014 B2 JP5554014 B2 JP 5554014B2
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JP
Japan
Prior art keywords
semiconductor layer
substrate
layer
single crystal
flash lamp
Prior art date
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Expired - Fee Related
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JP2009126714A
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English (en)
Japanese (ja)
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JP2010016356A (ja
JP2010016356A5 (enExample
Inventor
幸一郎 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
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Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2009126714A priority Critical patent/JP5554014B2/ja
Publication of JP2010016356A publication Critical patent/JP2010016356A/ja
Publication of JP2010016356A5 publication Critical patent/JP2010016356A5/ja
Application granted granted Critical
Publication of JP5554014B2 publication Critical patent/JP5554014B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2009126714A 2008-06-04 2009-05-26 半導体基板の作製方法 Expired - Fee Related JP5554014B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009126714A JP5554014B2 (ja) 2008-06-04 2009-05-26 半導体基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008146914 2008-06-04
JP2008146914 2008-06-04
JP2009126714A JP5554014B2 (ja) 2008-06-04 2009-05-26 半導体基板の作製方法

Publications (3)

Publication Number Publication Date
JP2010016356A JP2010016356A (ja) 2010-01-21
JP2010016356A5 JP2010016356A5 (enExample) 2012-05-17
JP5554014B2 true JP5554014B2 (ja) 2014-07-23

Family

ID=41400699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009126714A Expired - Fee Related JP5554014B2 (ja) 2008-06-04 2009-05-26 半導体基板の作製方法

Country Status (5)

Country Link
US (1) US7883988B2 (enExample)
JP (1) JP5554014B2 (enExample)
KR (1) KR101642335B1 (enExample)
CN (1) CN101599453B (enExample)
TW (1) TWI445060B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2299476A4 (en) * 2008-06-26 2011-08-03 Ihi Corp METHOD AND APPARATUS FOR LASER RECEIVER
JP5540476B2 (ja) * 2008-06-30 2014-07-02 株式会社Ｉｈｉ レーザアニール装置
US8907258B2 (en) 2010-04-08 2014-12-09 Ncc Nano, Llc Apparatus for providing transient thermal profile processing on a moving substrate
WO2012014786A1 (en) * 2010-07-30 2012-02-02 Semiconductor Energy Laboratory Co., Ltd. Semicondcutor device and manufacturing method thereof
EP2490073B1 (en) 2011-02-18 2015-09-23 ASML Netherlands BV Substrate holder, lithographic apparatus, and method of manufacturing a substrate holder
US10150230B2 (en) * 2011-04-08 2018-12-11 Ncc Nano, Llc Method for drying thin films in an energy efficient manner
CN109298602B (zh) 2012-02-03 2021-10-15 Asml荷兰有限公司 衬底保持器和光刻装置
US20130344688A1 (en) * 2012-06-20 2013-12-26 Zhiyuan Ye Atomic Layer Deposition with Rapid Thermal Treatment
US9496257B2 (en) 2014-06-30 2016-11-15 International Business Machines Corporation Removal of semiconductor growth defects
US11469079B2 (en) * 2017-03-14 2022-10-11 Lam Research Corporation Ultrahigh selective nitride etch to form FinFET devices
CN111903020B (zh) * 2018-03-26 2022-08-09 三菱电机株式会社 半导体装置的制造方法
WO2020179637A1 (ja) * 2019-03-01 2020-09-10 京セラ株式会社 セラミック構造体および該セラミック構造体を備えてなる支持機構

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764936A (en) 1980-10-09 1982-04-20 Ushio Inc Annealing device
JPS6235512A (ja) 1985-08-09 1987-02-16 Agency Of Ind Science & Technol 半導体単結晶薄膜の製造方法
JPH05218367A (ja) 1992-02-03 1993-08-27 Sharp Corp 多結晶シリコン薄膜用基板および多結晶シリコン薄膜の作製方法
JPH10275905A (ja) * 1997-03-31 1998-10-13 Mitsubishi Electric Corp シリコンウェーハの製造方法およびシリコンウェーハ
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JPH11163363A (ja) * 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP4379943B2 (ja) 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
JP3900741B2 (ja) * 1999-05-21 2007-04-04 信越半導体株式会社 Ｓｏｉウェーハの製造方法
JP4529036B2 (ja) * 1999-09-24 2010-08-25 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 半導体用薄膜ウェハの製造方法
JP3943782B2 (ja) * 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
TWI313059B (enExample) 2000-12-08 2009-08-01 Sony Corporatio
JP2003209054A (ja) * 2001-11-12 2003-07-25 Dainippon Screen Mfg Co Ltd 基板の熱処理方法および熱処理装置
JP2005142344A (ja) * 2003-11-06 2005-06-02 Toshiba Corp 半導体装置の製造方法および半導体製造装置
JP4342429B2 (ja) * 2004-02-09 2009-10-14 株式会社東芝 半導体装置の製造方法
JP3910603B2 (ja) 2004-06-07 2007-04-25 株式会社東芝 熱処理装置、熱処理方法及び半導体装置の製造方法
JP5031190B2 (ja) * 2005-02-02 2012-09-19 株式会社Ｓｕｍｃｏ 歪みＳｉ層を有する半導体ウェーハの製造方法
JP4594121B2 (ja) 2005-02-03 2010-12-08 信越化学工業株式会社 Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ
US7829436B2 (en) * 2005-12-22 2010-11-09 Sumco Corporation Process for regeneration of a layer transferred wafer and regenerated layer transferred wafer
EP1981063B1 (en) * 2005-12-27 2021-04-07 Shin-Etsu Chemical Co., Ltd. Process for producing a soi wafer
JP2008112848A (ja) * 2006-10-30 2008-05-15 Shin Etsu Chem Co Ltd 単結晶シリコン太陽電池の製造方法及び単結晶シリコン太陽電池

Also Published As

Publication number Publication date
TW201017729A (en) 2010-05-01
KR101642335B1 (ko) 2016-07-25
US20090305483A1 (en) 2009-12-10
JP2010016356A (ja) 2010-01-21
US7883988B2 (en) 2011-02-08
KR20090127065A (ko) 2009-12-09
TWI445060B (zh) 2014-07-11
CN101599453B (zh) 2013-10-16
CN101599453A (zh) 2009-12-09

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