JP5503271B2 - 入力回路及びそれを備えたアナログ／デジタルコンバータ - Google Patents

入力回路及びそれを備えたアナログ／デジタルコンバータ Download PDF

Info

Publication number
JP5503271B2
JP5503271B2 JP2009279813A JP2009279813A JP5503271B2 JP 5503271 B2 JP5503271 B2 JP 5503271B2 JP 2009279813 A JP2009279813 A JP 2009279813A JP 2009279813 A JP2009279813 A JP 2009279813A JP 5503271 B2 JP5503271 B2 JP 5503271B2
Authority
JP
Japan
Prior art keywords
capacitor
reference voltage
switch
differential amplifier
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009279813A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011124726A5 (enExample
JP2011124726A (ja
Inventor
俊明 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2009279813A priority Critical patent/JP5503271B2/ja
Priority to US12/943,772 priority patent/US8223059B2/en
Priority to CN2010105734696A priority patent/CN102098048B/zh
Publication of JP2011124726A publication Critical patent/JP2011124726A/ja
Priority to US13/526,405 priority patent/US8907836B2/en
Publication of JP2011124726A5 publication Critical patent/JP2011124726A5/ja
Application granted granted Critical
Publication of JP5503271B2 publication Critical patent/JP5503271B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/0607—Offset or drift compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Amplifiers (AREA)
JP2009279813A 2009-12-09 2009-12-09 入力回路及びそれを備えたアナログ／デジタルコンバータ Expired - Fee Related JP5503271B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009279813A JP5503271B2 (ja) 2009-12-09 2009-12-09 入力回路及びそれを備えたアナログ／デジタルコンバータ
US12/943,772 US8223059B2 (en) 2009-12-09 2010-11-10 Switched-capacitor input circuit and analog-to-digital converter including the same
CN2010105734696A CN102098048B (zh) 2009-12-09 2010-12-06 开关电容输入电路和包含它的模拟数字转换器
US13/526,405 US8907836B2 (en) 2009-12-09 2012-06-18 Switched-capacitor input circuit and analog-to-digital converter including the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009279813A JP5503271B2 (ja) 2009-12-09 2009-12-09 入力回路及びそれを備えたアナログ／デジタルコンバータ

Publications (3)

Publication Number Publication Date
JP2011124726A JP2011124726A (ja) 2011-06-23
JP2011124726A5 JP2011124726A5 (enExample) 2013-01-31
JP5503271B2 true JP5503271B2 (ja) 2014-05-28

Family

ID=44081509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009279813A Expired - Fee Related JP5503271B2 (ja) 2009-12-09 2009-12-09 入力回路及びそれを備えたアナログ／デジタルコンバータ

Country Status (3)

Country Link
US (2) US8223059B2 (enExample)
JP (1) JP5503271B2 (enExample)
CN (1) CN102098048B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105790722A (zh) * 2014-12-25 2016-07-20 深圳市中兴微电子技术有限公司 一种运算放大电路、方法及温度传感器
JP6503198B2 (ja) * 2015-03-05 2019-04-17 エイブリック株式会社 比較回路およびセンサ装置
KR102152844B1 (ko) * 2015-08-14 2020-09-07 시러스 로직 인터내셔널 세미컨덕터 리미티드 위상 단락 스위치
JP6675882B2 (ja) * 2016-02-29 2020-04-08 エイブリック株式会社 スイッチドキャパシタ入力回路及びスイッチドキャパシタアンプ及びスイッチドキャパシタ電圧比較器
US10122392B2 (en) * 2016-08-18 2018-11-06 Advanced Micro Devices, Inc. Active equalizing negative resistance amplifier for bi-directional bandwidth extension
KR102484142B1 (ko) * 2017-12-01 2023-01-05 삼성전자주식회사 기준 전압의 변화량을 입력 레벨에 관계없이 균등하게 만드는 스위치드 커패시터 회로
US10218268B1 (en) * 2018-03-26 2019-02-26 Analog Devices Global Unlimited Company Voltage reference circuit and method of providing a voltage reference
DE102019102132B4 (de) * 2019-01-29 2020-08-06 Infineon Technologies Ag Schaltung mit Kondensatoren und entsprechendes Verfahren
JP7331480B2 (ja) * 2019-06-17 2023-08-23 株式会社デンソー 信号検出回路
CN112242845B (zh) * 2019-07-17 2025-10-03 半导体元件工业有限责任公司 用于基准稳定的系统和方法
TWI778317B (zh) * 2019-12-30 2022-09-21 新唐科技股份有限公司 微控制器及控制方法
CN111614333B (zh) * 2020-01-03 2021-02-19 东南大学 一种具有失调消除功能的高速采样放大器

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10163875A (ja) * 1996-11-19 1998-06-19 Texas Instr Inc <Ti> パイプラインアナログ／デジタルコンバータ
US6097326A (en) * 1998-05-26 2000-08-01 National Semiconductor Corporation Algorithmic analog-to-digital converter with reduced differential non-linearity and method
US6169427B1 (en) * 1998-12-10 2001-01-02 National Semiconductor Corporation Sample and hold circuit having single-ended input and differential output and method
US6433712B1 (en) * 2001-07-25 2002-08-13 Texas Instruments Incorporated Offset error compensation of input signals in analog-to-digital converter
US6445331B1 (en) * 2001-08-14 2002-09-03 National Semiconductor Corporation Apparatus and method for common-mode regulation in a switched capacitor circuit
US6642751B1 (en) * 2002-09-06 2003-11-04 Xilinx, Inc. Configurable track-and-hold circuit
US7102558B2 (en) * 2004-08-20 2006-09-05 Microchip Technology Incorporated Five-level feed-back digital-to-analog converter for a switched capacitor sigma-delta analog-to-digital converter
JP2006115003A (ja) * 2004-10-12 2006-04-27 Sony Corp サンプルホールド回路およびそれを用いたパイプラインａｄ変換器
US7733168B2 (en) * 2005-11-21 2010-06-08 Panasonic Corporation Fully differential comparator and fully differential amplifier
JP4853186B2 (ja) * 2006-08-31 2012-01-11 ミツミ電機株式会社 アナログ−ディジタル変換装置
JP4879773B2 (ja) * 2007-02-19 2012-02-22 ルネサスエレクトロニクス株式会社 アナログデジタル変換回路
EP2237424B1 (en) * 2009-03-30 2013-02-27 Dialog Semiconductor GmbH Tri-level dynamic element matcher allowing reduced reference loading and DAC element reduction
JP5503272B2 (ja) 2009-12-09 2014-05-28 キヤノン株式会社 入力回路及びそれを備えたアナログ／デジタルコンバータ
US8026760B1 (en) * 2010-07-29 2011-09-27 Freescale Semiconductor, Inc. Gain enhanced switched capacitor circuit and method of operation

Also Published As

Publication number Publication date
US20110133974A1 (en) 2011-06-09
US8907836B2 (en) 2014-12-09
CN102098048B (zh) 2013-12-11
JP2011124726A (ja) 2011-06-23
CN102098048A (zh) 2011-06-15
US8223059B2 (en) 2012-07-17
US20120249352A1 (en) 2012-10-04

Similar Documents

Publication Publication Date Title
JP5503271B2 (ja) 入力回路及びそれを備えたアナログ／デジタルコンバータ
JP5503272B2 (ja) 入力回路及びそれを備えたアナログ／デジタルコンバータ
CN108574487B (zh) 逐次逼近寄存器模数转换器
US6480132B1 (en) A/D converter with higher speed and accuracy and lower power consumption
EP3567720B1 (en) Mismatch and reference common-mode offset insensitive single-ended switched capacitor gain stage
JP4811339B2 (ja) Ａ／ｄ変換器
CN113839673A (zh) 一种新型数字域自校准逐次逼近模数转换器
CN111034052B (zh) 用于在不具有附加有源电路的sar adc中启用宽输入共模范围的方法和装置
WO2014036550A1 (en) Circuitry and method for reducing area and power of a pipeline adc
JP2007159087A (ja) サンプルホールド回路およびマルチプライングｄ／ａコンバータ
TW202218340A (zh) 類比數位轉換器以及用於抵消偏移之自動歸零殘餘放大電路
JP2009081749A (ja) 低オフセット入力回路
JP2612014B2 (ja) アナログーディジタル変換器
TWI748352B (zh) 取樣保持放大電路
CN112118009A (zh) 连续逼近式模拟数字转换器及其操作方法
US6642751B1 (en) Configurable track-and-hold circuit
JP4648779B2 (ja) ディジタル・アナログ変換器
CN110349535A (zh) 增益放大器
KR102398446B1 (ko) 아날로그-디지털 변환기
TWI763524B (zh) 類比數位轉換器之操作方法
US7579975B2 (en) DAC architecture for an ADC pipeline
JP2014230012A (ja) 逐次比較型ａ／ｄ変換器及びその駆動方法
CN113328746B (zh) 取样保持放大电路
CN111294050B (zh) 高线性度的循续渐近式模拟至数字转换器
JP3774882B2 (ja) Ｄ／ａコンバータ

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121205

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20121205

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131127

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131202

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140115

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140214

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140314

R151 Written notification of patent or utility model registration

Ref document number: 5503271

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees