JP5496540B2 - 半導体基板の作製方法 - Google Patents

半導体基板の作製方法 Download PDF

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Publication number
JP5496540B2
JP5496540B2 JP2009100931A JP2009100931A JP5496540B2 JP 5496540 B2 JP5496540 B2 JP 5496540B2 JP 2009100931 A JP2009100931 A JP 2009100931A JP 2009100931 A JP2009100931 A JP 2009100931A JP 5496540 B2 JP5496540 B2 JP 5496540B2
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Japan
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semiconductor layer
single crystal
layer
crystal semiconductor
substrate
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Expired - Fee Related
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JP2009100931A
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English (en)
Japanese (ja)
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JP2009283922A (ja
JP2009283922A5 (https=
Inventor
翔 加藤
聡志 鳥海
史人 井坂
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2009100931A priority Critical patent/JP5496540B2/ja
Publication of JP2009283922A publication Critical patent/JP2009283922A/ja
Publication of JP2009283922A5 publication Critical patent/JP2009283922A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3816—Pulsed laser beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
JP2009100931A 2008-04-24 2009-04-17 半導体基板の作製方法 Expired - Fee Related JP5496540B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009100931A JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008113320 2008-04-24
JP2008113320 2008-04-24
JP2009100931A JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Publications (3)

Publication Number Publication Date
JP2009283922A JP2009283922A (ja) 2009-12-03
JP2009283922A5 JP2009283922A5 (https=) 2012-03-08
JP5496540B2 true JP5496540B2 (ja) 2014-05-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009100931A Expired - Fee Related JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Country Status (2)

Country Link
US (1) US8349702B2 (https=)
JP (1) JP5496540B2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5755931B2 (ja) 2010-04-28 2015-07-29 株式会社半導体エネルギー研究所 半導体膜の作製方法、電極の作製方法、２次電池の作製方法、および太陽電池の作製方法
JP5819614B2 (ja) * 2011-02-02 2015-11-24 信越化学工業株式会社 Ｓｏｉウェーハの製造方法
JPWO2012111616A1 (ja) * 2011-02-15 2014-07-07 住友電気工業株式会社 保護膜付複合基板、および半導体デバイスの製造方法
US8524572B2 (en) * 2011-10-06 2013-09-03 Micron Technology, Inc. Methods of processing units comprising crystalline materials, and methods of forming semiconductor-on-insulator constructions
US9444019B1 (en) * 2015-09-21 2016-09-13 Epistar Corporation Method for reusing a substrate for making light-emitting device
FR3091619B1 (fr) * 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de guérison avant transfert d’une couche semi-conductrice

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61202417A (ja) * 1985-03-06 1986-09-08 Oki Electric Ind Co Ltd シリコンエピタキシヤル層の形成方法
JPS6248014A (ja) * 1985-08-28 1987-03-02 Sony Corp 半導体層の固相成長方法
JPH02100315A (ja) * 1988-10-07 1990-04-12 Fuji Electric Co Ltd 結晶質シリコン膜の生成方法
JPH03101121A (ja) * 1989-09-13 1991-04-25 Sanyo Electric Co Ltd Ｓｏｉ構造の形成方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JPH1174209A (ja) * 1997-08-27 1999-03-16 Denso Corp 半導体基板の製造方法
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JPH11121310A (ja) 1997-10-09 1999-04-30 Denso Corp 半導体基板の製造方法
JPH1140786A (ja) 1997-07-18 1999-02-12 Denso Corp 半導体基板及びその製造方法
JP3358550B2 (ja) 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3485081B2 (ja) * 1999-10-28 2004-01-13 株式会社デンソー 半導体基板の製造方法
EP1482549B1 (en) * 2003-05-27 2011-03-30 S.O.I. Tec Silicon on Insulator Technologies S.A. Method of fabrication of a heteroepitaxial microstructure
US7452757B2 (en) * 2002-05-07 2008-11-18 Asm America, Inc. Silicon-on-insulator structures and methods
JP2004103855A (ja) 2002-09-10 2004-04-02 Canon Inc 基板及びその製造方法
US7538010B2 (en) * 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
JP4554180B2 (ja) 2003-09-17 2010-09-29 ソニー株式会社 薄膜半導体デバイスの製造方法
CN101512721A (zh) 2006-04-05 2009-08-19 硅源公司 利用层转移工艺制造太阳能电池的方法和结构
FR2917232B1 (fr) 2007-06-06 2009-10-09 Soitec Silicon On Insulator Procede de fabrication d'une structure pour epitaxie sans zone d'exclusion.
US7947523B2 (en) 2008-04-25 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device

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Publication number Publication date
US20090269906A1 (en) 2009-10-29
JP2009283922A (ja) 2009-12-03
US8349702B2 (en) 2013-01-08

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