JP5496540B2 - 半導体基板の作製方法 - Google Patents

半導体基板の作製方法 Download PDF

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Publication number
JP5496540B2
JP5496540B2 JP2009100931A JP2009100931A JP5496540B2 JP 5496540 B2 JP5496540 B2 JP 5496540B2 JP 2009100931 A JP2009100931 A JP 2009100931A JP 2009100931 A JP2009100931 A JP 2009100931A JP 5496540 B2 JP5496540 B2 JP 5496540B2
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Japan
Prior art keywords
semiconductor layer
single crystal
layer
crystal semiconductor
substrate
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Expired - Fee Related
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JP2009100931A
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English (en)
Japanese (ja)
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JP2009283922A (ja
JP2009283922A5 (enExample
Inventor
翔 加藤
聡志 鳥海
史人 井坂
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2009100931A priority Critical patent/JP5496540B2/ja
Publication of JP2009283922A publication Critical patent/JP2009283922A/ja
Publication of JP2009283922A5 publication Critical patent/JP2009283922A5/ja
Application granted granted Critical
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02686—Pulsed laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Recrystallisation Techniques (AREA)
JP2009100931A 2008-04-24 2009-04-17 半導体基板の作製方法 Expired - Fee Related JP5496540B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009100931A JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008113320 2008-04-24
JP2008113320 2008-04-24
JP2009100931A JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Publications (3)

Publication Number Publication Date
JP2009283922A JP2009283922A (ja) 2009-12-03
JP2009283922A5 JP2009283922A5 (enExample) 2012-03-08
JP5496540B2 true JP5496540B2 (ja) 2014-05-21

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Family Applications (1)

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JP2009100931A Expired - Fee Related JP5496540B2 (ja) 2008-04-24 2009-04-17 半導体基板の作製方法

Country Status (2)

Country Link
US (1) US8349702B2 (enExample)
JP (1) JP5496540B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5755931B2 (ja) 2010-04-28 2015-07-29 株式会社半導体エネルギー研究所 半導体膜の作製方法、電極の作製方法、２次電池の作製方法、および太陽電池の作製方法
JP5819614B2 (ja) * 2011-02-02 2015-11-24 信越化学工業株式会社 Ｓｏｉウェーハの製造方法
US20130168693A1 (en) * 2011-02-15 2013-07-04 Sumitomo Electric Industries, Ltd. Protective-film-attached composite substrate and method of manufacturing semiconductor device
US8524572B2 (en) 2011-10-06 2013-09-03 Micron Technology, Inc. Methods of processing units comprising crystalline materials, and methods of forming semiconductor-on-insulator constructions
US9444019B1 (en) * 2015-09-21 2016-09-13 Epistar Corporation Method for reusing a substrate for making light-emitting device
FR3091619B1 (fr) * 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de guérison avant transfert d’une couche semi-conductrice

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61202417A (ja) * 1985-03-06 1986-09-08 Oki Electric Ind Co Ltd シリコンエピタキシヤル層の形成方法
JPS6248014A (ja) * 1985-08-28 1987-03-02 Sony Corp 半導体層の固相成長方法
JPH02100315A (ja) * 1988-10-07 1990-04-12 Fuji Electric Co Ltd 結晶質シリコン膜の生成方法
JPH03101121A (ja) * 1989-09-13 1991-04-25 Sanyo Electric Co Ltd Ｓｏｉ構造の形成方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JPH1174209A (ja) * 1997-08-27 1999-03-16 Denso Corp 半導体基板の製造方法
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
JPH1140786A (ja) 1997-07-18 1999-02-12 Denso Corp 半導体基板及びその製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JPH11121310A (ja) 1997-10-09 1999-04-30 Denso Corp 半導体基板の製造方法
JP3358550B2 (ja) * 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3485081B2 (ja) * 1999-10-28 2004-01-13 株式会社デンソー 半導体基板の製造方法
EP1482549B1 (en) * 2003-05-27 2011-03-30 S.O.I. Tec Silicon on Insulator Technologies S.A. Method of fabrication of a heteroepitaxial microstructure
US7452757B2 (en) * 2002-05-07 2008-11-18 Asm America, Inc. Silicon-on-insulator structures and methods
JP2004103855A (ja) 2002-09-10 2004-04-02 Canon Inc 基板及びその製造方法
US7538010B2 (en) * 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
JP4554180B2 (ja) 2003-09-17 2010-09-29 ソニー株式会社 薄膜半導体デバイスの製造方法
EP2002484A4 (en) 2006-04-05 2016-06-08 Silicon Genesis Corp METHOD AND STRUCTURE FOR MANUFACTURING PHOTOVOLTAIC CELLS USING A LAYER TRANSFER PROCESS
FR2917232B1 (fr) 2007-06-06 2009-10-09 Soitec Silicon On Insulator Procede de fabrication d'une structure pour epitaxie sans zone d'exclusion.
US7947523B2 (en) 2008-04-25 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device

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Publication number Publication date
JP2009283922A (ja) 2009-12-03
US20090269906A1 (en) 2009-10-29
US8349702B2 (en) 2013-01-08

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